* [PATCH 1/9] phy: freescale: phy-fsl-samsung-hdmi: convert from round_rate() to determine_rate()
2025-07-10 16:07 [PATCH 0/9] phy: convert from clk round_rate() to determine_rate() Brian Masney
@ 2025-07-10 16:07 ` Brian Masney
2025-07-10 16:07 ` [PATCH 2/9] phy: mediatek: phy-mtk-hdmi-mt2701: " Brian Masney
` (7 subsequent siblings)
8 siblings, 0 replies; 11+ messages in thread
From: Brian Masney @ 2025-07-10 16:07 UTC (permalink / raw)
To: Vinod Koul, Kishon Vijay Abraham I, Chun-Kuang Hu, Philipp Zabel,
Chunfeng Yun, Matthias Brugger, AngeloGioacchino Del Regno,
Heiko Stuebner, Maxime Ripard, Stephen Boyd
Cc: linux-clk, linux-phy, linux-kernel, dri-devel, linux-mediatek,
linux-arm-kernel, linux-rockchip, Brian Masney
The round_rate() clk ops is deprecated, so migrate this driver from
round_rate() to determine_rate() using the Coccinelle semantic patch
on the cover letter of this series.
Signed-off-by: Brian Masney <bmasney@redhat.com>
---
drivers/phy/freescale/phy-fsl-samsung-hdmi.c | 13 ++++++++-----
1 file changed, 8 insertions(+), 5 deletions(-)
diff --git a/drivers/phy/freescale/phy-fsl-samsung-hdmi.c b/drivers/phy/freescale/phy-fsl-samsung-hdmi.c
index 191c282246d96e3f6c5a8d17abe078892882bf44..d010fec15671d33cc363af79e9f1c3f26ecb3464 100644
--- a/drivers/phy/freescale/phy-fsl-samsung-hdmi.c
+++ b/drivers/phy/freescale/phy-fsl-samsung-hdmi.c
@@ -570,17 +570,20 @@ const struct phy_config *fsl_samsung_hdmi_phy_find_settings(struct fsl_samsung_h
return fract_div_phy;
}
-static long fsl_samsung_hdmi_phy_clk_round_rate(struct clk_hw *hw,
- unsigned long rate, unsigned long *parent_rate)
+static int fsl_samsung_hdmi_phy_clk_determine_rate(struct clk_hw *hw,
+ struct clk_rate_request *req)
{
struct fsl_samsung_hdmi_phy *phy = to_fsl_samsung_hdmi_phy(hw);
- const struct phy_config *target_settings = fsl_samsung_hdmi_phy_find_settings(phy, rate);
+ const struct phy_config *target_settings = fsl_samsung_hdmi_phy_find_settings(phy,
+ req->rate);
if (target_settings == NULL)
return -EINVAL;
dev_dbg(phy->dev, "round_rate, closest rate = %u\n", target_settings->pixclk);
- return target_settings->pixclk;
+ req->rate = target_settings->pixclk;
+
+ return 0;
}
static int fsl_samsung_hdmi_phy_clk_set_rate(struct clk_hw *hw,
@@ -599,7 +602,7 @@ static int fsl_samsung_hdmi_phy_clk_set_rate(struct clk_hw *hw,
static const struct clk_ops phy_clk_ops = {
.recalc_rate = phy_clk_recalc_rate,
- .round_rate = fsl_samsung_hdmi_phy_clk_round_rate,
+ .determine_rate = fsl_samsung_hdmi_phy_clk_determine_rate,
.set_rate = fsl_samsung_hdmi_phy_clk_set_rate,
};
--
2.50.0
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH 2/9] phy: mediatek: phy-mtk-hdmi-mt2701: convert from round_rate() to determine_rate()
2025-07-10 16:07 [PATCH 0/9] phy: convert from clk round_rate() to determine_rate() Brian Masney
2025-07-10 16:07 ` [PATCH 1/9] phy: freescale: phy-fsl-samsung-hdmi: convert from " Brian Masney
@ 2025-07-10 16:07 ` Brian Masney
2025-07-10 16:07 ` [PATCH 3/9] phy: mediatek: phy-mtk-hdmi-mt8173: " Brian Masney
` (6 subsequent siblings)
8 siblings, 0 replies; 11+ messages in thread
From: Brian Masney @ 2025-07-10 16:07 UTC (permalink / raw)
To: Vinod Koul, Kishon Vijay Abraham I, Chun-Kuang Hu, Philipp Zabel,
Chunfeng Yun, Matthias Brugger, AngeloGioacchino Del Regno,
Heiko Stuebner, Maxime Ripard, Stephen Boyd
Cc: linux-clk, linux-phy, linux-kernel, dri-devel, linux-mediatek,
linux-arm-kernel, linux-rockchip, Brian Masney
The round_rate() clk ops is deprecated, so migrate this driver from
round_rate() to determine_rate() using the Coccinelle semantic patch
on the cover letter of this series.
Signed-off-by: Brian Masney <bmasney@redhat.com>
---
drivers/phy/mediatek/phy-mtk-hdmi-mt2701.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/phy/mediatek/phy-mtk-hdmi-mt2701.c b/drivers/phy/mediatek/phy-mtk-hdmi-mt2701.c
index e51b2d13eab473dddace48c75c2a8d73c8c65635..b0b6497e7eedcb6867541b573d22156ded29a4d5 100644
--- a/drivers/phy/mediatek/phy-mtk-hdmi-mt2701.c
+++ b/drivers/phy/mediatek/phy-mtk-hdmi-mt2701.c
@@ -90,10 +90,10 @@ static void mtk_hdmi_pll_unprepare(struct clk_hw *hw)
usleep_range(80, 100);
}
-static long mtk_hdmi_pll_round_rate(struct clk_hw *hw, unsigned long rate,
- unsigned long *parent_rate)
+static int mtk_hdmi_pll_determine_rate(struct clk_hw *hw,
+ struct clk_rate_request *req)
{
- return rate;
+ return 0;
}
static int mtk_hdmi_pll_set_rate(struct clk_hw *hw, unsigned long rate,
@@ -170,7 +170,7 @@ static const struct clk_ops mtk_hdmi_phy_pll_ops = {
.prepare = mtk_hdmi_pll_prepare,
.unprepare = mtk_hdmi_pll_unprepare,
.set_rate = mtk_hdmi_pll_set_rate,
- .round_rate = mtk_hdmi_pll_round_rate,
+ .determine_rate = mtk_hdmi_pll_determine_rate,
.recalc_rate = mtk_hdmi_pll_recalc_rate,
};
--
2.50.0
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH 3/9] phy: mediatek: phy-mtk-hdmi-mt8173: convert from round_rate() to determine_rate()
2025-07-10 16:07 [PATCH 0/9] phy: convert from clk round_rate() to determine_rate() Brian Masney
2025-07-10 16:07 ` [PATCH 1/9] phy: freescale: phy-fsl-samsung-hdmi: convert from " Brian Masney
2025-07-10 16:07 ` [PATCH 2/9] phy: mediatek: phy-mtk-hdmi-mt2701: " Brian Masney
@ 2025-07-10 16:07 ` Brian Masney
2025-07-10 16:07 ` [PATCH 4/9] phy: mediatek: phy-mtk-hdmi-mt8195: " Brian Masney
` (5 subsequent siblings)
8 siblings, 0 replies; 11+ messages in thread
From: Brian Masney @ 2025-07-10 16:07 UTC (permalink / raw)
To: Vinod Koul, Kishon Vijay Abraham I, Chun-Kuang Hu, Philipp Zabel,
Chunfeng Yun, Matthias Brugger, AngeloGioacchino Del Regno,
Heiko Stuebner, Maxime Ripard, Stephen Boyd
Cc: linux-clk, linux-phy, linux-kernel, dri-devel, linux-mediatek,
linux-arm-kernel, linux-rockchip, Brian Masney
The round_rate() clk ops is deprecated, so migrate this driver from
round_rate() to determine_rate() using the Coccinelle semantic patch
on the cover letter of this series.
Signed-off-by: Brian Masney <bmasney@redhat.com>
---
drivers/phy/mediatek/phy-mtk-hdmi-mt8173.c | 16 ++++++++--------
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/phy/mediatek/phy-mtk-hdmi-mt8173.c b/drivers/phy/mediatek/phy-mtk-hdmi-mt8173.c
index d04758396046363ab9edc584ae10bf31e9c5fb0f..58c6596c8c20bdacf96a97709b8f5709f447e85b 100644
--- a/drivers/phy/mediatek/phy-mtk-hdmi-mt8173.c
+++ b/drivers/phy/mediatek/phy-mtk-hdmi-mt8173.c
@@ -118,18 +118,18 @@ static void mtk_hdmi_pll_unprepare(struct clk_hw *hw)
usleep_range(100, 150);
}
-static long mtk_hdmi_pll_round_rate(struct clk_hw *hw, unsigned long rate,
- unsigned long *parent_rate)
+static int mtk_hdmi_pll_determine_rate(struct clk_hw *hw,
+ struct clk_rate_request *req)
{
struct mtk_hdmi_phy *hdmi_phy = to_mtk_hdmi_phy(hw);
- hdmi_phy->pll_rate = rate;
- if (rate <= 74250000)
- *parent_rate = rate;
+ hdmi_phy->pll_rate = req->rate;
+ if (req->rate <= 74250000)
+ req->best_parent_rate = req->rate;
else
- *parent_rate = rate / 2;
+ req->best_parent_rate = req->rate / 2;
- return rate;
+ return 0;
}
static int mtk_hdmi_pll_set_rate(struct clk_hw *hw, unsigned long rate,
@@ -223,7 +223,7 @@ static const struct clk_ops mtk_hdmi_phy_pll_ops = {
.prepare = mtk_hdmi_pll_prepare,
.unprepare = mtk_hdmi_pll_unprepare,
.set_rate = mtk_hdmi_pll_set_rate,
- .round_rate = mtk_hdmi_pll_round_rate,
+ .determine_rate = mtk_hdmi_pll_determine_rate,
.recalc_rate = mtk_hdmi_pll_recalc_rate,
};
--
2.50.0
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH 4/9] phy: mediatek: phy-mtk-hdmi-mt8195: convert from round_rate() to determine_rate()
2025-07-10 16:07 [PATCH 0/9] phy: convert from clk round_rate() to determine_rate() Brian Masney
` (2 preceding siblings ...)
2025-07-10 16:07 ` [PATCH 3/9] phy: mediatek: phy-mtk-hdmi-mt8173: " Brian Masney
@ 2025-07-10 16:07 ` Brian Masney
2025-07-10 16:07 ` [PATCH 5/9] phy: mediatek: phy-mtk-mipi-dsi-mt8173: " Brian Masney
` (4 subsequent siblings)
8 siblings, 0 replies; 11+ messages in thread
From: Brian Masney @ 2025-07-10 16:07 UTC (permalink / raw)
To: Vinod Koul, Kishon Vijay Abraham I, Chun-Kuang Hu, Philipp Zabel,
Chunfeng Yun, Matthias Brugger, AngeloGioacchino Del Regno,
Heiko Stuebner, Maxime Ripard, Stephen Boyd
Cc: linux-clk, linux-phy, linux-kernel, dri-devel, linux-mediatek,
linux-arm-kernel, linux-rockchip, Brian Masney
The round_rate() clk ops is deprecated, so migrate this driver from
round_rate() to determine_rate() using the Coccinelle semantic patch
on the cover letter of this series.
Signed-off-by: Brian Masney <bmasney@redhat.com>
---
drivers/phy/mediatek/phy-mtk-hdmi-mt8195.c | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/phy/mediatek/phy-mtk-hdmi-mt8195.c b/drivers/phy/mediatek/phy-mtk-hdmi-mt8195.c
index b38f3ae26b3f3d8c9e73b43d86510acf6cedb471..1426a2db984d53b91125b18f7725738c44f19555 100644
--- a/drivers/phy/mediatek/phy-mtk-hdmi-mt8195.c
+++ b/drivers/phy/mediatek/phy-mtk-hdmi-mt8195.c
@@ -418,13 +418,13 @@ static int mtk_hdmi_pll_set_rate(struct clk_hw *hw, unsigned long rate,
return mtk_hdmi_pll_calc(hdmi_phy, hw, rate, parent_rate);
}
-static long mtk_hdmi_pll_round_rate(struct clk_hw *hw, unsigned long rate,
- unsigned long *parent_rate)
+static int mtk_hdmi_pll_determine_rate(struct clk_hw *hw,
+ struct clk_rate_request *req)
{
struct mtk_hdmi_phy *hdmi_phy = to_mtk_hdmi_phy(hw);
- hdmi_phy->pll_rate = rate;
- return rate;
+ hdmi_phy->pll_rate = req->rate;
+ return 0;
}
static unsigned long mtk_hdmi_pll_recalc_rate(struct clk_hw *hw,
@@ -439,7 +439,7 @@ static const struct clk_ops mtk_hdmi_pll_ops = {
.prepare = mtk_hdmi_pll_prepare,
.unprepare = mtk_hdmi_pll_unprepare,
.set_rate = mtk_hdmi_pll_set_rate,
- .round_rate = mtk_hdmi_pll_round_rate,
+ .determine_rate = mtk_hdmi_pll_determine_rate,
.recalc_rate = mtk_hdmi_pll_recalc_rate,
};
--
2.50.0
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH 5/9] phy: mediatek: phy-mtk-mipi-dsi-mt8173: convert from round_rate() to determine_rate()
2025-07-10 16:07 [PATCH 0/9] phy: convert from clk round_rate() to determine_rate() Brian Masney
` (3 preceding siblings ...)
2025-07-10 16:07 ` [PATCH 4/9] phy: mediatek: phy-mtk-hdmi-mt8195: " Brian Masney
@ 2025-07-10 16:07 ` Brian Masney
2025-07-10 16:07 ` [PATCH 6/9] phy: mediatek: phy-mtk-mipi-dsi-mt8183: " Brian Masney
` (3 subsequent siblings)
8 siblings, 0 replies; 11+ messages in thread
From: Brian Masney @ 2025-07-10 16:07 UTC (permalink / raw)
To: Vinod Koul, Kishon Vijay Abraham I, Chun-Kuang Hu, Philipp Zabel,
Chunfeng Yun, Matthias Brugger, AngeloGioacchino Del Regno,
Heiko Stuebner, Maxime Ripard, Stephen Boyd
Cc: linux-clk, linux-phy, linux-kernel, dri-devel, linux-mediatek,
linux-arm-kernel, linux-rockchip, Brian Masney
The round_rate() clk ops is deprecated, so migrate this driver from
round_rate() to determine_rate() using the Coccinelle semantic patch
on the cover letter of this series.
Signed-off-by: Brian Masney <bmasney@redhat.com>
---
drivers/phy/mediatek/phy-mtk-mipi-dsi-mt8173.c | 10 ++++++----
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/drivers/phy/mediatek/phy-mtk-mipi-dsi-mt8173.c b/drivers/phy/mediatek/phy-mtk-mipi-dsi-mt8173.c
index 673cb0f08959e0e4f2b1ade2ebaf796e8b76f8bc..438ff3605d90121b7bfe02b3ddca8194437ed9ba 100644
--- a/drivers/phy/mediatek/phy-mtk-mipi-dsi-mt8173.c
+++ b/drivers/phy/mediatek/phy-mtk-mipi-dsi-mt8173.c
@@ -237,16 +237,18 @@ static void mtk_mipi_tx_pll_unprepare(struct clk_hw *hw)
mtk_phy_clear_bits(base + MIPITX_DSI_PLL_CON0, RG_DSI_MPPLL_DIV_MSK);
}
-static long mtk_mipi_tx_pll_round_rate(struct clk_hw *hw, unsigned long rate,
- unsigned long *prate)
+static int mtk_mipi_tx_pll_determine_rate(struct clk_hw *hw,
+ struct clk_rate_request *req)
{
- return clamp_val(rate, 50000000, 1250000000);
+ req->rate = clamp_val(req->rate, 50000000, 1250000000);
+
+ return 0;
}
static const struct clk_ops mtk_mipi_tx_pll_ops = {
.prepare = mtk_mipi_tx_pll_prepare,
.unprepare = mtk_mipi_tx_pll_unprepare,
- .round_rate = mtk_mipi_tx_pll_round_rate,
+ .determine_rate = mtk_mipi_tx_pll_determine_rate,
.set_rate = mtk_mipi_tx_pll_set_rate,
.recalc_rate = mtk_mipi_tx_pll_recalc_rate,
};
--
2.50.0
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH 6/9] phy: mediatek: phy-mtk-mipi-dsi-mt8183: convert from round_rate() to determine_rate()
2025-07-10 16:07 [PATCH 0/9] phy: convert from clk round_rate() to determine_rate() Brian Masney
` (4 preceding siblings ...)
2025-07-10 16:07 ` [PATCH 5/9] phy: mediatek: phy-mtk-mipi-dsi-mt8173: " Brian Masney
@ 2025-07-10 16:07 ` Brian Masney
2025-07-10 16:07 ` [PATCH 7/9] phy: rockchip: phy-rockchip-inno-hdmi: " Brian Masney
` (2 subsequent siblings)
8 siblings, 0 replies; 11+ messages in thread
From: Brian Masney @ 2025-07-10 16:07 UTC (permalink / raw)
To: Vinod Koul, Kishon Vijay Abraham I, Chun-Kuang Hu, Philipp Zabel,
Chunfeng Yun, Matthias Brugger, AngeloGioacchino Del Regno,
Heiko Stuebner, Maxime Ripard, Stephen Boyd
Cc: linux-clk, linux-phy, linux-kernel, dri-devel, linux-mediatek,
linux-arm-kernel, linux-rockchip, Brian Masney
The round_rate() clk ops is deprecated, so migrate this driver from
round_rate() to determine_rate() using the Coccinelle semantic patch
on the cover letter of this series.
Signed-off-by: Brian Masney <bmasney@redhat.com>
---
drivers/phy/mediatek/phy-mtk-mipi-dsi-mt8183.c | 10 ++++++----
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/drivers/phy/mediatek/phy-mtk-mipi-dsi-mt8183.c b/drivers/phy/mediatek/phy-mtk-mipi-dsi-mt8183.c
index 553725e1269c9d7ad88f89367dfa1cf367aaf1ce..a54d44ef70ab49937d210f04fdf42300e8e5f2de 100644
--- a/drivers/phy/mediatek/phy-mtk-mipi-dsi-mt8183.c
+++ b/drivers/phy/mediatek/phy-mtk-mipi-dsi-mt8183.c
@@ -97,16 +97,18 @@ static void mtk_mipi_tx_pll_disable(struct clk_hw *hw)
mtk_phy_clear_bits(base + MIPITX_PLL_PWR, AD_DSI_PLL_SDM_PWR_ON);
}
-static long mtk_mipi_tx_pll_round_rate(struct clk_hw *hw, unsigned long rate,
- unsigned long *prate)
+static int mtk_mipi_tx_pll_determine_rate(struct clk_hw *hw,
+ struct clk_rate_request *req)
{
- return clamp_val(rate, 125000000, 1600000000);
+ req->rate = clamp_val(req->rate, 125000000, 1600000000);
+
+ return 0;
}
static const struct clk_ops mtk_mipi_tx_pll_ops = {
.enable = mtk_mipi_tx_pll_enable,
.disable = mtk_mipi_tx_pll_disable,
- .round_rate = mtk_mipi_tx_pll_round_rate,
+ .determine_rate = mtk_mipi_tx_pll_determine_rate,
.set_rate = mtk_mipi_tx_pll_set_rate,
.recalc_rate = mtk_mipi_tx_pll_recalc_rate,
};
--
2.50.0
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH 7/9] phy: rockchip: phy-rockchip-inno-hdmi: convert from round_rate() to determine_rate()
2025-07-10 16:07 [PATCH 0/9] phy: convert from clk round_rate() to determine_rate() Brian Masney
` (5 preceding siblings ...)
2025-07-10 16:07 ` [PATCH 6/9] phy: mediatek: phy-mtk-mipi-dsi-mt8183: " Brian Masney
@ 2025-07-10 16:07 ` Brian Masney
2025-07-10 16:07 ` [PATCH 8/9] phy: rockchip: phy-rockchip-samsung-hdptx: " Brian Masney
2025-07-10 16:07 ` [PATCH 9/9] phy: ti: phy-j721e-wiz: " Brian Masney
8 siblings, 0 replies; 11+ messages in thread
From: Brian Masney @ 2025-07-10 16:07 UTC (permalink / raw)
To: Vinod Koul, Kishon Vijay Abraham I, Chun-Kuang Hu, Philipp Zabel,
Chunfeng Yun, Matthias Brugger, AngeloGioacchino Del Regno,
Heiko Stuebner, Maxime Ripard, Stephen Boyd
Cc: linux-clk, linux-phy, linux-kernel, dri-devel, linux-mediatek,
linux-arm-kernel, linux-rockchip, Brian Masney
The round_rate() clk ops is deprecated, so migrate this driver from
round_rate() to determine_rate() using the Coccinelle semantic patch
on the cover letter of this series.
Signed-off-by: Brian Masney <bmasney@redhat.com>
---
drivers/phy/rockchip/phy-rockchip-inno-hdmi.c | 30 ++++++++++++++-------------
1 file changed, 16 insertions(+), 14 deletions(-)
diff --git a/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c b/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c
index 8dcc2bb777b5455d21a10f06c5ad842b2ddbc834..1483907413faa5ce1dc8614db05e6e929410404d 100644
--- a/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c
+++ b/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c
@@ -749,22 +749,23 @@ unsigned long inno_hdmi_phy_rk3228_clk_recalc_rate(struct clk_hw *hw,
return vco;
}
-static long inno_hdmi_phy_rk3228_clk_round_rate(struct clk_hw *hw,
- unsigned long rate,
- unsigned long *parent_rate)
+static int inno_hdmi_phy_rk3228_clk_determine_rate(struct clk_hw *hw,
+ struct clk_rate_request *req)
{
const struct pre_pll_config *cfg = pre_pll_cfg_table;
- rate = (rate / 1000) * 1000;
+ req->rate = (req->rate / 1000) * 1000;
for (; cfg->pixclock != 0; cfg++)
- if (cfg->pixclock == rate && !cfg->fracdiv)
+ if (cfg->pixclock == req->rate && !cfg->fracdiv)
break;
if (cfg->pixclock == 0)
return -EINVAL;
- return cfg->pixclock;
+ req->rate = cfg->pixclock;
+
+ return 0;
}
static int inno_hdmi_phy_rk3228_clk_set_rate(struct clk_hw *hw,
@@ -835,7 +836,7 @@ static const struct clk_ops inno_hdmi_phy_rk3228_clk_ops = {
.unprepare = inno_hdmi_phy_rk3228_clk_unprepare,
.is_prepared = inno_hdmi_phy_rk3228_clk_is_prepared,
.recalc_rate = inno_hdmi_phy_rk3228_clk_recalc_rate,
- .round_rate = inno_hdmi_phy_rk3228_clk_round_rate,
+ .determine_rate = inno_hdmi_phy_rk3228_clk_determine_rate,
.set_rate = inno_hdmi_phy_rk3228_clk_set_rate,
};
@@ -906,22 +907,23 @@ unsigned long inno_hdmi_phy_rk3328_clk_recalc_rate(struct clk_hw *hw,
return inno->pixclock;
}
-static long inno_hdmi_phy_rk3328_clk_round_rate(struct clk_hw *hw,
- unsigned long rate,
- unsigned long *parent_rate)
+static int inno_hdmi_phy_rk3328_clk_determine_rate(struct clk_hw *hw,
+ struct clk_rate_request *req)
{
const struct pre_pll_config *cfg = pre_pll_cfg_table;
- rate = (rate / 1000) * 1000;
+ req->rate = (req->rate / 1000) * 1000;
for (; cfg->pixclock != 0; cfg++)
- if (cfg->pixclock == rate)
+ if (cfg->pixclock == req->rate)
break;
if (cfg->pixclock == 0)
return -EINVAL;
- return cfg->pixclock;
+ req->rate = cfg->pixclock;
+
+ return 0;
}
static int inno_hdmi_phy_rk3328_clk_set_rate(struct clk_hw *hw,
@@ -989,7 +991,7 @@ static const struct clk_ops inno_hdmi_phy_rk3328_clk_ops = {
.unprepare = inno_hdmi_phy_rk3328_clk_unprepare,
.is_prepared = inno_hdmi_phy_rk3328_clk_is_prepared,
.recalc_rate = inno_hdmi_phy_rk3328_clk_recalc_rate,
- .round_rate = inno_hdmi_phy_rk3328_clk_round_rate,
+ .determine_rate = inno_hdmi_phy_rk3328_clk_determine_rate,
.set_rate = inno_hdmi_phy_rk3328_clk_set_rate,
};
--
2.50.0
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH 8/9] phy: rockchip: phy-rockchip-samsung-hdptx: convert from round_rate() to determine_rate()
2025-07-10 16:07 [PATCH 0/9] phy: convert from clk round_rate() to determine_rate() Brian Masney
` (6 preceding siblings ...)
2025-07-10 16:07 ` [PATCH 7/9] phy: rockchip: phy-rockchip-inno-hdmi: " Brian Masney
@ 2025-07-10 16:07 ` Brian Masney
2025-07-14 9:11 ` Cristian Ciocaltea
2025-07-10 16:07 ` [PATCH 9/9] phy: ti: phy-j721e-wiz: " Brian Masney
8 siblings, 1 reply; 11+ messages in thread
From: Brian Masney @ 2025-07-10 16:07 UTC (permalink / raw)
To: Vinod Koul, Kishon Vijay Abraham I, Chun-Kuang Hu, Philipp Zabel,
Chunfeng Yun, Matthias Brugger, AngeloGioacchino Del Regno,
Heiko Stuebner, Maxime Ripard, Stephen Boyd
Cc: linux-clk, linux-phy, linux-kernel, dri-devel, linux-mediatek,
linux-arm-kernel, linux-rockchip, Brian Masney
The round_rate() clk ops is deprecated, so migrate this driver from
round_rate() to determine_rate() using the Coccinelle semantic patch
on the cover letter of this series.
Signed-off-by: Brian Masney <bmasney@redhat.com>
---
drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c | 21 +++++++++++++--------
1 file changed, 13 insertions(+), 8 deletions(-)
diff --git a/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c b/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c
index 79db57ee90d1487b51f4ddadde870a275dd7b17b..f027d2caa4c2ebfc0fdec08bcebf3f415ff1a064 100644
--- a/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c
+++ b/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c
@@ -1869,8 +1869,8 @@ static unsigned long rk_hdptx_phy_clk_recalc_rate(struct clk_hw *hw,
return hdptx->hw_rate;
}
-static long rk_hdptx_phy_clk_round_rate(struct clk_hw *hw, unsigned long rate,
- unsigned long *parent_rate)
+static int rk_hdptx_phy_clk_determine_rate(struct clk_hw *hw,
+ struct clk_rate_request *req)
{
struct rk_hdptx_phy *hdptx = to_rk_hdptx_phy(hw);
@@ -1879,14 +1879,17 @@ static long rk_hdptx_phy_clk_round_rate(struct clk_hw *hw, unsigned long rate,
* To be dropped as soon as the RK DW HDMI QP bridge driver
* switches to make use of phy_configure().
*/
- if (!hdptx->restrict_rate_change && rate != hdptx->hdmi_cfg.tmds_char_rate) {
+ if (!hdptx->restrict_rate_change && req->rate != hdptx->hdmi_cfg.tmds_char_rate) {
struct phy_configure_opts_hdmi hdmi = {
- .tmds_char_rate = rate,
+ .tmds_char_rate = req->rate,
};
int ret = rk_hdptx_phy_verify_hdmi_config(hdptx, &hdmi);
- if (ret)
- return ret;
+ if (ret) {
+ req->rate = ret;
+
+ return 0;
+ }
hdptx->hdmi_cfg = hdmi;
}
@@ -1896,7 +1899,9 @@ static long rk_hdptx_phy_clk_round_rate(struct clk_hw *hw, unsigned long rate,
* hence ensure rk_hdptx_phy_clk_set_rate() won't be invoked with
* a different rate argument.
*/
- return hdptx->hdmi_cfg.tmds_char_rate;
+ req->rate = hdptx->hdmi_cfg.tmds_char_rate;
+
+ return 0;
}
static int rk_hdptx_phy_clk_set_rate(struct clk_hw *hw, unsigned long rate,
@@ -1925,7 +1930,7 @@ static const struct clk_ops hdptx_phy_clk_ops = {
.prepare = rk_hdptx_phy_clk_prepare,
.unprepare = rk_hdptx_phy_clk_unprepare,
.recalc_rate = rk_hdptx_phy_clk_recalc_rate,
- .round_rate = rk_hdptx_phy_clk_round_rate,
+ .determine_rate = rk_hdptx_phy_clk_determine_rate,
.set_rate = rk_hdptx_phy_clk_set_rate,
};
--
2.50.0
^ permalink raw reply related [flat|nested] 11+ messages in thread
* Re: [PATCH 8/9] phy: rockchip: phy-rockchip-samsung-hdptx: convert from round_rate() to determine_rate()
2025-07-10 16:07 ` [PATCH 8/9] phy: rockchip: phy-rockchip-samsung-hdptx: " Brian Masney
@ 2025-07-14 9:11 ` Cristian Ciocaltea
0 siblings, 0 replies; 11+ messages in thread
From: Cristian Ciocaltea @ 2025-07-14 9:11 UTC (permalink / raw)
To: Brian Masney, Vinod Koul, Kishon Vijay Abraham I, Chun-Kuang Hu,
Philipp Zabel, Chunfeng Yun, Matthias Brugger,
AngeloGioacchino Del Regno, Heiko Stuebner, Maxime Ripard,
Stephen Boyd
Cc: linux-clk, linux-phy, linux-kernel, dri-devel, linux-mediatek,
linux-arm-kernel, linux-rockchip
Hi Brian,
On 7/10/25 7:07 PM, Brian Masney wrote:
> The round_rate() clk ops is deprecated, so migrate this driver from
> round_rate() to determine_rate() using the Coccinelle semantic patch
> on the cover letter of this series.
>
> Signed-off-by: Brian Masney <bmasney@redhat.com>
> ---
> drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c | 21 +++++++++++++--------
> 1 file changed, 13 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c b/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c
> index 79db57ee90d1487b51f4ddadde870a275dd7b17b..f027d2caa4c2ebfc0fdec08bcebf3f415ff1a064 100644
> --- a/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c
> +++ b/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c
> @@ -1869,8 +1869,8 @@ static unsigned long rk_hdptx_phy_clk_recalc_rate(struct clk_hw *hw,
> return hdptx->hw_rate;
> }
>
> -static long rk_hdptx_phy_clk_round_rate(struct clk_hw *hw, unsigned long rate,
> - unsigned long *parent_rate)
> +static int rk_hdptx_phy_clk_determine_rate(struct clk_hw *hw,
> + struct clk_rate_request *req)
> {
> struct rk_hdptx_phy *hdptx = to_rk_hdptx_phy(hw);
>
> @@ -1879,14 +1879,17 @@ static long rk_hdptx_phy_clk_round_rate(struct clk_hw *hw, unsigned long rate,
> * To be dropped as soon as the RK DW HDMI QP bridge driver
> * switches to make use of phy_configure().
> */
> - if (!hdptx->restrict_rate_change && rate != hdptx->hdmi_cfg.tmds_char_rate) {
> + if (!hdptx->restrict_rate_change && req->rate != hdptx->hdmi_cfg.tmds_char_rate) {
> struct phy_configure_opts_hdmi hdmi = {
> - .tmds_char_rate = rate,
> + .tmds_char_rate = req->rate,
> };
> int ret = rk_hdptx_phy_verify_hdmi_config(hdptx, &hdmi);
>
> - if (ret)
> - return ret;
> + if (ret) {
> + req->rate = ret;
This is not quite right, since "ret" is expected to contain an error number,
typically -EINVAL.
> +
> + return 0;
We shall continue returning the error code here.
Regards,
Cristian
> + }
>
> hdptx->hdmi_cfg = hdmi;
> }
> @@ -1896,7 +1899,9 @@ static long rk_hdptx_phy_clk_round_rate(struct clk_hw *hw, unsigned long rate,
> * hence ensure rk_hdptx_phy_clk_set_rate() won't be invoked with
> * a different rate argument.
> */
> - return hdptx->hdmi_cfg.tmds_char_rate;
> + req->rate = hdptx->hdmi_cfg.tmds_char_rate;
> +
> + return 0;
> }
>
> static int rk_hdptx_phy_clk_set_rate(struct clk_hw *hw, unsigned long rate,
> @@ -1925,7 +1930,7 @@ static const struct clk_ops hdptx_phy_clk_ops = {
> .prepare = rk_hdptx_phy_clk_prepare,
> .unprepare = rk_hdptx_phy_clk_unprepare,
> .recalc_rate = rk_hdptx_phy_clk_recalc_rate,
> - .round_rate = rk_hdptx_phy_clk_round_rate,
> + .determine_rate = rk_hdptx_phy_clk_determine_rate,
> .set_rate = rk_hdptx_phy_clk_set_rate,
> };
>
>
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH 9/9] phy: ti: phy-j721e-wiz: convert from round_rate() to determine_rate()
2025-07-10 16:07 [PATCH 0/9] phy: convert from clk round_rate() to determine_rate() Brian Masney
` (7 preceding siblings ...)
2025-07-10 16:07 ` [PATCH 8/9] phy: rockchip: phy-rockchip-samsung-hdptx: " Brian Masney
@ 2025-07-10 16:07 ` Brian Masney
8 siblings, 0 replies; 11+ messages in thread
From: Brian Masney @ 2025-07-10 16:07 UTC (permalink / raw)
To: Vinod Koul, Kishon Vijay Abraham I, Chun-Kuang Hu, Philipp Zabel,
Chunfeng Yun, Matthias Brugger, AngeloGioacchino Del Regno,
Heiko Stuebner, Maxime Ripard, Stephen Boyd
Cc: linux-clk, linux-phy, linux-kernel, dri-devel, linux-mediatek,
linux-arm-kernel, linux-rockchip, Brian Masney
The round_rate() clk ops is deprecated, so migrate this driver from
round_rate() to determine_rate() using the Coccinelle semantic patch
on the cover letter of this series.
Signed-off-by: Brian Masney <bmasney@redhat.com>
---
drivers/phy/ti/phy-j721e-wiz.c | 11 +++++++----
1 file changed, 7 insertions(+), 4 deletions(-)
diff --git a/drivers/phy/ti/phy-j721e-wiz.c b/drivers/phy/ti/phy-j721e-wiz.c
index ab2a4f2c0a5bf3aa4b77045f4da8b0ddcc079f7a..12dafb2bd49bc33c13dd49246bc26df082e3dd40 100644
--- a/drivers/phy/ti/phy-j721e-wiz.c
+++ b/drivers/phy/ti/phy-j721e-wiz.c
@@ -934,12 +934,15 @@ static unsigned long wiz_clk_div_recalc_rate(struct clk_hw *hw,
return divider_recalc_rate(hw, parent_rate, val, div->table, 0x0, 2);
}
-static long wiz_clk_div_round_rate(struct clk_hw *hw, unsigned long rate,
- unsigned long *prate)
+static int wiz_clk_div_determine_rate(struct clk_hw *hw,
+ struct clk_rate_request *req)
{
struct wiz_clk_divider *div = to_wiz_clk_div(hw);
- return divider_round_rate(hw, rate, prate, div->table, 2, 0x0);
+ req->rate = divider_round_rate(hw, req->rate, &req->best_parent_rate,
+ div->table, 2, 0x0);
+
+ return 0;
}
static int wiz_clk_div_set_rate(struct clk_hw *hw, unsigned long rate,
@@ -958,7 +961,7 @@ static int wiz_clk_div_set_rate(struct clk_hw *hw, unsigned long rate,
static const struct clk_ops wiz_clk_div_ops = {
.recalc_rate = wiz_clk_div_recalc_rate,
- .round_rate = wiz_clk_div_round_rate,
+ .determine_rate = wiz_clk_div_determine_rate,
.set_rate = wiz_clk_div_set_rate,
};
--
2.50.0
^ permalink raw reply related [flat|nested] 11+ messages in thread