From: Brian Masney <bmasney@redhat.com>
To: Vinod Koul <vkoul@kernel.org>,
Kishon Vijay Abraham I <kishon@kernel.org>,
Chun-Kuang Hu <chunkuang.hu@kernel.org>,
Philipp Zabel <p.zabel@pengutronix.de>,
Chunfeng Yun <chunfeng.yun@mediatek.com>,
Matthias Brugger <matthias.bgg@gmail.com>,
AngeloGioacchino Del Regno
<angelogioacchino.delregno@collabora.com>,
Heiko Stuebner <heiko@sntech.de>,
Maxime Ripard <mripard@kernel.org>,
Stephen Boyd <sboyd@kernel.org>
Cc: linux-clk@vger.kernel.org, linux-phy@lists.infradead.org,
linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
linux-mediatek@lists.infradead.org,
linux-arm-kernel@lists.infradead.org,
linux-rockchip@lists.infradead.org,
Brian Masney <bmasney@redhat.com>
Subject: [PATCH 9/9] phy: ti: phy-j721e-wiz: convert from round_rate() to determine_rate()
Date: Thu, 10 Jul 2025 12:07:19 -0400 [thread overview]
Message-ID: <20250710-phy-clk-round-rate-v1-9-0ff274055e42@redhat.com> (raw)
In-Reply-To: <20250710-phy-clk-round-rate-v1-0-0ff274055e42@redhat.com>
The round_rate() clk ops is deprecated, so migrate this driver from
round_rate() to determine_rate() using the Coccinelle semantic patch
on the cover letter of this series.
Signed-off-by: Brian Masney <bmasney@redhat.com>
---
drivers/phy/ti/phy-j721e-wiz.c | 11 +++++++----
1 file changed, 7 insertions(+), 4 deletions(-)
diff --git a/drivers/phy/ti/phy-j721e-wiz.c b/drivers/phy/ti/phy-j721e-wiz.c
index ab2a4f2c0a5bf3aa4b77045f4da8b0ddcc079f7a..12dafb2bd49bc33c13dd49246bc26df082e3dd40 100644
--- a/drivers/phy/ti/phy-j721e-wiz.c
+++ b/drivers/phy/ti/phy-j721e-wiz.c
@@ -934,12 +934,15 @@ static unsigned long wiz_clk_div_recalc_rate(struct clk_hw *hw,
return divider_recalc_rate(hw, parent_rate, val, div->table, 0x0, 2);
}
-static long wiz_clk_div_round_rate(struct clk_hw *hw, unsigned long rate,
- unsigned long *prate)
+static int wiz_clk_div_determine_rate(struct clk_hw *hw,
+ struct clk_rate_request *req)
{
struct wiz_clk_divider *div = to_wiz_clk_div(hw);
- return divider_round_rate(hw, rate, prate, div->table, 2, 0x0);
+ req->rate = divider_round_rate(hw, req->rate, &req->best_parent_rate,
+ div->table, 2, 0x0);
+
+ return 0;
}
static int wiz_clk_div_set_rate(struct clk_hw *hw, unsigned long rate,
@@ -958,7 +961,7 @@ static int wiz_clk_div_set_rate(struct clk_hw *hw, unsigned long rate,
static const struct clk_ops wiz_clk_div_ops = {
.recalc_rate = wiz_clk_div_recalc_rate,
- .round_rate = wiz_clk_div_round_rate,
+ .determine_rate = wiz_clk_div_determine_rate,
.set_rate = wiz_clk_div_set_rate,
};
--
2.50.0
prev parent reply other threads:[~2025-07-10 16:08 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-07-10 16:07 [PATCH 0/9] phy: convert from clk round_rate() to determine_rate() Brian Masney
2025-07-10 16:07 ` [PATCH 1/9] phy: freescale: phy-fsl-samsung-hdmi: convert from " Brian Masney
2025-07-10 16:07 ` [PATCH 2/9] phy: mediatek: phy-mtk-hdmi-mt2701: " Brian Masney
2025-07-10 16:07 ` [PATCH 3/9] phy: mediatek: phy-mtk-hdmi-mt8173: " Brian Masney
2025-07-10 16:07 ` [PATCH 4/9] phy: mediatek: phy-mtk-hdmi-mt8195: " Brian Masney
2025-07-10 16:07 ` [PATCH 5/9] phy: mediatek: phy-mtk-mipi-dsi-mt8173: " Brian Masney
2025-07-10 16:07 ` [PATCH 6/9] phy: mediatek: phy-mtk-mipi-dsi-mt8183: " Brian Masney
2025-07-10 16:07 ` [PATCH 7/9] phy: rockchip: phy-rockchip-inno-hdmi: " Brian Masney
2025-07-10 16:07 ` [PATCH 8/9] phy: rockchip: phy-rockchip-samsung-hdptx: " Brian Masney
2025-07-14 9:11 ` Cristian Ciocaltea
2025-07-10 16:07 ` Brian Masney [this message]
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