From: kernel test robot <lkp@intel.com>
To: ksk4725@coasia.com, Jesper Nilsson <jesper.nilsson@axis.com>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Sylwester Nawrocki <s.nawrocki@samsung.com>,
Chanwoo Choi <cw00.choi@samsung.com>,
Alim Akhtar <alim.akhtar@samsung.com>,
Linus Walleij <linus.walleij@linaro.org>,
Tomasz Figa <tomasz.figa@gmail.com>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>, Arnd Bergmann <arnd@arndb.de>,
Ravi Patel <ravi.patel@samsung.com>,
SungMin Park <smn1196@coasia.com>
Cc: oe-kbuild-all@lists.linux.dev, kenkim <kenkim@coasia.com>,
Jongshin Park <pjsin865@coasia.com>,
GunWoo Kim <gwk1013@coasia.com>,
HaGyeong Kim <hgkim05@coasia.com>,
GyoungBo Min <mingyoungbo@coasia.com>,
Pankaj Dubey <pankaj.dubey@samsung.com>,
Shradha Todi <shradha.t@samsung.com>,
Inbaraj E <inbaraj.e@samsung.com>,
Swathi K S <swathi.ks@samsung.com>,
Hrishikesh <hrishikesh.d@samsung.com>,
Dongjin Yang <dj76.yang@samsung.com>,
Sang Min Kim <hypmean.kim@samsung.com>,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH 05/16] clk: samsung: artpec-8: Add clock support for CMU_CMU block
Date: Fri, 11 Jul 2025 06:55:17 +0800 [thread overview]
Message-ID: <202507110637.uCFXqy3U-lkp@intel.com> (raw)
In-Reply-To: <20250710002047.1573841-6-ksk4725@coasia.com>
Hi,
kernel test robot noticed the following build warnings:
[auto build test WARNING on krzk/for-next]
[also build test WARNING on robh/for-next pinctrl-samsung/for-next linus/master v6.16-rc5 next-20250710]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/ksk4725-coasia-com/dt-bindings-clock-Add-CMU-bindings-definitions-for-ARTPEC-8-platform/20250710-082940
base: https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux.git for-next
patch link: https://lore.kernel.org/r/20250710002047.1573841-6-ksk4725%40coasia.com
patch subject: [PATCH 05/16] clk: samsung: artpec-8: Add clock support for CMU_CMU block
config: loongarch-allyesconfig (https://download.01.org/0day-ci/archive/20250711/202507110637.uCFXqy3U-lkp@intel.com/config)
compiler: clang version 21.0.0git (https://github.com/llvm/llvm-project 01c97b4953e87ae455bd4c41e3de3f0f0f29c61c)
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20250711/202507110637.uCFXqy3U-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202507110637.uCFXqy3U-lkp@intel.com/
All warnings (new ones prefixed by >>):
>> drivers/clk/samsung/clk-artpec8.c:201:7: warning: unused variable 'mout_clkcmu_fsys_sfmc_p' [-Wunused-const-variable]
201 | PNAME(mout_clkcmu_fsys_sfmc_p) = {
| ^~~~~~~~~~~~~~~~~~~~~~~
1 warning generated.
vim +/mout_clkcmu_fsys_sfmc_p +201 drivers/clk/samsung/clk-artpec8.c
179
180 PNAME(mout_clkcmu_bus_bus_p) = {
181 "dout_pll_shared1_div2", "dout_pll_shared0_div3",
182 "dout_pll_shared1_div3", "dout_pll_shared1_div4" };
183 PNAME(mout_clkcmu_bus_dlp_p) = {
184 "dout_pll_shared0_div2", "dout_pll_shared0_div4",
185 "dout_pll_shared1_div2", "dout_pll_shared1_div4" };
186 PNAME(mout_clkcmu_core_bus_p) = {
187 "dout_pll_shared1_div2", "dout_pll_shared0_div3",
188 "dout_pll_shared0_div4", "dout_pll_shared1_div3" };
189 PNAME(mout_clkcmu_core_dlp_p) = {
190 "dout_pll_shared0_div2", "dout_pll_sahred1_div2",
191 "dout_pll_shared0_div3", "dout_pll_shared1_div3" };
192 PNAME(mout_clkcmu_cpucl_switch_p) = {
193 "dout_pll_shared0_div2", "dout_pll_shared1_div2",
194 "dout_pll_shared0_div3", "dout_pll_shared1_div3" };
195 PNAME(mout_clkcmu_fsys_bus_p) = {
196 "dout_pll_shared1_div2", "dout_pll_shared0_div2",
197 "dout_pll_shared1_div4", "dout_pll_shared1_div3" };
198 PNAME(mout_clkcmu_fsys_ip_p) = {
199 "dout_pll_shared0_div2", "dout_pll_shared1_div3",
200 "dout_pll_shared1_div2", "dout_pll_shared0_div3" };
> 201 PNAME(mout_clkcmu_fsys_sfmc_p) = {
202 "dout_pll_shared1_div3", "dout_pll_shared0_div2",
203 "dout_pll_shared1_div2", "dout_pll_shared0_div3" };
204 PNAME(mout_clkcmu_fsys_scan0_p) = {
205 "dout_pll_shared0_div4", "dout_pll_shared1_div4" };
206 PNAME(mout_clkcmu_fsys_scan1_p) = {
207 "dout_pll_shared0_div4", "dout_pll_shared1_div4" };
208 PNAME(mout_clkcmu_imem_imem_p) = {
209 "dout_pll_shared1_div4", "dout_pll_shared0_div3",
210 "dout_pll_shared1_div3", "dout_pll_shared1_div2" };
211 PNAME(mout_clkcmu_imem_jpeg_p) = {
212 "dout_pll_shared0_div2", "dout_pll_shared0_div3",
213 "dout_pll_shared1_div2", "dout_pll_shared1_div3" };
214 PNAME(mout_clkcmu_cdc_core_p) = {
215 "dout_pll_shared1_div2", "dout_pll_shared0_div3",
216 "dout_pll_shared1_div3", "dout_pll_shared1_div4" };
217 PNAME(mout_clkcmu_dlp_core_p) = {
218 "dout_pll_shared0_div2", "dout_pll_shared1_div2",
219 "dout_pll_shared0_div3", "dout_pll_shared1_div3" };
220 PNAME(mout_clkcmu_3d_p) = {
221 "dout_pll_shared0_div2", "dout_pll_shared1_div2",
222 "dout_pll_shared0_div3", "dout_pll_shared1_div3" };
223 PNAME(mout_clkcmu_2d_p) = {
224 "dout_pll_shared0_div2", "dout_pll_shared1_div2",
225 "dout_pll_shared0_div3", "dout_pll_shared1_div3" };
226 PNAME(mout_clkcmu_mif_switch_p) = {
227 "dout_pll_shared0", "dout_pll_shared1",
228 "dout_pll_shared0_div2", "dout_pll_shared0_div3" };
229 PNAME(mout_clkcmu_mif_busp_p) = {
230 "dout_pll_shared0_div3", "dout_pll_shared1_div4",
231 "dout_pll_shared0_div4", "dout_pll_shared0_div2" };
232 PNAME(mout_clkcmu_peri_disp_p) = {
233 "dout_pll_shared1_div2", "dout_pll_shared0_div2",
234 "dout_pll_shared1_div4", "dout_pll_shared1_div3" };
235 PNAME(mout_clkcmu_peri_ip_p) = {
236 "dout_pll_shared1_div2", "dout_pll_shared0_div4",
237 "dout_pll_shared1_div4", "dout_pll_shared0_div2" };
238 PNAME(mout_clkcmu_rsp_core_p) = {
239 "dout_pll_shared1_div2", "dout_pll_shared0_div3",
240 "dout_pll_shared1_div3", "dout_pll_shared1_div4" };
241 PNAME(mout_clkcmu_trfm_core_p) = {
242 "dout_pll_shared1_div2", "dout_pll_shared0_div3",
243 "dout_pll_shared1_div3", "dout_pll_shared1_div4" };
244 PNAME(mout_clkcmu_vca_ace_p) = {
245 "dout_pll_shared1_div2", "dout_pll_shared0_div3",
246 "dout_pll_shared1_div3", "dout_pll_shared1_div4" };
247 PNAME(mout_clkcmu_vca_od_p) = {
248 "dout_pll_shared1_div2", "dout_pll_shared0_div3",
249 "dout_pll_shared1_div3", "dout_pll_shared1_div4" };
250 PNAME(mout_clkcmu_vio_core_p) = {
251 "dout_pll_shared0_div3", "dout_pll_shared0_div2",
252 "dout_pll_shared1_div2", "dout_pll_shared1_div3" };
253 PNAME(mout_clkcmu_vip0_core_p) = {
254 "dout_pll_shared1_div2", "dout_pll_shared0_div3",
255 "dout_pll_shared1_div3", "dout_pll_shared1_div4" };
256 PNAME(mout_clkcmu_vip1_core_p) = {
257 "dout_pll_shared1_div2", "dout_pll_shared0_div3",
258 "dout_pll_shared1_div3", "dout_pll_shared1_div4" };
259 PNAME(mout_clkcmu_vpp_core_p) = {
260 "dout_pll_shared1_div2", "dout_pll_shared0_div3",
261 "dout_pll_shared1_div3", "dout_pll_shared1_div4" };
262 PNAME(mout_clkcmu_pll_shared0_p) = { "fin_pll", "fout_pll_shared0" };
263 PNAME(mout_clkcmu_pll_shared1_p) = { "fin_pll", "fout_pll_shared1" };
264 PNAME(mout_clkcmu_pll_audio_p) = { "fin_pll", "fout_pll_audio" };
265
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
next prev parent reply other threads:[~2025-07-10 22:56 UTC|newest]
Thread overview: 69+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-07-10 0:20 [PATCH 00/16] Add support for the Axis ARTPEC-8 SoC ksk4725
2025-07-10 0:20 ` [PATCH 01/16] dt-bindings: clock: Add CMU bindings definitions for ARTPEC-8 platform ksk4725
2025-07-10 7:07 ` Krzysztof Kozlowski
2025-07-21 4:31 ` Hakyeong Kim
2025-07-10 0:20 ` [PATCH 02/16] dt-bindings: clock: Add ARTPEC-8 CMU bindings ksk4725
2025-07-10 7:10 ` Krzysztof Kozlowski
2025-07-21 4:31 ` Hakyeong Kim
2025-07-10 0:20 ` [PATCH 03/16] clk: samsung: Add clock PLL support for ARTPEC-8 SoC ksk4725
2025-07-10 0:20 ` [PATCH 04/16] clk: samsung: artpec-8: Add initial clock support ksk4725
2025-07-10 7:12 ` Krzysztof Kozlowski
2025-07-21 4:32 ` Hakyeong Kim
2025-07-10 0:20 ` [PATCH 05/16] clk: samsung: artpec-8: Add clock support for CMU_CMU block ksk4725
2025-07-10 22:55 ` kernel test robot [this message]
2025-07-10 0:20 ` [PATCH 06/16] clk: samsung: artpec-8: Add clock support for CMU_BUS block ksk4725
2025-07-10 0:20 ` [PATCH 07/16] clk: samsung: artpec-8: Add clock support for CMU_CORE block ksk4725
2025-07-10 0:20 ` [PATCH 08/16] clk: samsung: artpec-8: Add clock support for CMU_CPUCL block ksk4725
2025-07-10 0:20 ` [PATCH 09/16] clk: samsung: artpec-8: Add clock support for CMU_FSYS block ksk4725
2025-07-10 0:20 ` [PATCH 10/16] clk: samsung: artpec-8: Add clock support for CMU_PERI block ksk4725
2025-07-10 7:13 ` Krzysztof Kozlowski
2025-07-21 4:32 ` Hakyeong Kim
2025-07-10 0:20 ` [PATCH 11/16] dt-bindings: pinctrl: samsung: Add compatible for ARTPEC-8 SoC ksk4725
2025-07-10 0:20 ` [PATCH 12/16] pinctrl: samsung: Add ARTPEC-8 SoC specific configuration ksk4725
2025-07-10 0:20 ` [PATCH 13/16] dt-bindings: arm: Add Axis ARTPEC SoC platform ksk4725
2025-07-10 7:15 ` Krzysztof Kozlowski
2025-07-21 6:36 ` sungmin
2025-07-10 0:20 ` [PATCH 14/16] arm64: dts: axis: Add initial device tree support ksk4725
2025-07-10 7:02 ` Krzysztof Kozlowski
2025-07-21 7:08 ` sungmin park
2025-07-21 7:17 ` Krzysztof Kozlowski
2025-07-10 7:48 ` Arnd Bergmann
2025-07-10 10:14 ` Krzysztof Kozlowski
2025-07-10 0:20 ` [PATCH 15/16] arm64: dts: axis: Add initial pinctrl support ksk4725
2025-07-10 7:04 ` Krzysztof Kozlowski
2025-07-21 4:48 ` SeonGu Kang
2025-07-10 0:20 ` [PATCH 16/16] arm64: defconfig: Enable Axis ARTPEC SoC ksk4725
2025-07-10 7:07 ` [PATCH 00/16] Add support for the Axis ARTPEC-8 SoC Krzysztof Kozlowski
2025-07-21 4:50 ` SeonGu Kang
2025-07-21 6:39 ` Krzysztof Kozlowski
2025-08-06 8:22 ` Pankaj Dubey
2025-08-06 8:36 ` Krzysztof Kozlowski
2025-08-06 9:05 ` Pankaj Dubey
2025-08-06 9:23 ` Krzysztof Kozlowski
2025-08-06 15:42 ` Arnd Bergmann
2025-08-07 6:56 ` Pankaj Dubey
2025-08-08 13:18 ` 'Jesper Nilsson'
2025-07-12 19:26 ` Linus Walleij
2025-07-21 4:32 ` Hakyeong Kim
[not found] ` <CGME20250821124014epcas5p12bacab10aac378f8d011fe7d2e04c8fa@epcas5p1.samsung.com>
2025-08-21 12:32 ` [PATCH v2 00/10] " Ravi Patel
[not found] ` <CGME20250821124019epcas5p42ac6e6abe1d3c8c9d69331596e51ad48@epcas5p4.samsung.com>
2025-08-21 12:32 ` [PATCH v2 01/10] dt-bindings: clock: Add ARTPEC-8 clock controller Ravi Patel
2025-08-22 19:39 ` Rob Herring (Arm)
[not found] ` <CGME20250821124024epcas5p349dda3c9e0523cc07acf2889476beeb1@epcas5p3.samsung.com>
2025-08-21 12:32 ` [PATCH v2 02/10] clk: samsung: Add clock PLL support for ARTPEC-8 SoC Ravi Patel
2025-08-22 6:32 ` Krzysztof Kozlowski
2025-08-22 12:08 ` Ravi Patel
[not found] ` <CGME20250821124029epcas5p1f04c643c243a7d388492b46341fb3c74@epcas5p1.samsung.com>
2025-08-21 12:32 ` [PATCH v2 03/10] clk: samsung: artpec-8: Add initial clock " Ravi Patel
[not found] ` <CGME20250821124034epcas5p350aeb42b9065fcbc3d9f713df1649574@epcas5p3.samsung.com>
2025-08-21 12:32 ` [PATCH v2 04/10] dt-bindings: pinctrl: samsung: Add compatible " Ravi Patel
2025-08-22 19:40 ` Rob Herring (Arm)
[not found] ` <CGME20250821124039epcas5p34b77813c9936b8b70c801e0e1b67891a@epcas5p3.samsung.com>
2025-08-21 12:32 ` [PATCH v2 05/10] pinctrl: samsung: Add ARTPEC-8 SoC specific configuration Ravi Patel
2025-08-21 16:50 ` Linus Walleij
[not found] ` <CGME20250821124045epcas5p37f0a50fb18e6f468a7c57ab406795419@epcas5p3.samsung.com>
2025-08-21 12:32 ` [PATCH v2 06/10] dt-bindings: arm: Convert Axis board/soc bindings to json-schema Ravi Patel
2025-08-22 19:41 ` Rob Herring (Arm)
[not found] ` <CGME20250821124050epcas5p22b08f66c69633f10986b7c19b3cd8cb4@epcas5p2.samsung.com>
2025-08-21 12:32 ` [PATCH v2 07/10] dt-bindings: arm: axis: Add ARTPEC-8 grizzly board Ravi Patel
2025-08-22 19:41 ` Rob Herring (Arm)
[not found] ` <CGME20250821124055epcas5p4d1072e9b4ef29587e0fd8606bc1abc4f@epcas5p4.samsung.com>
2025-08-21 12:32 ` [PATCH v2 08/10] arm64: dts: exynos: axis: Add initial ARTPEC-8 SoC support Ravi Patel
2025-08-22 6:38 ` Krzysztof Kozlowski
2025-08-22 11:48 ` Ravi Patel
[not found] ` <CGME20250821124100epcas5p42f719e140529823d9408b7325c646bbf@epcas5p4.samsung.com>
2025-08-21 12:32 ` [PATCH v2 09/10] arm64: dts: axis: Add ARTPEC-8 Grizzly dts support Ravi Patel
[not found] ` <CGME20250821124105epcas5p402a0f6ec6a893d0e5e305547976e4c80@epcas5p4.samsung.com>
2025-08-21 12:32 ` [PATCH v2 10/10] arm64: defconfig: Enable Axis ARTPEC SoC Ravi Patel
2025-08-22 6:26 ` [PATCH v2 00/10] Add support for the Axis ARTPEC-8 SoC Krzysztof Kozlowski
2025-08-22 11:50 ` Ravi Patel
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