From: Bjorn Helgaas <helgaas@kernel.org>
To: manivannan.sadhasivam@oss.qualcomm.com,
"Rafael J. Wysocki" <rafael@kernel.org>
Cc: "Jeff Johnson" <jjohnson@kernel.org>,
"Manivannan Sadhasivam" <mani@kernel.org>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kwilczynski@kernel.org>,
"Rob Herring" <robh@kernel.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Nirmal Patel" <nirmal.patel@linux.intel.com>,
"Jonathan Derrick" <jonathan.derrick@linux.dev>,
linux-wireless@vger.kernel.org, linux-kernel@vger.kernel.org,
ath12k@lists.infradead.org, ath11k@lists.infradead.org,
ath10k@lists.infradead.org, ilpo.jarvinen@linux.intel.com,
linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org,
"Krishna Chaitanya Chundru" <krishna.chundru@oss.qualcomm.com>
Subject: Re: [PATCH 2/6] PCI/ASPM: Transition the device to D0 (if required) inside pci_enable_link_state_locked() API
Date: Wed, 16 Jul 2025 15:56:01 -0500 [thread overview]
Message-ID: <20250716205601.GA2555277@bhelgaas> (raw)
In-Reply-To: <20250716-ath-aspm-fix-v1-2-dd3e62c1b692@oss.qualcomm.com>
On Wed, Jul 16, 2025 at 06:26:21PM +0530, Manivannan Sadhasivam via B4 Relay wrote:
> From: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
>
> Both of the current callers of the pci_enable_link_state_locked() API
> transition the device to D0 before calling. This aligns with the PCIe spec
> r6.0, sec 5.5.4:
>
> "If setting either or both of the enable bits for PCI-PM L1 PM Substates,
> both ports must be configured as described in this section while in D0."
>
> But it looks redundant to let the callers transition the device to D0. So
> move the logic inside the API and perform D0 transition only if the PCI-PM
> L1 Substates are getting enabled.
> +++ b/drivers/pci/pcie/aspm.c
> @@ -1474,13 +1474,20 @@ static int __pci_enable_link_state(struct pci_dev *pdev, int state, bool locked)
> * Note that if the BIOS didn't grant ASPM control to the OS, this does
> * nothing because we can't touch the LNKCTL register.
> *
> - * Note: Ensure devices are in D0 before enabling PCI-PM L1 PM Substates, per
> - * PCIe r6.0, sec 5.5.4.
> + * Note: The device will be transitioned to D0 state if the PCI-PM L1 Substates
> + * are getting enabled.
> *
> * Return: 0 on success, a negative errno otherwise.
> */
> int pci_enable_link_state(struct pci_dev *pdev, int state)
> {
> + /*
> + * Ensure the device is in D0 before enabling PCI-PM L1 PM Substates, per
> + * PCIe r6.0, sec 5.5.4.
> + */
> + if (FIELD_GET(PCIE_LINK_STATE_L1_SS_PCIPM, state))
> + pci_set_power_state(pdev, PCI_D0);
This is really just a move, not new code, but this niggles at me a
little bit because my impression is that pci_set_power_state() doesn't
guarantee that the device *stays* in the given state.
Rafael, is there a get/put interface we should be wrapping this with
instead?
I'm also not sure it's worth the FIELD_GET(). This should be a
low-frequency operation and making the power state dependent on the
exact "state" makes more paths to worry about.
> return __pci_enable_link_state(pdev, state, false);
> }
next prev parent reply other threads:[~2025-07-16 20:56 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-07-16 12:56 [PATCH 0/6] PCI/ASPM: Fix pci_enable_link_state*() APIs behavior Manivannan Sadhasivam via B4 Relay
2025-07-16 12:56 ` [PATCH 1/6] PCI/ASPM: Fix the behavior of pci_enable_link_state*() APIs Manivannan Sadhasivam via B4 Relay
2025-07-16 12:56 ` [PATCH 2/6] PCI/ASPM: Transition the device to D0 (if required) inside pci_enable_link_state_locked() API Manivannan Sadhasivam via B4 Relay
2025-07-16 20:56 ` Bjorn Helgaas [this message]
2025-07-17 7:36 ` Manivannan Sadhasivam
2025-07-16 12:56 ` [PATCH 3/6] PCI/ASPM: Improve the kernel-doc for pci_disable_link_state*() APIs Manivannan Sadhasivam via B4 Relay
2025-07-16 12:56 ` [PATCH 4/6] wifi: ath12k: Use pci_{enable/disable}_link_state() APIs to enable/disable ASPM states Manivannan Sadhasivam via B4 Relay
2025-07-17 6:59 ` kernel test robot
2025-07-18 8:22 ` Manivannan Sadhasivam
2025-07-17 9:24 ` Baochen Qiang
2025-07-17 10:31 ` Manivannan Sadhasivam
2025-07-17 10:46 ` Baochen Qiang
2025-07-17 10:55 ` Konrad Dybcio
2025-07-17 10:59 ` Baochen Qiang
2025-07-17 11:29 ` Manivannan Sadhasivam
2025-07-18 2:05 ` Baochen Qiang
2025-07-18 7:57 ` Manivannan Sadhasivam
2025-07-18 8:03 ` Krishna Chaitanya Chundru
2025-07-18 8:12 ` Manivannan Sadhasivam
2025-07-18 8:17 ` Krishna Chaitanya Chundru
2025-07-18 10:20 ` Manivannan Sadhasivam
2025-07-18 11:05 ` Baochen Qiang
2025-07-18 11:49 ` Manivannan Sadhasivam
2025-07-18 16:26 ` Bjorn Helgaas
2025-07-18 17:19 ` Manivannan Sadhasivam
2025-07-21 8:04 ` Ilpo Järvinen
2025-07-21 8:29 ` Manivannan Sadhasivam
2025-07-21 10:09 ` Ilpo Järvinen
2025-07-21 11:08 ` Manivannan Sadhasivam
2025-07-21 11:28 ` Ilpo Järvinen
2025-08-07 10:03 ` Manivannan Sadhasivam
2025-07-16 12:56 ` [PATCH 5/6] wifi: ath11k: " Manivannan Sadhasivam via B4 Relay
2025-07-16 12:56 ` [PATCH 6/6] wifi: ath10k: " Manivannan Sadhasivam via B4 Relay
2025-07-16 17:11 ` [PATCH 0/6] PCI/ASPM: Fix pci_enable_link_state*() APIs behavior Jeff Johnson
2025-07-18 7:58 ` Manivannan Sadhasivam
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