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[199.106.103.254]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-23e3b5e3cb7sm2002195ad.17.2025.07.17.16.28.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 17 Jul 2025 16:28:49 -0700 (PDT) From: Jessica Zhang Subject: [PATCH v3 0/5] dt-bindings: msm/dp: Add support for 4 pixel streams Date: Thu, 17 Jul 2025 16:28:42 -0700 Message-Id: <20250717-dp_mst_bindings-v3-0-72ce08285703@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit X-B4-Tracking: v=1; b=H4sIACqHeWgC/3XNSwqDMBCA4atI1o3EPGztynuUIjEPHaiJGpUW8 e6Nlq5KNwP/wHyzomBGMAFdkxWNZoEA3sVgpwSpVrrGYNCxESWUZ3Fg3VddmKoanAbXBHwWLLd WFdJQi+JVPxoLz0O83WO3ECY/vo4HS7Zv/1tLhgkuZCE5q0lOuSyHGRQ4lSrfoV1b6FcQRDDyK 9Ao2IIKnnPNqLyUPoR0mOUjCt2H2bbtDfDZEZ33AAAA X-Change-ID: 20241202-dp_mst_bindings-7536ffc9ae2f To: Abhinav Kumar , Dmitry Baryshkov , Sean Paul , Marijn Suijten , David Airlie , Simona Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Kuogee Hsieh , Abel Vesa , Bjorn Andersson , Michael Turquette , Stephen Boyd , Mahadevan , Krishna Manikandan , Konrad Dybcio , Rob Clark , Abhinav Kumar , Jessica Zhang , Danila Tikhonov , cros-qcom-dts-watchers@chromium.org, Rob Clark Cc: Abhinav Kumar , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, Krzysztof Kozlowski , Yongxing Mou X-Mailer: b4 0.15-dev-a9b2a X-Developer-Signature: v=1; a=ed25519-sha256; t=1752794927; l=3202; i=jessica.zhang@oss.qualcomm.com; s=20230329; h=from:subject:message-id; bh=NTksIiK3ILvCnqxlzcFH7JIUO55H2AfzNNjxdbfSZtE=; b=q2mx7f+qusw7faryQbddFyq4FuzXuMHpT5OooNTFj/X3U+tTXQnAe8M55ksS7d0HsbtyMF3nM +fnjv8H99+WCMgk7Jy7sQWsQQjD/gYCOtdZ/IG61OB+HNzVMJw3mpu/ X-Developer-Key: i=jessica.zhang@oss.qualcomm.com; a=ed25519; pk=gAUCgHZ6wTJOzQa3U0GfeCDH7iZLlqIEPo4rrjfDpWE= X-Proofpoint-ORIG-GUID: GGkRgKpNZRmtFe1NV7x8N-DNkTTiea-n X-Authority-Analysis: v=2.4 cv=D4xHKuRj c=1 sm=1 tr=0 ts=68798733 cx=c_pps a=vVfyC5vLCtgYJKYeQD43oA==:117 a=JYp8KDb2vCoCEuGobkYCKw==:17 a=IkcTkHD0fZMA:10 a=Wb1JkmetP80A:10 a=VwQbUJbxAAAA:8 a=EUspDBNiAAAA:8 a=COk6AnOGAAAA:8 a=HrLnuC2iPlrUScbyRF0A:9 a=QEXdDO2ut3YA:10 a=rl5im9kqc5Lf4LNbBjHf:22 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-GUID: GGkRgKpNZRmtFe1NV7x8N-DNkTTiea-n X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwNzE3MDIwNiBTYWx0ZWRfX/ADgU3+zQs0w owuYaZ0bgBASH5qQqiM8mmcDtR84UATQK0OXECT9m1A0X07FUW8NxBUErcMOnYT3sU1ergiZulp p+0SyirxI3sRiVuzgE/HsN2kj4qRC/GD3/3pNX1IZp2eMxkgoxklLtabkilNHdiMuoD2SzNWC95 +71oCRZccDkZaMM/pwR5nyRome/DCgFwuq0XN1erUIBuo3LHlp+g3bkQ8U9nuwBGsBsXCG3JAbm 3H9lIpvg0vrXsOSHSXqvz5axkMJaEb7a9hXLwnxK9XvLy34vmJeKZO0w/XM93DwpUxz038FpgRb IFx9uOtsgku7FylD0T4rXnsfZxDWeyJS7OY6wtuI+ovpO4n/7IqQqLMdzIHfq+sMy5I8yXhzxCZ W9ZwWuZIwjcgo7DqLrndahn5bx5QIuV7wupFVbGKhOjJrZSO6oIBsK3q/WUc/w+V5b07FyQ7 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-07-17_04,2025-07-17_02,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 mlxlogscore=790 impostorscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 malwarescore=0 suspectscore=0 bulkscore=0 mlxscore=0 priorityscore=1501 phishscore=0 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2505280000 definitions=main-2507170206 On some MSM chipsets, the display port controller is capable of supporting up to 4 streams. To drive these additional streams, the pixel clocks for the corresponding stream needs to be enabled. Fixup the documentation of some of the bindings to clarify exactly which stream they correspond to, then add the new bindings and device tree changes. --- Changes in v3: - Fixed dtschema errors (Rob Herring) - Documented all pixel stream clocks (Dmitry) - Ordered compatibility list alphabetically (Dmitry) - Dropped assigned-clocks too (Dmitry) - Link to v2: https://lore.kernel.org/r/20250530-dp_mst_bindings-v2-0-f925464d32a8@oss.qualcomm.com Changes in v2: - Rebased on top of next-20250523 - Dropped merged maintainer patch - Added a patch to make the corresponding dts change to add pixel 1 stream - Squashed pixel 0 and pixel 1 stream binding patches (Krzysztof) - Drop assigned-clock-parents bindings for dp-controller (Krzysztof) - Updated dp-controller.yaml to include all chipsets that support stream 1 pixel clock (Krzysztof) - Added missing minItems and if statement (Krzysztof) - Link to v1: https://lore.kernel.org/r/20241202-dp_mst_bindings-v1-0-9a9a43b0624a@quicinc.com --- Abhinav Kumar (4): dt-bindings: Fixup x1e80100 to add DP MST support dt-bindings: clock: Add SC7280 DISPCC DP pixel 1 clock binding dt-bindings: display/msm: drop assigned-clock-parents for dp controller dt-bindings: display/msm: add stream pixel clock bindings for MST Jessica Zhang (1): arm64: dts: qcom: Add MST pixel streams for displayport .../bindings/display/msm/dp-controller.yaml | 53 +++++++++++----- .../bindings/display/msm/qcom,sa8775p-mdss.yaml | 14 +++-- .../bindings/display/msm/qcom,sar2130p-mdss.yaml | 11 ++-- .../bindings/display/msm/qcom,sc7180-mdss.yaml | 3 - .../bindings/display/msm/qcom,sc7280-mdss.yaml | 12 ++-- .../bindings/display/msm/qcom,sm7150-mdss.yaml | 5 -- .../bindings/display/msm/qcom,sm8750-mdss.yaml | 11 ++-- .../bindings/display/msm/qcom,x1e80100-mdss.yaml | 21 +++---- arch/arm64/boot/dts/qcom/sa8775p.dtsi | 34 +++++++--- arch/arm64/boot/dts/qcom/sar2130p.dtsi | 10 ++- arch/arm64/boot/dts/qcom/sc7280.dtsi | 10 ++- arch/arm64/boot/dts/qcom/sc8180x.dtsi | 20 ++++-- arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 72 +++++++++++++++------- arch/arm64/boot/dts/qcom/sm8150.dtsi | 10 ++- arch/arm64/boot/dts/qcom/sm8250.dtsi | 10 ++- arch/arm64/boot/dts/qcom/sm8350.dtsi | 10 ++- arch/arm64/boot/dts/qcom/sm8450.dtsi | 10 ++- arch/arm64/boot/dts/qcom/sm8550.dtsi | 10 ++- arch/arm64/boot/dts/qcom/sm8650.dtsi | 10 ++- arch/arm64/boot/dts/qcom/x1e80100.dtsi | 30 ++++++--- include/dt-bindings/clock/qcom,dispcc-sc7280.h | 2 + 21 files changed, 235 insertions(+), 133 deletions(-) --- base-commit: 7a88d609b069b7d2f4d10113b18fea02921bedb1 change-id: 20241202-dp_mst_bindings-7536ffc9ae2f Best regards, -- Jessica Zhang