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IFPC enables GMU to quickly transition GPU into a low power state when idle and quickly resume gpu to active state upon workload submission, hence the name 'Inter Frame Power Collapse'. Since the KMD is unaware of these transitions, it must perform a handshake with the hardware (eg: fenced_write, OOB signaling etc) before accessing registers in the GX power domain. Initial patches address a few existing issues that were not exposed in the absence of IFPC. With IFPC, msm_devfreq_idle becomes redundant and therefore it is disabled for GPUs that support this feature. Additionally, the DCVS tunings have been relaxed for GPUs with IFPC support to further improve power savings. This series also adds the necessary restore register list for X1-85 GPU and enables IFPC support for it. To: Rob Clark To: Sean Paul To: Konrad Dybcio To: Dmitry Baryshkov To: Abhinav Kumar To: Jessica Zhang To: Marijn Suijten To: David Airlie To: Simona Vetter Cc: linux-arm-msm@vger.kernel.org Cc: dri-devel@lists.freedesktop.org Cc: freedreno@lists.freedesktop.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Akhil P Oommen --- Akhil P Oommen (17): drm/msm: Update GMU register xml drm/msm: a6xx: Refactor a6xx_sptprac_enable() drm/msm: a6xx: Fix gx_is_on check for a7x family drm/msm/a6xx: Poll additional DRV status drm/msm/a6xx: Fix PDC sleep sequence drm/msm: Add an ftrace for gpu register access drm/msm/adreno: Add fenced regwrite support drm/msm/a6xx: Set Keep-alive votes to block IFPC drm/msm/a6xx: Switch to GMU AO counter drm/msm/a6xx: Poll AHB fence status in GPU IRQ handler drm/msm: Add support for IFPC drm/msm: Skip devfreq IDLE when possible drm/msm/a6xx: Fix hangcheck for IFPC drm/msm/adreno: Disable IFPC when sysprof is active drm/msm/a6xx: Make crashstate capture IFPC safe drm/msm/a6xx: Enable IFPC on Adreno X1-85 drm/msm/adreno: Relax devfreq tunings drivers/gpu/drm/msm/adreno/a6xx_catalog.c | 67 ++++++- drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 107 ++++++++++-- drivers/gpu/drm/msm/adreno/a6xx_gmu.h | 11 ++ drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 203 ++++++++++++++++++---- drivers/gpu/drm/msm/adreno/a6xx_gpu.h | 3 + drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c | 10 +- drivers/gpu/drm/msm/adreno/a6xx_hfi.c | 33 +++- drivers/gpu/drm/msm/adreno/a6xx_preempt.c | 40 +++-- drivers/gpu/drm/msm/adreno/adreno_gpu.h | 1 + drivers/gpu/drm/msm/msm_gpu.h | 9 + drivers/gpu/drm/msm/msm_gpu_devfreq.c | 13 ++ drivers/gpu/drm/msm/msm_gpu_trace.h | 12 ++ drivers/gpu/drm/msm/msm_submitqueue.c | 4 + drivers/gpu/drm/msm/registers/adreno/a6xx_gmu.xml | 11 ++ 14 files changed, 449 insertions(+), 75 deletions(-) --- base-commit: 88bf743cabe5793d24f831ef8240a0bf90e5fd44 change-id: 20241216-ifpc-support-3b80167b3532 Best regards, -- Akhil P Oommen