From: Inochi Amaoto <inochiama@gmail.com>
To: Thomas Gleixner <tglx@linutronix.de>,
Chen Wang <unicorn_wang@outlook.com>
Cc: Inochi Amaoto <inochiama@gmail.com>, linux-kernel@vger.kernel.org
Subject: Affinity setting problem for emulated MSI on PLIC
Date: Wed, 23 Jul 2025 06:45:11 +0800 [thread overview]
Message-ID: <20250722224513.22125-1-inochiama@gmail.com> (raw)
SG2044 and SG2042 has a msi controller that converts the PLIC interrupt
to a MSI one. It works at the most case, but failed when probing NVME.
The driver complains "nvme nvme0: I/O tag XXX (XXX) QID XX timeout,
completion polled". After some test, I found this is caused by some
broken interrupt, which is disable on the underlying PLIC chip after
setting affinity. As the MSI chip does not have a enable function,
irq_startup only calls irq_unmask. This make the underlying interrupt
at PLIC is not enabled.
I have done a hack by changing the mask/unmask to disable/enable and
setting MSI_FLAG_PCI_MSI_MASK_PARENT to solve this and it works.
But I wonder whether there is something better to solve this problem?
(The hack I have done is at the end of mail)
Regards,
Inochi
diff --git a/drivers/irqchip/irq-sg2042-msi.c b/drivers/irqchip/irq-sg2042-msi.c
index bcfddc51bc6a..ea5bf6fb6711 100644
--- a/drivers/irqchip/irq-sg2042-msi.c
+++ b/drivers/irqchip/irq-sg2042-msi.c
@@ -94,6 +94,20 @@ static const struct irq_chip sg2042_msi_middle_irq_chip = {
.irq_compose_msi_msg = sg2042_msi_irq_compose_msi_msg,
};
+/*
+ * As PLIC can only apply affinity when enabling, so always call enable
+ * when unmasking interrupt.
+ */
+static void sg2044_msi_irq_mask(struct irq_data *d)
+{
+ irq_chip_disable_parent(d);
+}
+
+static void sg2044_msi_irq_unmask(struct irq_data *d)
+{
+ irq_chip_enable_parent(d);
+}
+
static void sg2044_msi_irq_ack(struct irq_data *d)
{
struct sg204x_msi_chipdata *data = irq_data_get_irq_chip_data(d);
@@ -115,8 +129,8 @@ static void sg2044_msi_irq_compose_msi_msg(struct irq_data *d, struct msi_msg *m
static struct irq_chip sg2044_msi_middle_irq_chip = {
.name = "SG2044 MSI",
.irq_ack = sg2044_msi_irq_ack,
- .irq_mask = irq_chip_mask_parent,
- .irq_unmask = irq_chip_unmask_parent,
+ .irq_mask = sg2044_msi_irq_mask,
+ .irq_unmask = sg2044_msi_irq_unmask,
#ifdef CONFIG_SMP
.irq_set_affinity = irq_chip_set_affinity_parent,
#endif
@@ -201,7 +215,8 @@ static const struct msi_parent_ops sg2042_msi_parent_ops = {
};
#define SG2044_MSI_FLAGS_REQUIRED (MSI_FLAG_USE_DEF_DOM_OPS | \
- MSI_FLAG_USE_DEF_CHIP_OPS)
+ MSI_FLAG_USE_DEF_CHIP_OPS | \
+ MSI_FLAG_PCI_MSI_MASK_PARENT)
#define SG2044_MSI_FLAGS_SUPPORTED (MSI_GENERIC_FLAGS_MASK | \
MSI_FLAG_PCI_MSIX)
--
2.50.1
next reply other threads:[~2025-07-22 22:45 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-07-22 22:45 Inochi Amaoto [this message]
2025-07-23 22:50 ` Affinity setting problem for emulated MSI on PLIC Thomas Gleixner
2025-07-24 1:34 ` Inochi Amaoto
2025-07-24 11:07 ` Thomas Gleixner
2025-07-24 22:25 ` Inochi Amaoto
2025-08-20 7:40 ` Chen Wang
[not found] ` <236be1b9-58a6-4d4d-9faf-9cbd38f63162@outlook.com>
2025-08-21 6:32 ` Chen Wang
2025-07-24 1:35 ` Inochi Amaoto
2025-08-08 5:56 ` Nam Cao
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