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Wed, 23 Jul 2025 11:08:36 +0000 (GMT) Received: from nasanex01b.na.qualcomm.com (nasanex01b.na.qualcomm.com [10.46.141.250]) by NASANPPMTA04.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 56NB8Z5c021774 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 23 Jul 2025 11:08:35 GMT Received: from hu-varada-blr.qualcomm.com (10.80.80.8) by nasanex01b.na.qualcomm.com (10.46.141.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1748.10; Wed, 23 Jul 2025 04:08:30 -0700 From: Varadarajan Narayanan To: , , , , , , , , , , , , , , , , , CC: Varadarajan Narayanan Subject: [PATCH 0/4] Enable cpufreq for IPQ5424 Date: Wed, 23 Jul 2025 16:38:11 +0530 Message-ID: <20250723110815.2865403-1-quic_varada@quicinc.com> X-Mailer: git-send-email 2.34.1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01b.na.qualcomm.com (10.46.141.250) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwNzIzMDA5NCBTYWx0ZWRfX30q8AyqSj+cx GH37qbvFuKIHdfCSP1B9xxbg17QTv+uR+zPEn+UyVNYC9TD/z4nRTa82lSNRFjVsXanbRpJDE0u ZR6CgjoPhD3PygiFIhp6kHF0e7zlgB5NdumEuLavJNYiILgQRlLc31vGWqnLZ1kN9/s3ueMlrck pVkT6WOEMDb65bB8R9ud84LYcPIGU5tMkDhGusSYZNbTuTocbVtRbupzwCJ/R7h4qDXZhfTOf10 7w20eZmQW/Ajdlo7BoAdzRLFqhtCD/Knp7RCr2+8Zv/iDy6zZC6tQpwRrv4YAI13vg6hc5rXxOt 1TaKZjDJWHcPFp0gD7dXrIMGFcGk6+t5iUA7dIVEk5prvShog1L7fYf/0zDIkmeePOYIDg+FFiY 9unDgSiX3pZ9U9nEpv1gxZcRyQ1crDOY9s7cYu61WW/tjgfuxWnPwnrnt/gXxV0IEKCuac2C X-Proofpoint-ORIG-GUID: znyQuB2L7GNzK_l9r-E8rVfzm3XBI4Mz X-Proofpoint-GUID: znyQuB2L7GNzK_l9r-E8rVfzm3XBI4Mz X-Authority-Analysis: v=2.4 cv=IrMecK/g c=1 sm=1 tr=0 ts=6880c2b4 cx=c_pps a=JYp8KDb2vCoCEuGobkYCKw==:117 a=JYp8KDb2vCoCEuGobkYCKw==:17 a=GEpy-HfZoHoA:10 a=Wb1JkmetP80A:10 a=j41EFXsdaNRYK4k_7XoA:9 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-07-23_02,2025-07-22_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 lowpriorityscore=0 malwarescore=0 adultscore=0 clxscore=1011 priorityscore=1501 spamscore=0 mlxscore=0 mlxlogscore=832 phishscore=0 impostorscore=0 bulkscore=0 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2505280000 definitions=main-2507230094 CPU on Qualcomm ipq5424 is clocked by huayra PLL with RCG support. Add support for the APSS PLL, RCG and clock enable for ipq5424. The PLL, RCG register space are clubbed. Hence adding new APSS driver for both PLL and RCG/CBC control. Also the L3 cache has a separate pll modeled as ICC clock. The L3 pll needs to be scaled along with the CPU. Md Sadre Alam (1): cpufreq: qcom-nvmem: Enable cpufreq for ipq5424 Sricharan Ramabadhran (3): dt-bindings: clock: ipq5424-apss-clk: Add ipq5424 apss clock controller clk: qcom: apss-ipq5424: Add ipq5424 apss clock controller arm64: dts: qcom: ipq5424: Enable cpufreq .../bindings/clock/qcom,ipq5424-apss-clk.yaml | 61 ++++ arch/arm64/boot/dts/qcom/ipq5424.dtsi | 65 ++++ drivers/clk/qcom/Kconfig | 7 + drivers/clk/qcom/Makefile | 1 + drivers/clk/qcom/apss-ipq5424.c | 282 ++++++++++++++++++ drivers/cpufreq/cpufreq-dt-platdev.c | 1 + drivers/cpufreq/qcom-cpufreq-nvmem.c | 5 + include/dt-bindings/clock/qcom,apss-ipq.h | 6 + .../dt-bindings/interconnect/qcom,ipq5424.h | 3 + 9 files changed, 431 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/qcom,ipq5424-apss-clk.yaml create mode 100644 drivers/clk/qcom/apss-ipq5424.c -- 2.34.1