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From: Jay Liu <jay.liu@mediatek.com>
To: Chun-Kuang Hu <chunkuang.hu@kernel.org>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
	Maxime Ripard <mripard@kernel.org>,
	Thomas Zimmermann <tzimmermann@suse.de>,
	David Airlie <airlied@gmail.com>, Simona Vetter <simona@ffwll.ch>,
	Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	Jay Liu <jay.liu@mediatek.com>,
	AngeloGioacchino Del Regno
	<angelogioacchino.delregno@collabora.com>,
	Hsin-Yi Wang <hsinyi@chromium.org>, CK Hu <ck.hu@mediatek.com>,
	Yongqiang Niu <yongqiang.niu@mediatek.com>
Cc: <dri-devel@lists.freedesktop.org>,
	<linux-mediatek@lists.infradead.org>,
	<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>
Subject: [PATCH v2 2/7] drm/mediatek: fix CCORR mtk_ctm_s31_32_to_s1_n function issue
Date: Sun, 27 Jul 2025 15:15:52 +0800	[thread overview]
Message-ID: <20250727071609.26037-3-jay.liu@mediatek.com> (raw)
In-Reply-To: <20250727071609.26037-1-jay.liu@mediatek.com>

if matrixbit is 11,
The range of color matrix is from 0 to (BIT(12) - 1).
Values from 0 to (BIT(11) - 1) represent positive numbers,
values from BIT(11) to (BIT(12) - 1) represent negative numbers.
For example, -1 need converted to 8191.
so convert S31.32 to HW Q2.11 format by drm_color_ctm_s31_32_to_qm_n,
and set int_bits to 2.

Fixes: 738ed4156fba ("drm/mediatek: Add matrix_bits private data for ccorr")
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Jay Liu <jay.liu@mediatek.com>
Signed-off-by: 20220315152503 created <jay.liu@mediatek.com>
---
 drivers/gpu/drm/mediatek/mtk_disp_ccorr.c | 24 ++---------------------
 1 file changed, 2 insertions(+), 22 deletions(-)

diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ccorr.c b/drivers/gpu/drm/mediatek/mtk_disp_ccorr.c
index 85ba109d6383..b097c20877f3 100644
--- a/drivers/gpu/drm/mediatek/mtk_disp_ccorr.c
+++ b/drivers/gpu/drm/mediatek/mtk_disp_ccorr.c
@@ -80,27 +80,6 @@ void mtk_ccorr_stop(struct device *dev)
 	writel_relaxed(0x0, ccorr->regs + DISP_CCORR_EN);
 }
 
-/* Converts a DRM S31.32 value to the HW S1.n format. */
-static u16 mtk_ctm_s31_32_to_s1_n(u64 in, u32 n)
-{
-	u16 r;
-
-	/* Sign bit. */
-	r = in & BIT_ULL(63) ? BIT(n + 1) : 0;
-
-	if ((in & GENMASK_ULL(62, 33)) > 0) {
-		/* identity value 0x100000000 -> 0x400(mt8183), */
-		/* identity value 0x100000000 -> 0x800(mt8192), */
-		/* if bigger this, set it to max 0x7ff. */
-		r |= GENMASK(n, 0);
-	} else {
-		/* take the n+1 most important bits. */
-		r |= (in >> (32 - n)) & GENMASK(n, 0);
-	}
-
-	return r;
-}
-
 bool mtk_ccorr_ctm_set(struct device *dev, struct drm_crtc_state *state)
 {
 	struct mtk_disp_ccorr *ccorr = dev_get_drvdata(dev);
@@ -109,6 +88,7 @@ bool mtk_ccorr_ctm_set(struct device *dev, struct drm_crtc_state *state)
 	const u64 *input;
 	uint16_t coeffs[9] = { 0 };
 	int i;
+	int int_bits = 2;
 	struct cmdq_pkt *cmdq_pkt = NULL;
 	u32 matrix_bits = ccorr->data->matrix_bits;
 
@@ -119,7 +99,7 @@ bool mtk_ccorr_ctm_set(struct device *dev, struct drm_crtc_state *state)
 	input = ctm->matrix;
 
 	for (i = 0; i < ARRAY_SIZE(coeffs); i++)
-		coeffs[i] = mtk_ctm_s31_32_to_s1_n(input[i], matrix_bits);
+		coeffs[i] = drm_color_ctm_s31_32_to_qm_n(input[i], int_bits, matrix_bits);
 
 	mtk_ddp_write(cmdq_pkt, coeffs[0] << 16 | coeffs[1],
 		      &ccorr->cmdq_reg, ccorr->regs, DISP_CCORR_COEF_0);
-- 
2.46.0


  parent reply	other threads:[~2025-07-27  7:17 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-07-27  7:15 [PATCH v2 0/7] porting pq compnent for MT8196 Jay Liu
2025-07-27  7:15 ` [PATCH v2 1/7] drm/mediatek: Add CCORR component support " Jay Liu
2025-08-04  8:57   ` AngeloGioacchino Del Regno
2025-08-06  6:24   ` CK Hu (胡俊光)
2025-07-27  7:15 ` Jay Liu [this message]
2025-08-06  6:37   ` [PATCH v2 2/7] drm/mediatek: fix CCORR mtk_ctm_s31_32_to_s1_n function issue CK Hu (胡俊光)
2025-08-07  6:19     ` Jay Liu (刘博)
2025-08-07 11:30       ` CK Hu (胡俊光)
2025-07-27  7:15 ` [PATCH v2 3/7] drm/mediatek: Add TDSHP component support for MT8196 Jay Liu
2025-08-06  6:45   ` CK Hu (胡俊光)
2025-07-27  7:15 ` [PATCH v2 4/7] dt-bindings: display: mediatek: disp-tdshp: Add " Jay Liu
2025-07-27 20:27   ` Rob Herring (Arm)
2025-07-28 12:01   ` Krzysztof Kozlowski
2025-07-29  3:22     ` Jay Liu (刘博)
2025-08-06  6:50   ` CK Hu (胡俊光)
2025-07-27  7:15 ` [PATCH v2 5/7] dt-bindings: display: mediatek: ccorr: " Jay Liu
2025-07-27 20:27   ` Rob Herring (Arm)
2025-07-27 20:35   ` Rob Herring
2025-07-28  6:52     ` Jay Liu (刘博)
2025-07-27  7:15 ` [PATCH v2 6/7] dt-bindings: display: mediatek: dither: " Jay Liu
2025-07-27 20:27   ` Rob Herring (Arm)
2025-08-06  6:53   ` CK Hu (胡俊光)
2025-07-27  7:15 ` [PATCH v2 7/7] dt-bindings: display: mediatek: gamma: " Jay Liu
2025-07-27 20:27   ` Rob Herring (Arm)

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