From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mx08-00178001.pphosted.com (mx08-00178001.pphosted.com [91.207.212.93]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 58B3A273D88; Mon, 28 Jul 2025 15:33:34 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=91.207.212.93 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1753716817; cv=none; b=PBSUgLHYbKe0AueRKC6E90tGoUNdA3EcZv8jMNQeihM7vcmzOKKF1FIs+fjHpAtjwDsNWJJUcRc7YuNBeePJtwZuYdkvleDdkFT2NHM8drgoBpg2cZOYJJfrm6/pw7iro8Y6BPvqpBLH9MHfGqAMb/7DcCwl/fiNywfcZ1ng2Qo= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1753716817; c=relaxed/simple; bh=6eYIqJXGRaSBZCkYLZHJmaTRLPJfmPNxHldsWV4y7u0=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=oHRdkUluuCnilxtjCv3AAXajGHHOaO1VwWT0IHMpduXyAp5bpdOoPuK10AqavDdp5AgNba2taISjqpKvqRPiQ2XDetXu5Z/aIVh/JEegfnX5Zyv7fuC2sy+DC0QmaIfHdLFTd+1Se2EL6+F08IWFOsW1bROCVl5eLwjWD4vVeEw= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=foss.st.com; spf=pass smtp.mailfrom=foss.st.com; dkim=pass (2048-bit key) header.d=foss.st.com header.i=@foss.st.com header.b=Lf5P0Kj7; arc=none smtp.client-ip=91.207.212.93 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=foss.st.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=foss.st.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=foss.st.com header.i=@foss.st.com header.b="Lf5P0Kj7" Received: from pps.filterd (m0369457.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 56SFWgHD031142; Mon, 28 Jul 2025 17:33:15 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=selector1; bh= JdpWMONuLacNIbyReTtl5COFJvZED0p6KDWBUgWc1mA=; b=Lf5P0Kj7bZi6paux bcMzHfpqPE51NdqS5NHKUG5t4opC3P6o2ww3QZQa+Fp8LJ8bUIbInWoHd9YLEOdf wTjRyIQZ1YOdIdrOlrxfaCtoOgrM66JgMlhh0gYpGGH8bJ+RXNswD/wqEKrfReu7 4m577NZKtUT+zH6RyG2VoavRB74o/wk0rlN0GToThjO/LTCa9nyINP666gvMYGzf GgNJS8lmPhSJ7ODKkeateem2dkGTHCz564+XXXC8MShTveIxo5nanELV8uqSIx/n YH9PIMJ+FB0DJjOiU44zWY+qgWsiSXhILTYZ1uHCZppwT9XAHETdkDwybAKB/7O0 cVm18A== Received: from beta.dmz-ap.st.com (beta.dmz-ap.st.com [138.198.100.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 4859yndymm-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 28 Jul 2025 17:33:15 +0200 (MEST) Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-ap.st.com (STMicroelectronics) with ESMTP id C9EF14004D; Mon, 28 Jul 2025 17:31:26 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node2.st.com [10.75.129.70]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id AF54A787C3E; Mon, 28 Jul 2025 17:29:57 +0200 (CEST) Received: from localhost (10.252.23.100) by SHFDAG1NODE2.st.com (10.75.129.70) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Mon, 28 Jul 2025 17:29:57 +0200 From: =?utf-8?q?Cl=C3=A9ment_Le_Goffic?= Date: Mon, 28 Jul 2025 17:29:39 +0200 Subject: [PATCH v5 08/20] dt-binding: memory: add DDR4 channel compatible Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit Message-ID: <20250728-ddrperfm-upstream-v5-8-03f1be8ad396@foss.st.com> References: <20250728-ddrperfm-upstream-v5-0-03f1be8ad396@foss.st.com> In-Reply-To: <20250728-ddrperfm-upstream-v5-0-03f1be8ad396@foss.st.com> To: Will Deacon , Mark Rutland , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maxime Coquelin , Alexandre Torgue , Philipp Zabel , Jonathan Corbet , Gatien Chevallier , Michael Turquette , Stephen Boyd , Gabriel Fernandez , Krzysztof Kozlowski , Le Goffic , Julius Werner CC: , , , , , , , =?utf-8?q?Cl=C3=A9ment_Le_Goffic?= X-Mailer: b4 0.15-dev-8018a X-ClientProxiedBy: SHFCAS1NODE2.st.com (10.75.129.73) To SHFDAG1NODE2.st.com (10.75.129.70) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-07-28_03,2025-07-28_01,2025-03-28_01 Add in the memory channel binding the DDR4 compatible to support DDR4 memory channel. Signed-off-by: Clément Le Goffic --- .../bindings/memory-controllers/ddr/jedec,sdram-channel.yaml | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,sdram-channel.yaml b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,sdram-channel.yaml index 9892da520fe4..866af40b654d 100644 --- a/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,sdram-channel.yaml +++ b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,sdram-channel.yaml @@ -19,6 +19,7 @@ maintainers: properties: compatible: enum: + - jedec,ddr4-channel - jedec,lpddr2-channel - jedec,lpddr3-channel - jedec,lpddr4-channel @@ -61,6 +62,15 @@ patternProperties: - reg allOf: + - if: + properties: + compatible: + contains: + const: jedec,ddr4-channel + then: + patternProperties: + "^rank@[0-9]+$": + $ref: /schemas/memory-controllers/ddr/jedec,ddr4.yaml# - if: properties: compatible: -- 2.43.0