From: Florian Fainelli <florian.fainelli@broadcom.com>
To: linux-mips@vger.kernel.org
Cc: Florian Fainelli <florian.fainelli@broadcom.com>,
Krzysztof Kozlowski <krzk@kernel.org>,
Rob Herring <robh@kernel.org>, Conor Dooley <conor+dt@kernel.org>,
Broadcom internal kernel review list
<bcm-kernel-feedback-list@broadcom.com>,
Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
linux-kernel@vger.kernel.org (open list:MEMORY CONTROLLER
DRIVERS),
devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND
FLATTENED DEVICE TREE BINDINGS),
linux-arm-kernel@lists.infradead.org (moderated list:BROADCOM
BCM7XXX ARM ARCHITECTURE)
Subject: [PATCH 1/2] dt-bindings: memory: Update brcmstb-memc-ddr binding with older chips
Date: Tue, 29 Jul 2025 13:52:12 -0700 [thread overview]
Message-ID: <20250729205213.3392481-2-florian.fainelli@broadcom.com> (raw)
In-Reply-To: <20250729205213.3392481-1-florian.fainelli@broadcom.com>
The older MIPS-based chips incorporated a memory controller with the
revision A.0.0, update the binding to list that compatible.
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
---
.../bindings/memory-controllers/brcm,brcmstb-memc-ddr.yaml | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/Documentation/devicetree/bindings/memory-controllers/brcm,brcmstb-memc-ddr.yaml b/Documentation/devicetree/bindings/memory-controllers/brcm,brcmstb-memc-ddr.yaml
index b935894bd4fc..3328c8df8190 100644
--- a/Documentation/devicetree/bindings/memory-controllers/brcm,brcmstb-memc-ddr.yaml
+++ b/Documentation/devicetree/bindings/memory-controllers/brcm,brcmstb-memc-ddr.yaml
@@ -42,6 +42,10 @@ properties:
items:
- const: brcm,brcmstb-memc-ddr-rev-b.1.x
- const: brcm,brcmstb-memc-ddr
+ - description: Revision 0.x controllers
+ items:
+ - const: brcm,brcmstb-memc-ddr-rev-a.0.0
+ - const: brcm,brcmstb-memc-ddr
reg:
maxItems: 1
--
2.43.0
next prev parent reply other threads:[~2025-07-29 20:59 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-07-29 20:52 [PATCH 0/2] brcmstb-memc-ddr binding updates for MIPS boards Florian Fainelli
2025-07-29 20:52 ` Florian Fainelli [this message]
2025-07-30 22:30 ` [PATCH 1/2] dt-bindings: memory: Update brcmstb-memc-ddr binding with older chips Rob Herring (Arm)
2025-08-13 10:36 ` (subset) " Krzysztof Kozlowski
2025-07-29 20:52 ` [PATCH 2/2] MIPS: BMIPS: Properly define memory controller compatible Florian Fainelli
2025-08-29 10:21 ` [PATCH 0/2] brcmstb-memc-ddr binding updates for MIPS boards Thomas Bogendoerfer
2025-08-29 10:37 ` Krzysztof Kozlowski
2025-08-29 10:39 ` Krzysztof Kozlowski
2025-08-29 15:36 ` Thomas Bogendoerfer
2025-08-29 16:31 ` Florian Fainelli
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20250729205213.3392481-2-florian.fainelli@broadcom.com \
--to=florian.fainelli@broadcom.com \
--cc=bcm-kernel-feedback-list@broadcom.com \
--cc=conor+dt@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=krzk@kernel.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mips@vger.kernel.org \
--cc=robh@kernel.org \
--cc=tsbogend@alpha.franken.de \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).