From: Maxime Ripard <mripard@kernel.org>
To: Jyri Sarha <jyri.sarha@iki.fi>,
Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>,
Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
Thomas Zimmermann <tzimmermann@suse.de>,
David Airlie <airlied@gmail.com>,
Simona Vetter <simona@ffwll.ch>
Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org,
Maxime Ripard <mripard@kernel.org>
Subject: [PATCH 02/14] drm/tidss: dispc: Switch to GENMASK instead of FLD_MASK
Date: Wed, 30 Jul 2025 10:57:02 +0200 [thread overview]
Message-ID: <20250730-drm-tidss-field-api-v1-2-a71ae8dd2782@kernel.org> (raw)
In-Reply-To: <20250730-drm-tidss-field-api-v1-0-a71ae8dd2782@kernel.org>
The dispc FLD_MASK function is an exact equivalent of the GENMASK macro.
Let's convert the dispc driver to the latter.
Signed-off-by: Maxime Ripard <mripard@kernel.org>
---
drivers/gpu/drm/tidss/tidss_dispc.c | 11 +++--------
1 file changed, 3 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/tidss/tidss_dispc.c b/drivers/gpu/drm/tidss/tidss_dispc.c
index 8ec06412cffa71512cead9725bb43440258eb1ec..5a0904acbed279506df2edad559dfe06f25cd7b5 100644
--- a/drivers/gpu/drm/tidss/tidss_dispc.c
+++ b/drivers/gpu/drm/tidss/tidss_dispc.c
@@ -607,28 +607,23 @@ void tidss_disable_oldi(struct tidss_device *tidss, u32 hw_videoport)
/*
* TRM gives bitfields as start:end, where start is the higher bit
* number. For example 7:0
*/
-static u32 FLD_MASK(u32 start, u32 end)
-{
- return ((1 << (start - end + 1)) - 1) << end;
-}
-
static u32 FLD_VAL(u32 val, u32 start, u32 end)
{
- return (val << end) & FLD_MASK(start, end);
+ return (val << end) & GENMASK(start, end);
}
static u32 FLD_GET(u32 val, u32 start, u32 end)
{
- return (val & FLD_MASK(start, end)) >> end;
+ return (val & GENMASK(start, end)) >> end;
}
static u32 FLD_MOD(u32 orig, u32 val, u32 start, u32 end)
{
- return (orig & ~FLD_MASK(start, end)) | FLD_VAL(val, start, end);
+ return (orig & ~GENMASK(start, end)) | FLD_VAL(val, start, end);
}
static u32 REG_GET(struct dispc_device *dispc, u32 idx, u32 start, u32 end)
{
return FLD_GET(dispc_read(dispc, idx), start, end);
--
2.50.1
next prev parent reply other threads:[~2025-07-30 8:57 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-07-30 8:57 [PATCH 00/14] drm/tidss: dispc: Convert to FIELD_* API Maxime Ripard
2025-07-30 8:57 ` [PATCH 01/14] drm/tidss: dispc: Remove unused OVR_REG_GET Maxime Ripard
2025-07-30 8:57 ` Maxime Ripard [this message]
2025-07-30 8:57 ` [PATCH 03/14] drm/tidss: dispc: Switch to FIELD_PREP for FLD_VAL Maxime Ripard
2025-07-30 8:57 ` [PATCH 04/14] drm/tidss: dispc: Get rid of FLD_GET Maxime Ripard
2025-07-30 8:57 ` [PATCH 05/14] drm/tidss: dispc: Get rid of FLD_VAL Maxime Ripard
2025-07-30 8:57 ` [PATCH 06/14] drm/tidss: dispc: Switch FLD_MOD to using a mask Maxime Ripard
2025-07-30 8:57 ` [PATCH 07/14] drm/tidss: dispc: Switch REG_GET " Maxime Ripard
2025-07-30 8:57 ` [PATCH 08/14] drm/tidss: dispc: Switch REG_FLD_MOD " Maxime Ripard
2025-07-30 8:57 ` [PATCH 09/14] drm/tidss: dispc: Switch VID_REG_GET " Maxime Ripard
2025-07-30 8:57 ` [PATCH 10/14] drm/tidss: dispc: Switch VID_REG_FLD_MOD " Maxime Ripard
2025-07-30 8:57 ` [PATCH 11/14] drm/tidss: dispc: Switch VP_REG_GET " Maxime Ripard
2025-07-30 8:57 ` [PATCH 12/14] drm/tidss: dispc: Switch VP_REG_FLD_MOD " Maxime Ripard
2025-07-30 8:57 ` [PATCH 13/14] drm/tidss: dispc: Switch OVR_REG_FLD_MOD " Maxime Ripard
2025-07-30 8:57 ` [PATCH 14/14] drm/tidss: dispc: Define field masks being used Maxime Ripard
2025-07-31 13:04 ` [PATCH 00/14] drm/tidss: dispc: Convert to FIELD_* API Louis Chauvet
2025-07-31 13:26 ` Maxime Ripard
2025-07-31 13:49 ` Louis Chauvet
2025-07-31 14:05 ` Maxime Ripard
2025-08-08 9:34 ` Tomi Valkeinen
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