From: Daniel Lezcano <daniel.lezcano@linaro.org>
To: daniel.lezcano@linaro.org, tglx@linutronix.de
Cc: S32@nxp.com, linux-kernel@vger.kernel.org,
ghennadi.procopciuc@oss.nxp.com, Arnd Bergmann <arnd@arndb.de>
Subject: [PATCH v2 01/20] clocksource/drivers/vf-pit: Replace raw_readl/writel to reald/writel
Date: Wed, 30 Jul 2025 10:27:03 +0200 [thread overview]
Message-ID: <20250730082725.183133-2-daniel.lezcano@linaro.org> (raw)
In-Reply-To: <20250730082725.183133-1-daniel.lezcano@linaro.org>
The driver uses the raw_readl() and raw_writel() functions. Those are
not for MMIO devices. Replace them with readl() and writel()
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Arnd Bergmann <arnd@arndb.de>
---
drivers/clocksource/timer-vf-pit.c | 22 +++++++++++-----------
1 file changed, 11 insertions(+), 11 deletions(-)
diff --git a/drivers/clocksource/timer-vf-pit.c b/drivers/clocksource/timer-vf-pit.c
index 911c92146eca..8041a8f62d1f 100644
--- a/drivers/clocksource/timer-vf-pit.c
+++ b/drivers/clocksource/timer-vf-pit.c
@@ -35,30 +35,30 @@ static unsigned long cycle_per_jiffy;
static inline void pit_timer_enable(void)
{
- __raw_writel(PITTCTRL_TEN | PITTCTRL_TIE, clkevt_base + PITTCTRL);
+ writel(PITTCTRL_TEN | PITTCTRL_TIE, clkevt_base + PITTCTRL);
}
static inline void pit_timer_disable(void)
{
- __raw_writel(0, clkevt_base + PITTCTRL);
+ writel(0, clkevt_base + PITTCTRL);
}
static inline void pit_irq_acknowledge(void)
{
- __raw_writel(PITTFLG_TIF, clkevt_base + PITTFLG);
+ writel(PITTFLG_TIF, clkevt_base + PITTFLG);
}
static u64 notrace pit_read_sched_clock(void)
{
- return ~__raw_readl(clksrc_base + PITCVAL);
+ return ~readl(clksrc_base + PITCVAL);
}
static int __init pit_clocksource_init(unsigned long rate)
{
/* set the max load value and start the clock source counter */
- __raw_writel(0, clksrc_base + PITTCTRL);
- __raw_writel(~0UL, clksrc_base + PITLDVAL);
- __raw_writel(PITTCTRL_TEN, clksrc_base + PITTCTRL);
+ writel(0, clksrc_base + PITTCTRL);
+ writel(~0UL, clksrc_base + PITLDVAL);
+ writel(PITTCTRL_TEN, clksrc_base + PITTCTRL);
sched_clock_register(pit_read_sched_clock, 32, rate);
return clocksource_mmio_init(clksrc_base + PITCVAL, "vf-pit", rate,
@@ -76,7 +76,7 @@ static int pit_set_next_event(unsigned long delta,
* hardware requirement.
*/
pit_timer_disable();
- __raw_writel(delta - 1, clkevt_base + PITLDVAL);
+ writel(delta - 1, clkevt_base + PITLDVAL);
pit_timer_enable();
return 0;
@@ -125,8 +125,8 @@ static struct clock_event_device clockevent_pit = {
static int __init pit_clockevent_init(unsigned long rate, int irq)
{
- __raw_writel(0, clkevt_base + PITTCTRL);
- __raw_writel(PITTFLG_TIF, clkevt_base + PITTFLG);
+ writel(0, clkevt_base + PITTCTRL);
+ writel(PITTFLG_TIF, clkevt_base + PITTFLG);
BUG_ON(request_irq(irq, pit_timer_interrupt, IRQF_TIMER | IRQF_IRQPOLL,
"VF pit timer", &clockevent_pit));
@@ -183,7 +183,7 @@ static int __init pit_timer_init(struct device_node *np)
cycle_per_jiffy = clk_rate / (HZ);
/* enable the pit module */
- __raw_writel(~PITMCR_MDIS, timer_base + PITMCR);
+ writel(~PITMCR_MDIS, timer_base + PITMCR);
ret = pit_clocksource_init(clk_rate);
if (ret)
--
2.43.0
next prev parent reply other threads:[~2025-07-30 8:28 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-07-30 8:27 [PATCH v2 00/20] Add support for the NXP automotive S32G PIT Daniel Lezcano
2025-07-30 8:27 ` Daniel Lezcano [this message]
2025-07-30 8:27 ` [PATCH v2 02/20] clocksource/drivers/vf-pit: Add COMPILE_TEST option Daniel Lezcano
2025-07-30 8:27 ` [PATCH v2 03/20] clocksource/drivers/vf-pit: Set the scene for multiple timers Daniel Lezcano
2025-07-30 8:27 ` [PATCH v2 04/20] clocksource/drivers/vf-pit: Rework the base address usage Daniel Lezcano
2025-07-30 8:27 ` [PATCH v2 05/20] clocksource/drivers/vf-pit: Pass the cpu number as parameter Daniel Lezcano
2025-07-30 8:27 ` [PATCH v2 06/20] clocksource/drivers/vf-pit: Encapsulate the initialization of the cycles_per_jiffy Daniel Lezcano
2025-07-30 8:27 ` [PATCH v2 07/20] clocksource/drivers/vf-pit: Allocate the struct timer at init time Daniel Lezcano
2025-08-01 7:33 ` Ghennadi Procopciuc
2025-08-04 9:12 ` Daniel Lezcano
2025-08-04 10:02 ` Ghennadi Procopciuc
2025-07-30 8:27 ` [PATCH v2 08/20] clocksource/drivers/vf-pit: Convert raw values to BIT macros Daniel Lezcano
2025-07-30 8:27 ` [PATCH v2 09/20] clocksource/drivers/vf-pit: Register the clocksource from the driver Daniel Lezcano
2025-07-30 8:27 ` [PATCH v2 10/20] clocksource/drivers/vf-pit: Encapsulate the macros Daniel Lezcano
2025-08-01 7:33 ` Ghennadi Procopciuc
2025-07-30 8:27 ` [PATCH v2 11/20] clocksource/drivers/vf-pit: Encapsulate the PTLCVAL macro Daniel Lezcano
2025-08-01 7:34 ` Ghennadi Procopciuc
2025-07-30 8:27 ` [PATCH v2 12/20] clocksource/drivers/vf-pit: Use the node name for the interrupt and timer names Daniel Lezcano
2025-07-30 8:27 ` [PATCH v2 13/20] clocksource/drivers/vf-pit: Encapsulate clocksource enable / disable Daniel Lezcano
2025-07-30 8:27 ` [PATCH v2 14/20] clocksource/drivers/vf-pit: Enable and disable module on error Daniel Lezcano
2025-07-30 8:27 ` [PATCH v2 15/20] clocksource/drivers/vf-pit: Encapsulate set counter function Daniel Lezcano
2025-07-30 8:27 ` [PATCH v2 16/20] clocksource/drivers/vf-pit: Consolidate calls to pit_*_disable/enable Daniel Lezcano
2025-07-30 8:27 ` [PATCH v2 17/20] clocksource/drivers/vf-pit: Unify the function name for irq ack Daniel Lezcano
2025-08-01 7:34 ` Ghennadi Procopciuc
2025-07-30 8:27 ` [PATCH v2 18/20] clocksource/drivers/vf-pit: Rename the VF PIT to NXP PIT Daniel Lezcano
2025-08-01 7:35 ` Ghennadi Procopciuc
2025-08-01 8:48 ` Daniel Lezcano
2025-07-30 8:27 ` [PATCH v2 19/20] dt: bindings: fsl,vf610-pit: Add compatible for s32g2 and s32g3 Daniel Lezcano
2025-07-30 23:36 ` Rob Herring
2025-07-31 7:41 ` Daniel Lezcano
2025-07-31 7:50 ` Krzysztof Kozlowski
2025-07-31 8:24 ` Daniel Lezcano
2025-07-30 8:27 ` [PATCH v2 20/20] clocksource/drivers/nxp-pit: Add NXP Automotive s32g2 / s32g3 support Daniel Lezcano
2025-08-01 7:36 ` Ghennadi Procopciuc
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