From: "Xin Li (Intel)" <xin@zytor.com>
To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org
Cc: pbonzini@redhat.com, seanjc@google.com, tglx@linutronix.de,
mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com,
x86@kernel.org, hpa@zytor.com, xin@zytor.com, chao.gao@intel.com
Subject: [PATCH v1 0/4] KVM: VMX: Handle the immediate form of MSR instructions
Date: Wed, 30 Jul 2025 10:46:01 -0700 [thread overview]
Message-ID: <20250730174605.1614792-1-xin@zytor.com> (raw)
This patch set handles two newly introduced VM exit reasons associated
with the immediate form of MSR instructions to ensure proper
virtualization of these instructions.
The immediate form of MSR access instructions are primarily motivated
by performance, not code size: by having the MSR number in an immediate,
it is available *much* earlier in the pipeline, which allows the
hardware much more leeway about how a particular MSR is handled.
For proper virtualization of the immediate form of MSR instructions,
Intel VMX architecture adds the following changes:
1) The immediate form of RDMSR uses VM exit reason 84.
2) The immediate form of WRMSRNS uses VM exit reason 85.
3) For both VM exit reasons 84 and 85, the exit qualification is set
to the MSR address causing the VM exit.
4) Bits 3 ~ 6 of the VM exit instruction information field represent
the operand register used in the immediate form of MSR instruction.
5) The VM-exit instruction length field records the size of the
immediate form of the MSR instruction.
Note: The VMX specification for the immediate form of MSR instructions
was inadvertently omitted from the last published ISE, but it will be
included in the upcoming edition.
Linux bare metal support of the immediate form of MSR instructions is
still under development; however, the KVM support effort is proceeding
independently of the bare metal implementation.
Xin Li (Intel) (4):
x86/cpufeatures: Add a CPU feature bit for MSR immediate form
instructions
KVM: x86: Introduce MSR read/write emulation helpers
KVM: VMX: Handle the immediate form of MSR instructions
KVM: x86: Advertise support for the immediate form of MSR instructions
arch/x86/include/asm/cpufeatures.h | 1 +
arch/x86/include/asm/kvm_host.h | 5 ++
arch/x86/include/uapi/asm/vmx.h | 6 +-
arch/x86/kernel/cpu/scattered.c | 1 +
arch/x86/kvm/cpuid.c | 6 +-
arch/x86/kvm/reverse_cpuid.h | 5 ++
arch/x86/kvm/vmx/vmx.c | 26 ++++++++
arch/x86/kvm/vmx/vmx.h | 5 ++
arch/x86/kvm/x86.c | 96 +++++++++++++++++++++++-------
arch/x86/kvm/x86.h | 1 +
10 files changed, 130 insertions(+), 22 deletions(-)
base-commit: 33f843444e28920d6e624c6c24637b4bb5d3c8de
--
2.50.1
next reply other threads:[~2025-07-30 17:47 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-07-30 17:46 Xin Li (Intel) [this message]
2025-07-30 17:46 ` [PATCH v1 1/4] x86/cpufeatures: Add a CPU feature bit for MSR immediate form instructions Xin Li (Intel)
2025-07-30 17:46 ` [PATCH v1 2/4] KVM: x86: Introduce MSR read/write emulation helpers Xin Li (Intel)
2025-07-31 10:34 ` Chao Gao
2025-07-31 16:40 ` Xin Li
2025-07-31 17:19 ` Xin Li
2025-08-01 0:47 ` Sean Christopherson
2025-08-01 1:35 ` Xin Li
2025-08-01 14:37 ` Sean Christopherson
2025-08-01 16:27 ` Xin Li
2025-07-30 17:46 ` [PATCH v1 3/4] KVM: VMX: Handle the immediate form of MSR instructions Xin Li (Intel)
2025-07-31 11:04 ` Chao Gao
2025-07-31 16:53 ` Xin Li
2025-07-31 22:10 ` Xin Li
2025-07-30 17:46 ` [PATCH v1 4/4] KVM: x86: Advertise support for " Xin Li (Intel)
2025-08-01 14:39 ` Sean Christopherson
2025-08-01 16:11 ` Xin Li
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