* [PATCH v2 0/3] LoongArch: KVM: Small enhancements about IPI and
@ 2025-08-06 9:00 Bibo Mao
2025-08-06 9:00 ` [PATCH v2 1/3] LoongArch: KVM: Access mailbox directly in mail_send() Bibo Mao
` (2 more replies)
0 siblings, 3 replies; 4+ messages in thread
From: Bibo Mao @ 2025-08-06 9:00 UTC (permalink / raw)
To: Tianrui Zhao, Huacai Chen, Xianglai Li; +Cc: kvm, loongarch, linux-kernel
Thre are some small enhancement about IPI emulation and LBT enabling in
LoongArch KVM. With IPI, it supports sending command to vCPU itself. And
with LBT it adds flag checking int function kvm_own_lbt() and make it
robust.
Bibo Mao (3):
LoongArch: KVM: Access mailbox directly in mail_send()
LoongArch: KVM: Add implementation with IOCSR_IPI_SET
LoongArch: KVM: Make function kvm_own_lbt() robust
arch/loongarch/kvm/intc/ipi.c | 51 ++++++++++++++++++++++-------------
arch/loongarch/kvm/vcpu.c | 8 +++---
2 files changed, 38 insertions(+), 21 deletions(-)
base-commit: 7e161a991ea71e6ec526abc8f40c6852ebe3d946
--
2.39.3
^ permalink raw reply [flat|nested] 4+ messages in thread
* [PATCH v2 1/3] LoongArch: KVM: Access mailbox directly in mail_send()
2025-08-06 9:00 [PATCH v2 0/3] LoongArch: KVM: Small enhancements about IPI and Bibo Mao
@ 2025-08-06 9:00 ` Bibo Mao
2025-08-06 9:00 ` [PATCH v2 2/3] LoongArch: KVM: Add implementation with IOCSR_IPI_SET Bibo Mao
2025-08-06 9:00 ` [PATCH v2 3/3] LoongArch: KVM: Make function kvm_own_lbt() robust Bibo Mao
2 siblings, 0 replies; 4+ messages in thread
From: Bibo Mao @ 2025-08-06 9:00 UTC (permalink / raw)
To: Tianrui Zhao, Huacai Chen, Xianglai Li; +Cc: kvm, loongarch, linux-kernel
With function mail_send(), it is to write mailbox of other VCPUs.
Existing simple APIs read_mailbox/write_mailbox can be used directly
rather than send command on IOCSR address.
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
---
arch/loongarch/kvm/intc/ipi.c | 16 +++++++++++++---
1 file changed, 13 insertions(+), 3 deletions(-)
diff --git a/arch/loongarch/kvm/intc/ipi.c b/arch/loongarch/kvm/intc/ipi.c
index e658d5b37c04..6bbbf5df3957 100644
--- a/arch/loongarch/kvm/intc/ipi.c
+++ b/arch/loongarch/kvm/intc/ipi.c
@@ -134,7 +134,8 @@ static int send_ipi_data(struct kvm_vcpu *vcpu, gpa_t addr, uint64_t data)
static int mail_send(struct kvm *kvm, uint64_t data)
{
- int cpu, mailbox, offset;
+ int i, cpu, mailbox, offset;
+ uint32_t val = 0, mask = 0;
struct kvm_vcpu *vcpu;
cpu = ((data & 0xffffffff) >> 16) & 0x3ff;
@@ -144,9 +145,18 @@ static int mail_send(struct kvm *kvm, uint64_t data)
return -EINVAL;
}
mailbox = ((data & 0xffffffff) >> 2) & 0x7;
- offset = IOCSR_IPI_BASE + IOCSR_IPI_BUF_20 + mailbox * 4;
+ offset = IOCSR_IPI_BUF_20 + mailbox * 4;
+ if ((data >> 27) & 0xf) {
+ val = read_mailbox(vcpu, offset, 4);
+ for (i = 0; i < 4; i++)
+ if (data & (BIT(27 + i)))
+ mask |= (0xff << (i * 8));
+ val &= mask;
+ }
- return send_ipi_data(vcpu, offset, data);
+ val |= ((uint32_t)(data >> 32) & ~mask);
+ write_mailbox(vcpu, offset, val, 4);
+ return 0;
}
static int any_send(struct kvm *kvm, uint64_t data)
--
2.39.3
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH v2 2/3] LoongArch: KVM: Add implementation with IOCSR_IPI_SET
2025-08-06 9:00 [PATCH v2 0/3] LoongArch: KVM: Small enhancements about IPI and Bibo Mao
2025-08-06 9:00 ` [PATCH v2 1/3] LoongArch: KVM: Access mailbox directly in mail_send() Bibo Mao
@ 2025-08-06 9:00 ` Bibo Mao
2025-08-06 9:00 ` [PATCH v2 3/3] LoongArch: KVM: Make function kvm_own_lbt() robust Bibo Mao
2 siblings, 0 replies; 4+ messages in thread
From: Bibo Mao @ 2025-08-06 9:00 UTC (permalink / raw)
To: Tianrui Zhao, Huacai Chen, Xianglai Li; +Cc: kvm, loongarch, linux-kernel
IPI IOCSR register IOCSR_IPI_SET can send ipi interrupt to other vCPUs,
also it can send interrupt to vCPU itself. Instead there is such
operation on Linux such as arch_irq_work_raise(), it will send ipi
message to vCPU itself.
Here add implementation of write operation with IOCSR_IPI_SET register.
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
---
arch/loongarch/kvm/intc/ipi.c | 35 ++++++++++++++++++++---------------
1 file changed, 20 insertions(+), 15 deletions(-)
diff --git a/arch/loongarch/kvm/intc/ipi.c b/arch/loongarch/kvm/intc/ipi.c
index 6bbbf5df3957..d0457a198847 100644
--- a/arch/loongarch/kvm/intc/ipi.c
+++ b/arch/loongarch/kvm/intc/ipi.c
@@ -7,13 +7,26 @@
#include <asm/kvm_ipi.h>
#include <asm/kvm_vcpu.h>
-static void ipi_send(struct kvm *kvm, uint64_t data)
+static void ipi_set(struct kvm_vcpu *vcpu, uint32_t data)
{
- int cpu, action;
uint32_t status;
- struct kvm_vcpu *vcpu;
struct kvm_interrupt irq;
+ spin_lock(&vcpu->arch.ipi_state.lock);
+ status = vcpu->arch.ipi_state.status;
+ vcpu->arch.ipi_state.status |= data;
+ spin_unlock(&vcpu->arch.ipi_state.lock);
+ if ((status == 0) && data) {
+ irq.irq = LARCH_INT_IPI;
+ kvm_vcpu_ioctl_interrupt(vcpu, &irq);
+ }
+}
+
+static void ipi_send(struct kvm *kvm, uint64_t data)
+{
+ int cpu;
+ struct kvm_vcpu *vcpu;
+
cpu = ((data & 0xffffffff) >> 16) & 0x3ff;
vcpu = kvm_get_vcpu_by_cpuid(kvm, cpu);
if (unlikely(vcpu == NULL)) {
@@ -21,15 +34,7 @@ static void ipi_send(struct kvm *kvm, uint64_t data)
return;
}
- action = BIT(data & 0x1f);
- spin_lock(&vcpu->arch.ipi_state.lock);
- status = vcpu->arch.ipi_state.status;
- vcpu->arch.ipi_state.status |= action;
- spin_unlock(&vcpu->arch.ipi_state.lock);
- if (status == 0) {
- irq.irq = LARCH_INT_IPI;
- kvm_vcpu_ioctl_interrupt(vcpu, &irq);
- }
+ ipi_set(vcpu, BIT(data & 0x1f));
}
static void ipi_clear(struct kvm_vcpu *vcpu, uint64_t data)
@@ -241,7 +246,7 @@ static int loongarch_ipi_writel(struct kvm_vcpu *vcpu, gpa_t addr, int len, cons
spin_unlock(&vcpu->arch.ipi_state.lock);
break;
case IOCSR_IPI_SET:
- ret = -EINVAL;
+ ipi_set(vcpu, data);
break;
case IOCSR_IPI_CLEAR:
/* Just clear the status of the current vcpu */
@@ -260,10 +265,10 @@ static int loongarch_ipi_writel(struct kvm_vcpu *vcpu, gpa_t addr, int len, cons
ipi_send(vcpu->kvm, data);
break;
case IOCSR_MAIL_SEND:
- ret = mail_send(vcpu->kvm, *(uint64_t *)val);
+ ret = mail_send(vcpu->kvm, data);
break;
case IOCSR_ANY_SEND:
- ret = any_send(vcpu->kvm, *(uint64_t *)val);
+ ret = any_send(vcpu->kvm, data);
break;
default:
kvm_err("%s: unknown addr: %llx\n", __func__, addr);
--
2.39.3
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH v2 3/3] LoongArch: KVM: Make function kvm_own_lbt() robust
2025-08-06 9:00 [PATCH v2 0/3] LoongArch: KVM: Small enhancements about IPI and Bibo Mao
2025-08-06 9:00 ` [PATCH v2 1/3] LoongArch: KVM: Access mailbox directly in mail_send() Bibo Mao
2025-08-06 9:00 ` [PATCH v2 2/3] LoongArch: KVM: Add implementation with IOCSR_IPI_SET Bibo Mao
@ 2025-08-06 9:00 ` Bibo Mao
2 siblings, 0 replies; 4+ messages in thread
From: Bibo Mao @ 2025-08-06 9:00 UTC (permalink / raw)
To: Tianrui Zhao, Huacai Chen, Xianglai Li; +Cc: kvm, loongarch, linux-kernel
Add flag KVM_LARCH_LBT checking in function kvm_own_lbt(), so that
it can be called safely rather than duplicated enabling again.
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
---
arch/loongarch/kvm/vcpu.c | 8 +++++---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/arch/loongarch/kvm/vcpu.c b/arch/loongarch/kvm/vcpu.c
index d1b8c50941ca..ce478151466c 100644
--- a/arch/loongarch/kvm/vcpu.c
+++ b/arch/loongarch/kvm/vcpu.c
@@ -1283,9 +1283,11 @@ int kvm_own_lbt(struct kvm_vcpu *vcpu)
return -EINVAL;
preempt_disable();
- set_csr_euen(CSR_EUEN_LBTEN);
- _restore_lbt(&vcpu->arch.lbt);
- vcpu->arch.aux_inuse |= KVM_LARCH_LBT;
+ if (!(vcpu->arch.aux_inuse & KVM_LARCH_LBT)) {
+ set_csr_euen(CSR_EUEN_LBTEN);
+ _restore_lbt(&vcpu->arch.lbt);
+ vcpu->arch.aux_inuse |= KVM_LARCH_LBT;
+ }
preempt_enable();
return 0;
--
2.39.3
^ permalink raw reply related [flat|nested] 4+ messages in thread
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Thread overview: 4+ messages (download: mbox.gz follow: Atom feed
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2025-08-06 9:00 [PATCH v2 0/3] LoongArch: KVM: Small enhancements about IPI and Bibo Mao
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