[PATCH v2 0/2] drm: vc4: Add support for additional 10/12/16bit YUV plane formats

[PATCH v2 0/2] drm: vc4: Add support for additional 10/12/16bit YUV plane formats

[Dave Stevenson]

We'd been asked if the S01x YUV formats could be supported on Pi5 as some
software codecs produce them.
The answer was yes, so this patch adds them and the P01x formats.

Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
---
Changes in v2:
- Swapped from adding an extra bool hvs6_only to having a min_gen for
  each format (suggested by Maíra)
- Link to v1: https://lore.kernel.org/r/20250724-drm-vc4-extra-formats-v1-1-67fa80597fad@raspberrypi.com

---
Dave Stevenson (2):
      drm/vc4: plane: Flag formats as having a minimum generation
      drm/vc4: plane: Add support for P01[026] and S01[026] formats

 drivers/gpu/drm/vc4/vc4_plane.c | 56 +++++++++++++++++++++++++++++++++++------
 drivers/gpu/drm/vc4/vc4_regs.h  |  9 +++++++
 2 files changed, 58 insertions(+), 7 deletions(-)
---
base-commit: d2b48f2b30f25997a1ae1ad0cefac68c25f8c330
change-id: 20250724-drm-vc4-extra-formats-1f53e6491cc1

Best regards,
-- 
Dave Stevenson <dave.stevenson@raspberrypi.com>

[PATCH v2 1/2] drm/vc4: plane: Flag formats as having a minimum generation

[Dave Stevenson]

The bool hvs5_only is now mis-named as they are also supported on
hvs6, and we're about to add formats that are only supported on
hvs6.

Change from a bool to an enum vc4_gen giving the minimum generation
that supports the format.

Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
---
 drivers/gpu/drm/vc4/vc4_plane.c | 14 +++++++-------
 1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/vc4/vc4_plane.c b/drivers/gpu/drm/vc4/vc4_plane.c
index 056d344c5411..3bdd9466a7b0 100644
--- a/drivers/gpu/drm/vc4/vc4_plane.c
+++ b/drivers/gpu/drm/vc4/vc4_plane.c
@@ -35,7 +35,7 @@ static const struct hvs_format {
 	u32 hvs; /* HVS_FORMAT_* */
 	u32 pixel_order;
 	u32 pixel_order_hvs5;
-	bool hvs5_only;
+	enum vc4_gen min_gen;
 } hvs_formats[] = {
 	{
 		.drm = DRM_FORMAT_XRGB8888,
@@ -161,31 +161,31 @@ static const struct hvs_format {
 		.drm = DRM_FORMAT_P030,
 		.hvs = HVS_PIXEL_FORMAT_YCBCR_10BIT,
 		.pixel_order_hvs5 = HVS_PIXEL_ORDER_XYCBCR,
-		.hvs5_only = true,
+		.min_gen = VC4_GEN_5,
 	},
 	{
 		.drm = DRM_FORMAT_XRGB2101010,
 		.hvs = HVS_PIXEL_FORMAT_RGBA1010102,
 		.pixel_order_hvs5 = HVS_PIXEL_ORDER_ARGB,
-		.hvs5_only = true,
+		.min_gen = VC4_GEN_5,
 	},
 	{
 		.drm = DRM_FORMAT_ARGB2101010,
 		.hvs = HVS_PIXEL_FORMAT_RGBA1010102,
 		.pixel_order_hvs5 = HVS_PIXEL_ORDER_ARGB,
-		.hvs5_only = true,
+		.min_gen = VC4_GEN_5,
 	},
 	{
 		.drm = DRM_FORMAT_ABGR2101010,
 		.hvs = HVS_PIXEL_FORMAT_RGBA1010102,
 		.pixel_order_hvs5 = HVS_PIXEL_ORDER_ABGR,
-		.hvs5_only = true,
+		.min_gen = VC4_GEN_5,
 	},
 	{
 		.drm = DRM_FORMAT_XBGR2101010,
 		.hvs = HVS_PIXEL_FORMAT_RGBA1010102,
 		.pixel_order_hvs5 = HVS_PIXEL_ORDER_ABGR,
-		.hvs5_only = true,
+		.min_gen = VC4_GEN_5,
 	},
 	{
 		.drm = DRM_FORMAT_RGB332,
@@ -2524,7 +2524,7 @@ struct drm_plane *vc4_plane_init(struct drm_device *dev,
 	};
 
 	for (i = 0; i < ARRAY_SIZE(hvs_formats); i++) {
-		if (!hvs_formats[i].hvs5_only || vc4->gen >= VC4_GEN_5) {
+		if (vc4->gen >= hvs_formats[i].min_gen) {
 			formats[num_formats] = hvs_formats[i].drm;
 			num_formats++;
 		}

-- 
2.34.1

[PATCH v2 2/2] drm/vc4: plane: Add support for P01[026] and S01[026] formats

[Dave Stevenson]

There are now formats defined for 2-plane YUV420 at 10, 12,
and 16 bit depth using the most significant bits of the 16bit
word (P010, P012, and P016), and 3-plane YUV420 at those
depths using the least significant bits of the 16 bit word
(S010, S012, and S016).

VC4_GEN_6 can support all those formats although only using
at most 10bits of resolution.
Add them as supported formats for all planes, but filtered
by hardware revision.

Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
---
 drivers/gpu/drm/vc4/vc4_plane.c | 42 +++++++++++++++++++++++++++++++++++++++++
 drivers/gpu/drm/vc4/vc4_regs.h  |  9 +++++++++
 2 files changed, 51 insertions(+)

diff --git a/drivers/gpu/drm/vc4/vc4_plane.c b/drivers/gpu/drm/vc4/vc4_plane.c
index 3bdd9466a7b0..5fc26f705425 100644
--- a/drivers/gpu/drm/vc4/vc4_plane.c
+++ b/drivers/gpu/drm/vc4/vc4_plane.c
@@ -247,6 +247,42 @@ static const struct hvs_format {
 		.pixel_order = HVS_PIXEL_ORDER_BGRA,
 		.pixel_order_hvs5 = HVS_PIXEL_ORDER_RGBA,
 	},
+	{
+		.drm = DRM_FORMAT_P010,
+		.hvs = HVS_PIXEL_FORMAT_YCBCR_YUV420_15_6_2PLANE,
+		.pixel_order_hvs5 = HVS_PIXEL_ORDER_XYCBCR,
+		.min_gen = VC4_GEN_6_C,
+	},
+	{
+		.drm = DRM_FORMAT_P012,
+		.hvs = HVS_PIXEL_FORMAT_YCBCR_YUV420_15_6_2PLANE,
+		.pixel_order_hvs5 = HVS_PIXEL_ORDER_XYCBCR,
+		.min_gen = VC4_GEN_6_C,
+	},
+	{
+		.drm = DRM_FORMAT_P016,
+		.hvs = HVS_PIXEL_FORMAT_YCBCR_YUV420_15_6_2PLANE,
+		.pixel_order_hvs5 = HVS_PIXEL_ORDER_XYCBCR,
+		.min_gen = VC4_GEN_6_C,
+	},
+	{
+		.drm = DRM_FORMAT_S010,
+		.hvs = HVS_PIXEL_FORMAT_YCBCR_YUV420_9_0_3PLANE,
+		.pixel_order_hvs5 = HVS_PIXEL_ORDER_XYCBCR,
+		.min_gen = VC4_GEN_6_C,
+	},
+	{
+		.drm = DRM_FORMAT_S012,
+		.hvs = HVS_PIXEL_FORMAT_YCBCR_YUV420_11_2_3PLANE,
+		.pixel_order_hvs5 = HVS_PIXEL_ORDER_XYCBCR,
+		.min_gen = VC4_GEN_6_C,
+	},
+	{
+		.drm = DRM_FORMAT_S016,
+		.hvs = HVS_PIXEL_FORMAT_YCBCR_YUV420_15_6_3PLANE,
+		.pixel_order_hvs5 = HVS_PIXEL_ORDER_XYCBCR,
+		.min_gen = VC4_GEN_6_C,
+	},
 };
 
 static const struct hvs_format *vc4_get_hvs_format(u32 drm_format)
@@ -2490,6 +2526,12 @@ static bool vc4_format_mod_supported(struct drm_plane *plane,
 	case DRM_FORMAT_YVU420:
 	case DRM_FORMAT_NV16:
 	case DRM_FORMAT_NV61:
+	case DRM_FORMAT_P010:
+	case DRM_FORMAT_P012:
+	case DRM_FORMAT_P016:
+	case DRM_FORMAT_S010:
+	case DRM_FORMAT_S012:
+	case DRM_FORMAT_S016:
 	default:
 		return (modifier == DRM_FORMAT_MOD_LINEAR);
 	}
diff --git a/drivers/gpu/drm/vc4/vc4_regs.h b/drivers/gpu/drm/vc4/vc4_regs.h
index 27158be19952..4536e3c0533b 100644
--- a/drivers/gpu/drm/vc4/vc4_regs.h
+++ b/drivers/gpu/drm/vc4/vc4_regs.h
@@ -1079,6 +1079,15 @@ enum hvs_pixel_format {
 	HVS_PIXEL_FORMAT_AYUV444_RGB = 15,
 	HVS_PIXEL_FORMAT_RGBA1010102 = 16,
 	HVS_PIXEL_FORMAT_YCBCR_10BIT = 17,
+	/* 10 bit YUV420 formats with data with various alignments */
+	HVS_PIXEL_FORMAT_YCBCR_YUV420_15_6_2PLANE = 24,
+	HVS_PIXEL_FORMAT_YCBCR_YUV420_15_6_3PLANE = 25,
+	HVS_PIXEL_FORMAT_YCBCR_YUV420_13_4_2PLANE = 26,
+	HVS_PIXEL_FORMAT_YCBCR_YUV420_13_4_3PLANE = 27,
+	HVS_PIXEL_FORMAT_YCBCR_YUV420_11_2_2PLANE = 28,
+	HVS_PIXEL_FORMAT_YCBCR_YUV420_11_2_3PLANE = 29,
+	HVS_PIXEL_FORMAT_YCBCR_YUV420_9_0_2PLANE = 30,
+	HVS_PIXEL_FORMAT_YCBCR_YUV420_9_0_3PLANE = 31,
 };
 
 /* Note: the LSB is the rightmost character shown.  Only valid for

-- 
2.34.1

Re: [PATCH v2 1/2] drm/vc4: plane: Flag formats as having a minimum generation

[Maíra Canal]

Hi Dave,

On 07/08/25 10:28, Dave Stevenson wrote:
> The bool hvs5_only is now mis-named as they are also supported on
> hvs6, and we're about to add formats that are only supported on
> hvs6.
> 
> Change from a bool to an enum vc4_gen giving the minimum generation
> that supports the format.
> 
> Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>

Reviewed-by: Maíra Canal <mcanal@igalia.com>

Best Regards,
- Maíra

> ---
>   drivers/gpu/drm/vc4/vc4_plane.c | 14 +++++++-------
>   1 file changed, 7 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/gpu/drm/vc4/vc4_plane.c b/drivers/gpu/drm/vc4/vc4_plane.c
> index 056d344c5411..3bdd9466a7b0 100644
> --- a/drivers/gpu/drm/vc4/vc4_plane.c
> +++ b/drivers/gpu/drm/vc4/vc4_plane.c
> @@ -35,7 +35,7 @@ static const struct hvs_format {
>   	u32 hvs; /* HVS_FORMAT_* */
>   	u32 pixel_order;
>   	u32 pixel_order_hvs5;
> -	bool hvs5_only;
> +	enum vc4_gen min_gen;
>   } hvs_formats[] = {
>   	{
>   		.drm = DRM_FORMAT_XRGB8888,
> @@ -161,31 +161,31 @@ static const struct hvs_format {
>   		.drm = DRM_FORMAT_P030,
>   		.hvs = HVS_PIXEL_FORMAT_YCBCR_10BIT,
>   		.pixel_order_hvs5 = HVS_PIXEL_ORDER_XYCBCR,
> -		.hvs5_only = true,
> +		.min_gen = VC4_GEN_5,
>   	},
>   	{
>   		.drm = DRM_FORMAT_XRGB2101010,
>   		.hvs = HVS_PIXEL_FORMAT_RGBA1010102,
>   		.pixel_order_hvs5 = HVS_PIXEL_ORDER_ARGB,
> -		.hvs5_only = true,
> +		.min_gen = VC4_GEN_5,
>   	},
>   	{
>   		.drm = DRM_FORMAT_ARGB2101010,
>   		.hvs = HVS_PIXEL_FORMAT_RGBA1010102,
>   		.pixel_order_hvs5 = HVS_PIXEL_ORDER_ARGB,
> -		.hvs5_only = true,
> +		.min_gen = VC4_GEN_5,
>   	},
>   	{
>   		.drm = DRM_FORMAT_ABGR2101010,
>   		.hvs = HVS_PIXEL_FORMAT_RGBA1010102,
>   		.pixel_order_hvs5 = HVS_PIXEL_ORDER_ABGR,
> -		.hvs5_only = true,
> +		.min_gen = VC4_GEN_5,
>   	},
>   	{
>   		.drm = DRM_FORMAT_XBGR2101010,
>   		.hvs = HVS_PIXEL_FORMAT_RGBA1010102,
>   		.pixel_order_hvs5 = HVS_PIXEL_ORDER_ABGR,
> -		.hvs5_only = true,
> +		.min_gen = VC4_GEN_5,
>   	},
>   	{
>   		.drm = DRM_FORMAT_RGB332,
> @@ -2524,7 +2524,7 @@ struct drm_plane *vc4_plane_init(struct drm_device *dev,
>   	};
>   
>   	for (i = 0; i < ARRAY_SIZE(hvs_formats); i++) {
> -		if (!hvs_formats[i].hvs5_only || vc4->gen >= VC4_GEN_5) {
> +		if (vc4->gen >= hvs_formats[i].min_gen) {
>   			formats[num_formats] = hvs_formats[i].drm;
>   			num_formats++;
>   		}
> 

Re: [PATCH v2 2/2] drm/vc4: plane: Add support for P01[026] and S01[026] formats

[Maíra Canal]

Hi Dave,

On 07/08/25 10:28, Dave Stevenson wrote:
> There are now formats defined for 2-plane YUV420 at 10, 12,
> and 16 bit depth using the most significant bits of the 16bit
> word (P010, P012, and P016), and 3-plane YUV420 at those
> depths using the least significant bits of the 16 bit word
> (S010, S012, and S016).
> 
> VC4_GEN_6 can support all those formats although only using
> at most 10bits of resolution.
> Add them as supported formats for all planes, but filtered
> by hardware revision.
> 
> Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>

Acked-by: Maíra Canal <mcanal@igalia.com>

Best Regards,
- Maíra

> ---
>   drivers/gpu/drm/vc4/vc4_plane.c | 42 +++++++++++++++++++++++++++++++++++++++++
>   drivers/gpu/drm/vc4/vc4_regs.h  |  9 +++++++++
>   2 files changed, 51 insertions(+)
> 
> diff --git a/drivers/gpu/drm/vc4/vc4_plane.c b/drivers/gpu/drm/vc4/vc4_plane.c
> index 3bdd9466a7b0..5fc26f705425 100644
> --- a/drivers/gpu/drm/vc4/vc4_plane.c
> +++ b/drivers/gpu/drm/vc4/vc4_plane.c
> @@ -247,6 +247,42 @@ static const struct hvs_format {
>   		.pixel_order = HVS_PIXEL_ORDER_BGRA,
>   		.pixel_order_hvs5 = HVS_PIXEL_ORDER_RGBA,
>   	},
> +	{
> +		.drm = DRM_FORMAT_P010,
> +		.hvs = HVS_PIXEL_FORMAT_YCBCR_YUV420_15_6_2PLANE,
> +		.pixel_order_hvs5 = HVS_PIXEL_ORDER_XYCBCR,
> +		.min_gen = VC4_GEN_6_C,
> +	},
> +	{
> +		.drm = DRM_FORMAT_P012,
> +		.hvs = HVS_PIXEL_FORMAT_YCBCR_YUV420_15_6_2PLANE,
> +		.pixel_order_hvs5 = HVS_PIXEL_ORDER_XYCBCR,
> +		.min_gen = VC4_GEN_6_C,
> +	},
> +	{
> +		.drm = DRM_FORMAT_P016,
> +		.hvs = HVS_PIXEL_FORMAT_YCBCR_YUV420_15_6_2PLANE,
> +		.pixel_order_hvs5 = HVS_PIXEL_ORDER_XYCBCR,
> +		.min_gen = VC4_GEN_6_C,
> +	},
> +	{
> +		.drm = DRM_FORMAT_S010,
> +		.hvs = HVS_PIXEL_FORMAT_YCBCR_YUV420_9_0_3PLANE,
> +		.pixel_order_hvs5 = HVS_PIXEL_ORDER_XYCBCR,
> +		.min_gen = VC4_GEN_6_C,
> +	},
> +	{
> +		.drm = DRM_FORMAT_S012,
> +		.hvs = HVS_PIXEL_FORMAT_YCBCR_YUV420_11_2_3PLANE,
> +		.pixel_order_hvs5 = HVS_PIXEL_ORDER_XYCBCR,
> +		.min_gen = VC4_GEN_6_C,
> +	},
> +	{
> +		.drm = DRM_FORMAT_S016,
> +		.hvs = HVS_PIXEL_FORMAT_YCBCR_YUV420_15_6_3PLANE,
> +		.pixel_order_hvs5 = HVS_PIXEL_ORDER_XYCBCR,
> +		.min_gen = VC4_GEN_6_C,
> +	},
>   };
>   
>   static const struct hvs_format *vc4_get_hvs_format(u32 drm_format)
> @@ -2490,6 +2526,12 @@ static bool vc4_format_mod_supported(struct drm_plane *plane,
>   	case DRM_FORMAT_YVU420:
>   	case DRM_FORMAT_NV16:
>   	case DRM_FORMAT_NV61:
> +	case DRM_FORMAT_P010:
> +	case DRM_FORMAT_P012:
> +	case DRM_FORMAT_P016:
> +	case DRM_FORMAT_S010:
> +	case DRM_FORMAT_S012:
> +	case DRM_FORMAT_S016:
>   	default:
>   		return (modifier == DRM_FORMAT_MOD_LINEAR);
>   	}
> diff --git a/drivers/gpu/drm/vc4/vc4_regs.h b/drivers/gpu/drm/vc4/vc4_regs.h
> index 27158be19952..4536e3c0533b 100644
> --- a/drivers/gpu/drm/vc4/vc4_regs.h
> +++ b/drivers/gpu/drm/vc4/vc4_regs.h
> @@ -1079,6 +1079,15 @@ enum hvs_pixel_format {
>   	HVS_PIXEL_FORMAT_AYUV444_RGB = 15,
>   	HVS_PIXEL_FORMAT_RGBA1010102 = 16,
>   	HVS_PIXEL_FORMAT_YCBCR_10BIT = 17,
> +	/* 10 bit YUV420 formats with data with various alignments */
> +	HVS_PIXEL_FORMAT_YCBCR_YUV420_15_6_2PLANE = 24,
> +	HVS_PIXEL_FORMAT_YCBCR_YUV420_15_6_3PLANE = 25,
> +	HVS_PIXEL_FORMAT_YCBCR_YUV420_13_4_2PLANE = 26,
> +	HVS_PIXEL_FORMAT_YCBCR_YUV420_13_4_3PLANE = 27,
> +	HVS_PIXEL_FORMAT_YCBCR_YUV420_11_2_2PLANE = 28,
> +	HVS_PIXEL_FORMAT_YCBCR_YUV420_11_2_3PLANE = 29,
> +	HVS_PIXEL_FORMAT_YCBCR_YUV420_9_0_2PLANE = 30,
> +	HVS_PIXEL_FORMAT_YCBCR_YUV420_9_0_3PLANE = 31,
>   };
>   
>   /* Note: the LSB is the rightmost character shown.  Only valid for
> 

Re: [PATCH v2 0/2] drm: vc4: Add support for additional 10/12/16bit YUV plane formats

[Robert Mader]

On 07.08.25 15:28, Dave Stevenson wrote:
> We'd been asked if the S01x YUV formats could be supported on Pi5 as some
> software codecs produce them.
> The answer was yes, so this patch adds them and the P01x formats.

I tested this with the Gstreamer MR from 1 and can confirm that the 
formats P010, P012, P016, S010 and S012 work as expected.

Unfortunately S016 is not supported by Gstreamer yet - however chances 
seem high that it works as well.

Thus the series is:

Tested-by: Robert Mader <robert.mader@collabora.com>

1: https://gitlab.freedesktop.org/gstreamer/gstreamer/-/merge_requests/8540

>
> Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
> ---
> Changes in v2:
> - Swapped from adding an extra bool hvs6_only to having a min_gen for
>    each format (suggested by Maíra)
> - Link to v1: https://lore.kernel.org/r/20250724-drm-vc4-extra-formats-v1-1-67fa80597fad@raspberrypi.com
>
> ---
> Dave Stevenson (2):
>        drm/vc4: plane: Flag formats as having a minimum generation
>        drm/vc4: plane: Add support for P01[026] and S01[026] formats
>
>   drivers/gpu/drm/vc4/vc4_plane.c | 56 +++++++++++++++++++++++++++++++++++------
>   drivers/gpu/drm/vc4/vc4_regs.h  |  9 +++++++
>   2 files changed, 58 insertions(+), 7 deletions(-)
> ---
> base-commit: d2b48f2b30f25997a1ae1ad0cefac68c25f8c330
> change-id: 20250724-drm-vc4-extra-formats-1f53e6491cc1
>
> Best regards,

-- 
Robert Mader
Consultant Software Developer

Collabora Ltd.
Platinum Building, St John's Innovation Park, Cambridge CB4 0DS, UK
Registered in England & Wales, no. 5513718

Re: [PATCH v2 0/2] drm: vc4: Add support for additional 10/12/16bit YUV plane formats

[Dave Stevenson]

Hi Robert

On Mon, 18 Aug 2025 at 11:46, Robert Mader <robert.mader@collabora.com> wrote:
>
> On 07.08.25 15:28, Dave Stevenson wrote:
> > We'd been asked if the S01x YUV formats could be supported on Pi5 as some
> > software codecs produce them.
> > The answer was yes, so this patch adds them and the P01x formats.
>
> I tested this with the Gstreamer MR from 1 and can confirm that the
> formats P010, P012, P016, S010 and S012 work as expected.
>
> Unfortunately S016 is not supported by Gstreamer yet - however chances
> seem high that it works as well.
>
> Thus the series is:
>
> Tested-by: Robert Mader <robert.mader@collabora.com>

Thanks for testing.

In combination with my MR to libdrm/modetest to support these
formats[1], I'm happy that S016 works.
Your testing through Gstreamer gives me confidence that I haven't
messed up both my kernel patch and modetest setup in the same way :-)

Thanks again
  Dave

[1] https://gitlab.freedesktop.org/mesa/libdrm/-/merge_requests/425

> 1: https://gitlab.freedesktop.org/gstreamer/gstreamer/-/merge_requests/8540
>
> >
> > Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
> > ---
> > Changes in v2:
> > - Swapped from adding an extra bool hvs6_only to having a min_gen for
> >    each format (suggested by Maíra)
> > - Link to v1: https://lore.kernel.org/r/20250724-drm-vc4-extra-formats-v1-1-67fa80597fad@raspberrypi.com
> >
> > ---
> > Dave Stevenson (2):
> >        drm/vc4: plane: Flag formats as having a minimum generation
> >        drm/vc4: plane: Add support for P01[026] and S01[026] formats
> >
> >   drivers/gpu/drm/vc4/vc4_plane.c | 56 +++++++++++++++++++++++++++++++++++------
> >   drivers/gpu/drm/vc4/vc4_regs.h  |  9 +++++++
> >   2 files changed, 58 insertions(+), 7 deletions(-)
> > ---
> > base-commit: d2b48f2b30f25997a1ae1ad0cefac68c25f8c330
> > change-id: 20250724-drm-vc4-extra-formats-1f53e6491cc1
> >
> > Best regards,
>
> --
> Robert Mader
> Consultant Software Developer
>
> Collabora Ltd.
> Platinum Building, St John's Innovation Park, Cambridge CB4 0DS, UK
> Registered in England & Wales, no. 5513718
>