From: Anand Moon <linux.amoon@gmail.com>
To: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>,
Krzysztof Kozlowski <krzk@kernel.org>,
"Rafael J. Wysocki" <rafael@kernel.org>,
Daniel Lezcano <daniel.lezcano@linaro.org>,
Zhang Rui <rui.zhang@intel.com>,
Lukasz Luba <lukasz.luba@arm.com>,
Alim Akhtar <alim.akhtar@samsung.com>,
Nathan Chancellor <nathan@kernel.org>,
Nick Desaulniers <nick.desaulniers+lkml@gmail.com>,
Bill Wendling <morbo@google.com>,
Justin Stitt <justinstitt@google.com>,
linux-pm@vger.kernel.org (open list:SAMSUNG THERMAL DRIVER),
linux-samsung-soc@vger.kernel.org (open list:SAMSUNG THERMAL
DRIVER),
linux-arm-kernel@lists.infradead.org (moderated list:ARM/SAMSUNG
S3C, S5P AND EXYNOS ARM ARCHITECTURES),
linux-kernel@vger.kernel.org (open list),
llvm@lists.linux.dev (open list:CLANG/LLVM BUILD
SUPPORT:Keyword:\b(?i:clang|llvm)\b)
Cc: Anand Moon <linux.amoon@gmail.com>,
Mateusz Majewski <m.majewski2@samsung.com>
Subject: [PATCH v7 5/7] thermal/drivers/exynos: Remove unused base_second mapping and references
Date: Wed, 13 Aug 2025 18:39:49 +0530 [thread overview]
Message-ID: <20250813131007.343402-6-linux.amoon@gmail.com> (raw)
In-Reply-To: <20250813131007.343402-1-linux.amoon@gmail.com>
The base_second field has been removed from struct exynos_tmu_data
because it was unused. This cleanup also eliminates its mapping in
exynos_map_dt_data() and ensures that TRIMINFO access in
exynos4412_tmu_initialize() consistently uses the base field across
all SoCs. This streamlines the code and optimizes memory usage.
Signed-off-by: Anand Moon <linux.amoon@gmail.com>
---
v7: new patch in this series,
Improve the commit message
simplify the logic to TRIMINFO for all SoC.
---
drivers/thermal/samsung/exynos_tmu.c | 30 +++++++---------------------
1 file changed, 7 insertions(+), 23 deletions(-)
diff --git a/drivers/thermal/samsung/exynos_tmu.c b/drivers/thermal/samsung/exynos_tmu.c
index 3d12e95703bf..146f29fadea9 100644
--- a/drivers/thermal/samsung/exynos_tmu.c
+++ b/drivers/thermal/samsung/exynos_tmu.c
@@ -139,12 +139,11 @@ enum soc_type {
* struct exynos_tmu_data : A structure to hold the private data of the TMU
* driver
* @base: base address of the single instance of the TMU controller.
- * @base_second: base address of the common registers of the TMU controller.
* @irq: irq number of the TMU controller.
* @soc: id of the SOC type.
* @lock: lock to implement synchronization.
* @clk: pointer to the clock structure.
- * @clk_sec: pointer to the clock structure for accessing the base_second.
+ * @clk_sec: pointer to the clock structure for accessing the gpu clk.
* @sclk: pointer to the clock structure for accessing the tmu special clk.
* @cal_type: calibration type for temperature
* @efuse_value: SoC defined fuse value
@@ -172,7 +171,6 @@ enum soc_type {
*/
struct exynos_tmu_data {
void __iomem *base;
- void __iomem *base_second;
int irq;
enum soc_type soc;
struct mutex lock;
@@ -444,24 +442,17 @@ static void exynos4412_tmu_initialize(struct platform_device *pdev)
struct exynos_tmu_data *data = platform_get_drvdata(pdev);
unsigned int trim_info, ctrl;
- if (data->soc == SOC_ARCH_EXYNOS3250 ||
- data->soc == SOC_ARCH_EXYNOS4412 ||
- data->soc == SOC_ARCH_EXYNOS5250) {
- if (data->soc == SOC_ARCH_EXYNOS3250) {
- ctrl = readl(data->base + EXYNOS_TMU_TRIMINFO_CON1);
- ctrl |= EXYNOS_TRIMINFO_RELOAD_ENABLE;
- writel(ctrl, data->base + EXYNOS_TMU_TRIMINFO_CON1);
- }
+ if (data->soc == SOC_ARCH_EXYNOS3250) {
+ ctrl = readl(data->base + EXYNOS_TMU_TRIMINFO_CON1);
+ ctrl |= EXYNOS_TRIMINFO_RELOAD_ENABLE;
+ writel(ctrl, data->base + EXYNOS_TMU_TRIMINFO_CON1);
+ } else {
ctrl = readl(data->base + EXYNOS_TMU_TRIMINFO_CON2);
ctrl |= EXYNOS_TRIMINFO_RELOAD_ENABLE;
writel(ctrl, data->base + EXYNOS_TMU_TRIMINFO_CON2);
}
- /* On exynos5420 the triminfo register is in the shared space */
- if (data->soc == SOC_ARCH_EXYNOS5420_TRIMINFO)
- trim_info = readl(data->base_second + EXYNOS_TMU_REG_TRIMINFO);
- else
- trim_info = readl(data->base + EXYNOS_TMU_REG_TRIMINFO);
+ trim_info = readl(data->base + EXYNOS_TMU_REG_TRIMINFO);
sanitize_temp_error(data, trim_info);
}
@@ -974,13 +965,6 @@ static int exynos_map_dt_data(struct platform_device *pdev)
return -ENODEV;
}
- data->base_second = devm_ioremap(&pdev->dev, res.start,
- resource_size(&res));
- if (!data->base_second) {
- dev_err(&pdev->dev, "Failed to ioremap memory\n");
- return -ENOMEM;
- }
-
return 0;
}
--
2.50.1
next prev parent reply other threads:[~2025-08-13 13:11 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-13 13:09 [PATCH v7 0/7] Exynos Thermal code improvement Anand Moon
2025-08-13 13:09 ` [PATCH v7 1/7] thermal/drivers/exynos: Refactor clk_sec initialization inside SOC-specific case Anand Moon
2025-08-13 13:09 ` [PATCH v7 2/7] thermal/drivers/exynos: Use devm_clk_get_enabled() helpers Anand Moon
2025-08-13 13:09 ` [PATCH v7 3/7] thermal/drivers/exynos: Remove redundant IS_ERR() checks for clk_sec clock Anand Moon
2025-08-13 13:09 ` [PATCH v7 4/7] thermal/drivers/exynos: Fixed the efuse min max value for exynos5422 Anand Moon
2025-08-13 13:09 ` Anand Moon [this message]
2025-08-13 13:09 ` [PATCH v7 6/7] thermal/drivers/exynos: Handle temperature threshold IRQs with SoC-specific mapping Anand Moon
[not found] ` <CGME20250819131732eucas1p26bd491e9b6b747a4857905bfd50420a9@eucas1p2.samsung.com>
2025-08-19 13:17 ` Mateusz Majewski
[not found] ` <CGME20250819134804eucas1p1ed14f9680e66327a86af4e98319eed11@eucas1p1.samsung.com>
2025-08-19 13:47 ` Mateusz Majewski
2025-08-20 13:28 ` Anand Moon
2025-08-13 13:09 ` [PATCH v7 7/7] thermal/drivers/exynos: Refactor IRQ clear logic using SoC-specific config Anand Moon
[not found] ` <CGME20250819131814eucas1p2c57ccc084cf6736fed01a8a5c0b35fab@eucas1p2.samsung.com>
2025-08-19 13:18 ` Mateusz Majewski
2025-08-20 13:28 ` Anand Moon
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