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From: Tudor Ambarus <tudor.ambarus@linaro.org>
To: "Rob Herring" <robh@kernel.org>,
	"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
	"Conor Dooley" <conor+dt@kernel.org>,
	"Peter Griffin" <peter.griffin@linaro.org>,
	"André Draszik" <andre.draszik@linaro.org>,
	"Michael Turquette" <mturquette@baylibre.com>,
	"Stephen Boyd" <sboyd@kernel.org>,
	"Krzysztof Kozlowski" <krzk@kernel.org>,
	"Alim Akhtar" <alim.akhtar@samsung.com>,
	"Sylwester Nawrocki" <s.nawrocki@samsung.com>,
	"Chanwoo Choi" <cw00.choi@samsung.com>
Cc: linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org,
	 devicetree@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,  linux-clk@vger.kernel.org,
	willmcvicker@google.com, kernel-team@android.com,
	 Tudor Ambarus <tudor.ambarus@linaro.org>
Subject: [PATCH 1/3] dt-bindings: firmware: google,gs101-acpm-ipc: add clocks node
Date: Tue, 19 Aug 2025 11:45:36 +0000	[thread overview]
Message-ID: <20250819-acpm-clk-v1-1-6bbd97474671@linaro.org> (raw)
In-Reply-To: <20250819-acpm-clk-v1-0-6bbd97474671@linaro.org>

The firmware exposes clocks that can be controlled via the ACPM
interface. Describe the clocks exposed by the APM firmware.

Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
---
 .../bindings/firmware/google,gs101-acpm-ipc.yaml   | 28 ++++++++++++++++++++++
 include/dt-bindings/clock/google,gs101.h           | 15 ++++++++++++
 2 files changed, 43 insertions(+)

diff --git a/Documentation/devicetree/bindings/firmware/google,gs101-acpm-ipc.yaml b/Documentation/devicetree/bindings/firmware/google,gs101-acpm-ipc.yaml
index 9785aac3b5f34955bbfe2718eec48581d050954f..27cdf9c881ca680e78e77a0e14ffcffeba970871 100644
--- a/Documentation/devicetree/bindings/firmware/google,gs101-acpm-ipc.yaml
+++ b/Documentation/devicetree/bindings/firmware/google,gs101-acpm-ipc.yaml
@@ -27,6 +27,29 @@ properties:
   mboxes:
     maxItems: 1
 
+  clocks:
+    description:
+      Clocks that are variable and index based. These clocks don't provide
+      an entire range of values between the limits but only discrete points
+      within the range. The firmware also manages the voltage scaling
+      appropriately with the clock scaling.
+    type: object
+    additionalProperties: false
+
+    properties:
+      compatible:
+        const: google,gs101-acpm-dvfs-clocks
+
+      "#clock-cells":
+        const: 1
+        description:
+          The argument is the ID of the clock contained by the firmware
+          messages.
+
+    required:
+      - compatible
+      - "#clock-cells"
+
   pmic:
     description: Child node describing the main PMIC.
     type: object
@@ -59,6 +82,11 @@ examples:
         mboxes = <&ap2apm_mailbox>;
         shmem = <&apm_sram>;
 
+        clocks {
+            compatible = "google,gs101-acpm-dvfs-clocks";
+            #clock-cells = <1>;
+        };
+
         pmic {
             compatible = "samsung,s2mpg10-pmic";
             interrupts-extended = <&gpa0 6 IRQ_TYPE_LEVEL_LOW>;
diff --git a/include/dt-bindings/clock/google,gs101.h b/include/dt-bindings/clock/google,gs101.h
index 442f9e9037dc33198a1cee20af62fc70bbd96605..f1d0df412fdd49b300db4ba88bc0b1674cf0cdf8 100644
--- a/include/dt-bindings/clock/google,gs101.h
+++ b/include/dt-bindings/clock/google,gs101.h
@@ -634,4 +634,19 @@
 #define CLK_GOUT_PERIC1_CLK_PERIC1_USI9_USI_CLK		45
 #define CLK_GOUT_PERIC1_SYSREG_PERIC1_PCLK		46
 
+#define CLK_ACPM_DVFS_MIF				0
+#define CLK_ACPM_DVFS_INT				1
+#define CLK_ACPM_DVFS_CPUCL0				2
+#define CLK_ACPM_DVFS_CPUCL1				3
+#define CLK_ACPM_DVFS_CPUCL2				4
+#define CLK_ACPM_DVFS_G3D				5
+#define CLK_ACPM_DVFS_G3DL2				6
+#define CLK_ACPM_DVFS_TPU				7
+#define CLK_ACPM_DVFS_INTCAM				8
+#define CLK_ACPM_DVFS_TNR				9
+#define CLK_ACPM_DVFS_CAM				10
+#define CLK_ACPM_DVFS_MFC				11
+#define CLK_ACPM_DVFS_DISP				12
+#define CLK_ACPM_DVFS_BO				13
+
 #endif /* _DT_BINDINGS_CLOCK_GOOGLE_GS101_H */

-- 
2.51.0.rc1.167.g924127e9c0-goog


  reply	other threads:[~2025-08-19 11:45 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-08-19 11:45 [PATCH 0/3] exynos-acpm: add DVFS protocol and clock driver Tudor Ambarus
2025-08-19 11:45 ` Tudor Ambarus [this message]
2025-08-22 13:55   ` [PATCH 1/3] dt-bindings: firmware: google,gs101-acpm-ipc: add clocks node Rob Herring
2025-08-22 15:03     ` Tudor Ambarus
2025-08-24 17:00       ` Krzysztof Kozlowski
2025-08-25 12:01         ` Tudor Ambarus
2025-08-19 11:45 ` [PATCH 2/3] firmware: exynos-acpm: add DVFS protocol Tudor Ambarus
2025-08-24 17:11   ` Krzysztof Kozlowski
2025-08-25 12:02     ` Tudor Ambarus
2025-08-19 11:45 ` [PATCH 3/3] clk: samsung: add Exynos ACPM clock driver Tudor Ambarus
2025-08-21 18:34   ` Brian Masney
2025-08-22  8:14     ` Tudor Ambarus
2025-08-22 10:23       ` Brian Masney
2025-08-22 10:27         ` Tudor Ambarus
2025-08-24 17:10   ` Krzysztof Kozlowski
2025-08-25 12:28     ` Tudor Ambarus

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