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[127.0.0.1]) by director3.derp.mail-out.ovh.net (inspect_sender_mail_agent) with SMTP for ; Thu, 21 Aug 2025 10:19:29 +0000 (UTC) Received: from mta7.priv.ovhmail-u1.ea.mail.ovh.net (unknown [10.109.249.147]) by director3.derp.mail-out.ovh.net (Postfix) with ESMTPS id 4c6zns4FxHz5wDg; Thu, 21 Aug 2025 10:19:29 +0000 (UTC) Received: from orca.pet (unknown [10.1.6.9]) by mta7.priv.ovhmail-u1.ea.mail.ovh.net (Postfix) with ESMTPSA id 353BDB832CD; Thu, 21 Aug 2025 10:19:28 +0000 (UTC) Authentication-Results:garm.ovh; auth=pass (GARM-97G002d21e2e92-e478-449c-be15-b81d5d0ce33e, 684E78C7C579463DAB27E2CA1F9C4E28A39E1181) smtp.auth=marcos@orca.pet X-OVh-ClientIp:147.156.42.5 From: Marcos Del Sol Vives To: linux-kernel@vger.kernel.org Cc: Marcos Del Sol Vives , Linus Walleij , Bartosz Golaszewski , Michael Walle , Lee Jones , Bjorn Helgaas , linux-gpio@vger.kernel.org, linux-pci@vger.kernel.org Subject: [PATCH v3 0/3] Introduce support for Vortex GPIO pins Date: Thu, 21 Aug 2025 12:18:56 +0200 Message-Id: <20250821101902.626329-1-marcos@orca.pet> X-Mailer: git-send-email 2.34.1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Ovh-Tracer-Id: 17487758829186930278 X-VR-SPAMSTATE: OK X-VR-SPAMSCORE: -100 X-VR-SPAMCAUSE: gggruggvucftvghtrhhoucdtuddrgeeffedrtdefgdduiedtleekucetufdoteggodetrfdotffvucfrrhhofhhilhgvmecuqfggjfdpvefjgfevmfevgfenuceurghilhhouhhtmecuhedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmnecujfgurhephffvvefufffkofgggfestdekredtredttdenucfhrhhomhepofgrrhgtohhsucffvghlucfuohhlucggihhvvghsuceomhgrrhgtohhssehorhgtrgdrphgvtheqnecuggftrfgrthhtvghrnhepgffhgfefvefghfetveevgffhleffjedvjeekieejgeeiuddvffetieejjeejgfegnecukfhppeduvdejrddtrddtrddupddugeejrdduheeirdegvddrheenucevlhhushhtvghrufhiiigvpedtnecurfgrrhgrmhepihhnvghtpeduvdejrddtrddtrddupdhmrghilhhfrhhomhepmhgrrhgtohhssehorhgtrgdrphgvthdpnhgspghrtghpthhtohepledprhgtphhtthhopegsrhhglhessghguggvvhdrphhlpdhrtghpthhtohepsghhvghlghgrrghssehgohhoghhlvgdrtghomhdprhgtphhtthhopehlvggvsehkvghrnhgvlhdrohhrghdprhgtphhtthhopehmfigrlhhlvgeskhgvrhhnvghlrdhorhhgpdhrtghpthhtoheplhhinhhushdrfigrlhhlvghijheslhhinhgrrhhordhorhhgpdhrtghpthhtohepmhgrrhgtohhssehorhgtrgdrphgvthdprhgtphhtthhopehlihhnuhigqdhgphhiohesvhhgvghrrdhkvghrnhgvlhdrohhrgh dprhgtphhtthhopehlihhnuhigqdhkvghrnhgvlhesvhhgvghrrdhkvghrnhgvlhdrohhrghdprhgtphhtthhopehlihhnuhigqdhptghisehvghgvrhdrkhgvrhhnvghlrdhorhhg DKIM-Signature: a=rsa-sha256; bh=+QxckdVwic+8yzAxhOHqkLVteyChvAdbEUUs0+d9kek=; c=relaxed/relaxed; d=orca.pet; h=From; s=ovhmo-selector-1; t=1755771569; v=1; b=AxvdEdXqMVwLtMJhi6jOy7ehSdcR3/yQ7W7ccatuoMg4CF34HeBuJV79X0cgHWsYFTndlQpR haXSzYTpUjqLuzKbVVW44tfNiKa+ti80Bz0LLTcc/U/e/Byq4gAznVxRfGs1siYgTtkcGPcbB9Z kwy1N1UKsYaA36rg6nU7g86MkdTmIxpjTFwqZrCMH1ReMka3GgrRbz4djKu9E4meY8H3348RuzN KjdWPHQ7FdkRDrrktyj3xB3NKraZMKrD0/ydoqzRdmZzUhEQ5PFrme7fSWhdm8L8JeOgXq6EbgP iCHToPl+w/3hJTM7IOdGIGW2L/yTaR/MPcn5F2wcC5TCw== This series of patches add support for the GPIO pins exposed on the southbridge of DM&P's Vortex86 line of SoCs, using a new GPIO driver plus a MFD driver to automatically load the driver in supported platforms. Marcos Del Sol Vives (3): gpio: gpio-regmap: add flags to control some behaviour gpio: vortex: add new GPIO device driver mfd: vortex: implement new driver for Vortex southbridges MAINTAINERS | 6 ++ drivers/gpio/Kconfig | 11 ++++ drivers/gpio/Makefile | 1 + drivers/gpio/gpio-regmap.c | 17 +++++- drivers/gpio/gpio-vortex.c | 110 ++++++++++++++++++++++++++++++++++++ drivers/mfd/Kconfig | 9 +++ drivers/mfd/Makefile | 1 + drivers/mfd/vortex-sb.c | 81 ++++++++++++++++++++++++++ include/linux/gpio/regmap.h | 17 ++++++ include/linux/pci_ids.h | 1 + 10 files changed, 253 insertions(+), 1 deletion(-) create mode 100644 drivers/gpio/gpio-vortex.c create mode 100644 drivers/mfd/vortex-sb.c -- 2.34.1