From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mx08-00178001.pphosted.com (mx08-00178001.pphosted.com [91.207.212.93]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8301E3128D8; Fri, 22 Aug 2025 14:38:44 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=91.207.212.93 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1755873527; cv=none; b=LuDMMrqInczTxCMYTFPZCyjQmzNW1qF2BSGYUpOL6V7S7wjOyYJlmyOlKtBqwatDcGiXG6fD8naYM00xRiMnKZAHDa1USdaaagH1Hl1UwlaKLTIuDo6Y8+PVHCupAXd+5VKDcmBkMtzKg76xTKB+Rt6mBlGO5o8jxE8BZX6KqJU= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1755873527; c=relaxed/simple; bh=iC805GY06jQ2vQyfs/NsO3eMSQauxIxQndR3sPcxqUo=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=SKuw4yfAYHlgRQDJQ7EfKt2UnHggei3AHKTNBMhsvrBEfLjrwus8Uc6JfIHzTmOy6qE6+x/fJm26FP4B7KOlBATaidGqo8U2tnSuOPVSfJye6N4cfLj1gm/Y9uhvtebgyHt1BP+X/ssXevx1N/J7wFyIwA8t5TyHPY1tDOg1w3A= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=foss.st.com; spf=pass smtp.mailfrom=foss.st.com; dkim=pass (2048-bit key) header.d=foss.st.com header.i=@foss.st.com header.b=6EjT3OZm; arc=none smtp.client-ip=91.207.212.93 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=foss.st.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=foss.st.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=foss.st.com header.i=@foss.st.com header.b="6EjT3OZm" Received: from pps.filterd (m0369457.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 57MD4vwo030182; Fri, 22 Aug 2025 16:38:31 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=selector1; bh= TbYhtjbyyUq8JFdKJZCzhk/KCFpFJgt2NILClH56gSI=; b=6EjT3OZmaSs+Geeu PZPIokYlKvmBp8iiPmPDwmzIWK3FHJGxTwhmk2iidhhupaY80829Hnk8BR6GHK0I 7k9lDxsfFlOA7yj3wfIUbJqdkGokdsRZF7D3grNuc6TLvAheDxNvx32h95RtiA27 Ux7uEFqTD5v1xVMhE/XN0UctOKjUsDlXujlVWndKJO7xc1uqSdUkMpuUtdHkN/m0 RzW4QjOZYWYMnk1jVjdrGqVp717UkbikPDQ/kFw5EH2pf6UwzkH2q1DcA+OzVO5g g6d/58THAPLZ0Rinj441u3JEUU2RPxCCtLMo/vMNJvMAHTTkxJpLxu5P45HWl6cx 9zwbcA== Received: from beta.dmz-ap.st.com (beta.dmz-ap.st.com [138.198.100.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 48n81wu2uu-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 22 Aug 2025 16:38:31 +0200 (MEST) Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-ap.st.com (STMicroelectronics) with ESMTP id 0D8DB4004C; Fri, 22 Aug 2025 16:37:02 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node2.st.com [10.75.129.70]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id A8FF1726F17; Fri, 22 Aug 2025 16:35:54 +0200 (CEST) Received: from localhost (10.130.74.180) by SHFDAG1NODE2.st.com (10.75.129.70) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Fri, 22 Aug 2025 16:35:54 +0200 From: Raphael Gallais-Pou Date: Fri, 22 Aug 2025 16:34:18 +0200 Subject: [PATCH v5 09/13] arm64: dts: st: add ltdc support on stm32mp251 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-ID: <20250822-drm-misc-next-v5-9-9c825e28f733@foss.st.com> References: <20250822-drm-misc-next-v5-0-9c825e28f733@foss.st.com> In-Reply-To: <20250822-drm-misc-next-v5-0-9c825e28f733@foss.st.com> To: Yannick Fertre , Philippe Cornu , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Rob Herring , "Krzysztof Kozlowski" , Conor Dooley , "Maxime Coquelin" , Alexandre Torgue , Catalin Marinas , Will Deacon , Christophe Roullier CC: , , , , X-Mailer: b4 0.14.2 X-ClientProxiedBy: SHFCAS1NODE1.st.com (10.75.129.72) To SHFDAG1NODE2.st.com (10.75.129.70) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-08-22_04,2025-08-20_03,2025-03-28_01 The LCD-TFT Display Controller (LTDC) handles display composition, scaling and rotation. It provides a parallel digital RGB flow to be used by display interfaces. Add the LTDC node. Acked-by: Yannick Fertre Signed-off-by: Raphael Gallais-Pou --- arch/arm64/boot/dts/st/stm32mp251.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm64/boot/dts/st/stm32mp251.dtsi b/arch/arm64/boot/dts/st/stm32mp251.dtsi index 303abf915b8e489671b51a8c832041c14a42ecb8..372a99d9cc5c3730e8fbeddeb6134a3b18d938b6 100644 --- a/arch/arm64/boot/dts/st/stm32mp251.dtsi +++ b/arch/arm64/boot/dts/st/stm32mp251.dtsi @@ -1576,6 +1576,18 @@ dcmipp: dcmipp@48030000 { status = "disabled"; }; + ltdc: display-controller@48010000 { + compatible = "st,stm32mp251-ltdc"; + reg = <0x48010000 0x400>; + interrupts = , + ; + clocks = <&rcc CK_KER_LTDC>, <&rcc CK_BUS_LTDC>; + clock-names = "lcd", "bus"; + resets = <&rcc LTDC_R>; + access-controllers = <&rifsc 80>; + status = "disabled"; + }; + combophy: phy@480c0000 { compatible = "st,stm32mp25-combophy"; reg = <0x480c0000 0x1000>; -- 2.25.1