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charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20250902-drm-state-readout-v1-26-14ad5315da3f@kernel.org> References: <20250902-drm-state-readout-v1-0-14ad5315da3f@kernel.org> In-Reply-To: <20250902-drm-state-readout-v1-0-14ad5315da3f@kernel.org> To: Maarten Lankhorst , Thomas Zimmermann , David Airlie , Simona Vetter , Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , Jyri Sarha , Tomi Valkeinen Cc: Devarsh Thakkar , dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Maxime Ripard X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=2182; i=mripard@kernel.org; h=from:subject:message-id; bh=6y3aIMSfaSkH8Ni+8XNxtNqvzdtes72Di9oihgPJJu4=; b=owGbwMvMwCmsHn9OcpHtvjLG02pJDBnbVh9wOcr5m3HGpdkK/8tfz3TzrfvioLjNav157wiFp e/MXrLadUxlYRDmZJAVU2R5IhN2enn74ioH+5U/YOawMoEMYeDiFICJ2Iox1llMvyhXm+69pWtJ Tf8ubeHlqYu2xe/1NchjSm8onnc431PkcnzTsQ2Nf1Vf73m28/m3k4z1Qc2b/sxQPfF1q/jC3B2 tRybdXPH13Hc2/sK1KYpFLp82rKvO3hu50Nxpwr3YW0wtt57sAwA= X-Developer-Key: i=mripard@kernel.org; a=openpgp; fpr=BE5675C37E818C8B5764241C254BCFC56BF6CE8D Signed-off-by: Maxime Ripard --- drivers/gpu/drm/tidss/tidss_dispc.c | 4 ++-- drivers/gpu/drm/tidss/tidss_dispc.h | 3 +++ 2 files changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/tidss/tidss_dispc.c b/drivers/gpu/drm/tidss/tidss_dispc.c index 2f9cf95d6d0525a02d8adaae968aa551b7e27077..18b6beddfe51f9b5c164481ee2ef0fa289e63318 100644 --- a/drivers/gpu/drm/tidss/tidss_dispc.c +++ b/drivers/gpu/drm/tidss/tidss_dispc.c @@ -504,11 +504,11 @@ void dispc_vid_write(struct dispc_device *dispc, u32 hw_plane, u16 reg, u32 val) CH(dispc); iowrite32(val, base + reg); } -static u32 dispc_vid_read(struct dispc_device *dispc, u32 hw_plane, u16 reg) +u32 dispc_vid_read(struct dispc_device *dispc, u32 hw_plane, u16 reg) { void __iomem *base = dispc->base_vid[hw_plane]; CH(dispc); return ioread32(base + reg); @@ -538,11 +538,11 @@ static void dispc_vp_write(struct dispc_device *dispc, u32 hw_videoport, CH(dispc); iowrite32(val, base + reg); } -static u32 dispc_vp_read(struct dispc_device *dispc, u32 hw_videoport, u16 reg) +u32 dispc_vp_read(struct dispc_device *dispc, u32 hw_videoport, u16 reg) { void __iomem *base = dispc->base_vp[hw_videoport]; CH(dispc); return ioread32(base + reg); diff --git a/drivers/gpu/drm/tidss/tidss_dispc.h b/drivers/gpu/drm/tidss/tidss_dispc.h index f5d5798de1ba550dedbcba36b1ef41d5ecceaa0c..b249cd0da331bf801992a7f38ff9031a5f8da0b8 100644 --- a/drivers/gpu/drm/tidss/tidss_dispc.h +++ b/drivers/gpu/drm/tidss/tidss_dispc.h @@ -181,9 +181,12 @@ void dispc_plane_setup(struct dispc_device *dispc, u32 hw_plane, u32 hw_videoport); void dispc_plane_enable(struct dispc_device *dispc, u32 hw_plane, bool enable); const u32 *dispc_plane_formats(struct dispc_device *dispc, unsigned int *len); u32 dispc_plane_find_fourcc_by_dss_code(u8 code); +u32 dispc_vid_read(struct dispc_device *dispc, u32 hw_plane, u16 reg); +u32 dispc_vp_read(struct dispc_device *dispc, u32 hw_videoport, u16 reg); + int dispc_init(struct tidss_device *tidss); void dispc_remove(struct tidss_device *tidss); #endif -- 2.50.1