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* [PATCH] PCI: mvebu: Fix the use of the for_each_of_range() iterator
@ 2025-09-02 15:13 Klaus Kudielka
  2025-09-03  1:38 ` Rob Herring
                   ` (2 more replies)
  0 siblings, 3 replies; 6+ messages in thread
From: Klaus Kudielka @ 2025-09-02 15:13 UTC (permalink / raw)
  To: Thomas Petazzoni, Pali Rohár, Lorenzo Pieralisi,
	Krzysztof Wilczyński, Manivannan Sadhasivam, Rob Herring,
	Bjorn Helgaas, linux-pci, linux-arm-kernel, linux-kernel
  Cc: Klaus Kudielka, Bjorn Helgaas, Jan Palus

The blamed commit simplifies code, by using the for_each_of_range()
iterator. But it results in no pci devices being detected anymore on
Turris Omnia (and probably other mvebu targets).

Analysis:

To determine range.flags, of_pci_range_parser_one() uses bus->get_flags(),
which resolves to of_bus_pci_get_flags(). That function already returns an
IORESOURCE bit field, and NOT the original flags from the "ranges"
resource.

Then mvebu_get_tgt_attr() attempts the very same conversion again.
But this is a misinterpretation of range.flags.

Remove the misinterpretation of range.flags in mvebu_get_tgt_addr(),
to restore the intended behavior.

Signed-off-by: Klaus Kudielka <klaus.kudielka@gmail.com>
Fixes: 5da3d94a23c6 ("PCI: mvebu: Use for_each_of_range() iterator for parsing "ranges"")
Reported-by: Bjorn Helgaas <helgaas@kernel.org>
Closes: https://lore.kernel.org/r/20250820184603.GA633069@bhelgaas/
Reported-by: Jan Palus <jpalus@fastmail.com>
Closes: https://bugzilla.kernel.org/show_bug.cgi?id=220479
---
 drivers/pci/controller/pci-mvebu.c | 14 ++------------
 1 file changed, 2 insertions(+), 12 deletions(-)

diff --git a/drivers/pci/controller/pci-mvebu.c b/drivers/pci/controller/pci-mvebu.c
index 755651f338..4e2e1fa197 100644
--- a/drivers/pci/controller/pci-mvebu.c
+++ b/drivers/pci/controller/pci-mvebu.c
@@ -1168,9 +1168,6 @@ static void __iomem *mvebu_pcie_map_registers(struct platform_device *pdev,
 	return devm_ioremap_resource(&pdev->dev, &port->regs);
 }
 
-#define DT_FLAGS_TO_TYPE(flags)       (((flags) >> 24) & 0x03)
-#define    DT_TYPE_IO                 0x1
-#define    DT_TYPE_MEM32              0x2
 #define DT_CPUADDR_TO_TARGET(cpuaddr) (((cpuaddr) >> 56) & 0xFF)
 #define DT_CPUADDR_TO_ATTR(cpuaddr)   (((cpuaddr) >> 48) & 0xFF)
 
@@ -1189,17 +1186,10 @@ static int mvebu_get_tgt_attr(struct device_node *np, int devfn,
 		return -EINVAL;
 
 	for_each_of_range(&parser, &range) {
-		unsigned long rtype;
 		u32 slot = upper_32_bits(range.bus_addr);
 
-		if (DT_FLAGS_TO_TYPE(range.flags) == DT_TYPE_IO)
-			rtype = IORESOURCE_IO;
-		else if (DT_FLAGS_TO_TYPE(range.flags) == DT_TYPE_MEM32)
-			rtype = IORESOURCE_MEM;
-		else
-			continue;
-
-		if (slot == PCI_SLOT(devfn) && type == rtype) {
+		if (slot == PCI_SLOT(devfn) &&
+		    type == (range.flags & IORESOURCE_TYPE_BITS)) {
 			*tgt = DT_CPUADDR_TO_TARGET(range.cpu_addr);
 			*attr = DT_CPUADDR_TO_ATTR(range.cpu_addr);
 			return 0;
-- 
2.50.1


^ permalink raw reply related	[flat|nested] 6+ messages in thread

* Re: [PATCH] PCI: mvebu: Fix the use of the for_each_of_range() iterator
  2025-09-02 15:13 [PATCH] PCI: mvebu: Fix the use of the for_each_of_range() iterator Klaus Kudielka
@ 2025-09-03  1:38 ` Rob Herring
  2025-09-03 12:44 ` Jan Palus
  2025-09-03 17:33 ` Jan Palus
  2 siblings, 0 replies; 6+ messages in thread
From: Rob Herring @ 2025-09-03  1:38 UTC (permalink / raw)
  To: Klaus Kudielka
  Cc: Thomas Petazzoni, Pali Rohár, Lorenzo Pieralisi,
	Krzysztof Wilczyński, Manivannan Sadhasivam, Bjorn Helgaas,
	linux-pci, linux-arm-kernel, linux-kernel, Bjorn Helgaas,
	Jan Palus

On Tue, Sep 2, 2025 at 10:17 AM Klaus Kudielka <klaus.kudielka@gmail.com> wrote:
>
> The blamed commit simplifies code, by using the for_each_of_range()
> iterator. But it results in no pci devices being detected anymore on
> Turris Omnia (and probably other mvebu targets).
>
> Analysis:
>
> To determine range.flags, of_pci_range_parser_one() uses bus->get_flags(),
> which resolves to of_bus_pci_get_flags(). That function already returns an
> IORESOURCE bit field, and NOT the original flags from the "ranges"
> resource.
>
> Then mvebu_get_tgt_attr() attempts the very same conversion again.
> But this is a misinterpretation of range.flags.
>
> Remove the misinterpretation of range.flags in mvebu_get_tgt_addr(),
> to restore the intended behavior.
>
> Signed-off-by: Klaus Kudielka <klaus.kudielka@gmail.com>
> Fixes: 5da3d94a23c6 ("PCI: mvebu: Use for_each_of_range() iterator for parsing "ranges"")
> Reported-by: Bjorn Helgaas <helgaas@kernel.org>
> Closes: https://lore.kernel.org/r/20250820184603.GA633069@bhelgaas/
> Reported-by: Jan Palus <jpalus@fastmail.com>
> Closes: https://bugzilla.kernel.org/show_bug.cgi?id=220479
> ---
>  drivers/pci/controller/pci-mvebu.c | 14 ++------------
>  1 file changed, 2 insertions(+), 12 deletions(-)

Thanks for debugging this. And the code is further simplified which is
even better!

Acked-by: Rob Herring (Arm) <robh@kernel.org>

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH] PCI: mvebu: Fix the use of the for_each_of_range() iterator
  2025-09-02 15:13 [PATCH] PCI: mvebu: Fix the use of the for_each_of_range() iterator Klaus Kudielka
  2025-09-03  1:38 ` Rob Herring
@ 2025-09-03 12:44 ` Jan Palus
  2025-09-03 15:29   ` Rob Herring
  2025-09-03 17:33 ` Jan Palus
  2 siblings, 1 reply; 6+ messages in thread
From: Jan Palus @ 2025-09-03 12:44 UTC (permalink / raw)
  To: Klaus Kudielka
  Cc: Thomas Petazzoni, Pali Rohár, Lorenzo Pieralisi,
	Krzysztof Wilczyński, Manivannan Sadhasivam, Rob Herring,
	Bjorn Helgaas, linux-pci, linux-arm-kernel, linux-kernel,
	Bjorn Helgaas

On 02.09.2025 17:13, Klaus Kudielka wrote:
> The blamed commit simplifies code, by using the for_each_of_range()
> iterator. But it results in no pci devices being detected anymore on
> Turris Omnia (and probably other mvebu targets).
> 
> Analysis:
> 
> To determine range.flags, of_pci_range_parser_one() uses bus->get_flags(),
> which resolves to of_bus_pci_get_flags(). That function already returns an
> IORESOURCE bit field, and NOT the original flags from the "ranges"
> resource.
> 
> Then mvebu_get_tgt_attr() attempts the very same conversion again.
> But this is a misinterpretation of range.flags.
> 
> Remove the misinterpretation of range.flags in mvebu_get_tgt_addr(),
> to restore the intended behavior.
> 
> Signed-off-by: Klaus Kudielka <klaus.kudielka@gmail.com>
> Fixes: 5da3d94a23c6 ("PCI: mvebu: Use for_each_of_range() iterator for parsing "ranges"")
> Reported-by: Bjorn Helgaas <helgaas@kernel.org>
> Closes: https://lore.kernel.org/r/20250820184603.GA633069@bhelgaas/
> Reported-by: Jan Palus <jpalus@fastmail.com>
> Closes: https://bugzilla.kernel.org/show_bug.cgi?id=220479
> ---
>  drivers/pci/controller/pci-mvebu.c | 14 ++------------
>  1 file changed, 2 insertions(+), 12 deletions(-)
> 
> diff --git a/drivers/pci/controller/pci-mvebu.c b/drivers/pci/controller/pci-mvebu.c
> index 755651f338..4e2e1fa197 100644
> --- a/drivers/pci/controller/pci-mvebu.c
> +++ b/drivers/pci/controller/pci-mvebu.c
> @@ -1168,9 +1168,6 @@ static void __iomem *mvebu_pcie_map_registers(struct platform_device *pdev,
>  	return devm_ioremap_resource(&pdev->dev, &port->regs);
>  }
>  
> -#define DT_FLAGS_TO_TYPE(flags)       (((flags) >> 24) & 0x03)
> -#define    DT_TYPE_IO                 0x1
> -#define    DT_TYPE_MEM32              0x2
>  #define DT_CPUADDR_TO_TARGET(cpuaddr) (((cpuaddr) >> 56) & 0xFF)
>  #define DT_CPUADDR_TO_ATTR(cpuaddr)   (((cpuaddr) >> 48) & 0xFF)
>  
> @@ -1189,17 +1186,10 @@ static int mvebu_get_tgt_attr(struct device_node *np, int devfn,
>  		return -EINVAL;
>  
>  	for_each_of_range(&parser, &range) {
> -		unsigned long rtype;
>  		u32 slot = upper_32_bits(range.bus_addr);
>  
> -		if (DT_FLAGS_TO_TYPE(range.flags) == DT_TYPE_IO)
> -			rtype = IORESOURCE_IO;
> -		else if (DT_FLAGS_TO_TYPE(range.flags) == DT_TYPE_MEM32)
> -			rtype = IORESOURCE_MEM;
> -		else
> -			continue;
> -
> -		if (slot == PCI_SLOT(devfn) && type == rtype) {
> +		if (slot == PCI_SLOT(devfn) &&
> +		    type == (range.flags & IORESOURCE_TYPE_BITS)) {
>  			*tgt = DT_CPUADDR_TO_TARGET(range.cpu_addr);
>  			*attr = DT_CPUADDR_TO_ATTR(range.cpu_addr);

Thanks for the patch Klaus! While it does improve situation we're not
quite there yet. It appears that what used to be stored in `cpuaddr` var
is also very different from `range.cpu_addr` value so the results
in both `*tgt` and `*attr` are both wrong.

Previously `cpuaddr` had a value like ie 0x8e8000000000000 or
0x4d0000000000000. Now `range.cpu_addr` is always 0xffffffffffffffff.
Luckily what used to be stored in `cpuaddr`:

u64 cpuaddr = of_read_number(range + na, pna)

appears to be stored in range.pci_bus_addr now. I can't make any
informed comment about this discrepancy however I can confirm following
change (in addition to your patch) makes mvebu driver work again (or at
least like it used to work in 6.15, it still needs Pali's patches to
have some devices working):

-			*tgt = DT_CPUADDR_TO_TARGET(range.cpu_addr);
-			*attr = DT_CPUADDR_TO_ATTR(range.cpu_addr);
+			*tgt = DT_CPUADDR_TO_TARGET(range.parent_bus_addr);
+			*attr = DT_CPUADDR_TO_ATTR(range.parent_bus_addr);

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH] PCI: mvebu: Fix the use of the for_each_of_range() iterator
  2025-09-03 12:44 ` Jan Palus
@ 2025-09-03 15:29   ` Rob Herring
  2025-09-03 17:31     ` Jan Palus
  0 siblings, 1 reply; 6+ messages in thread
From: Rob Herring @ 2025-09-03 15:29 UTC (permalink / raw)
  To: Jan Palus
  Cc: Klaus Kudielka, Thomas Petazzoni, Pali Rohár,
	Lorenzo Pieralisi, Krzysztof Wilczyński,
	Manivannan Sadhasivam, Bjorn Helgaas, linux-pci, linux-arm-kernel,
	linux-kernel, Bjorn Helgaas

On Wed, Sep 3, 2025 at 7:44 AM Jan Palus <jpalus@fastmail.com> wrote:
>
> On 02.09.2025 17:13, Klaus Kudielka wrote:
> > The blamed commit simplifies code, by using the for_each_of_range()
> > iterator. But it results in no pci devices being detected anymore on
> > Turris Omnia (and probably other mvebu targets).
> >
> > Analysis:
> >
> > To determine range.flags, of_pci_range_parser_one() uses bus->get_flags(),
> > which resolves to of_bus_pci_get_flags(). That function already returns an
> > IORESOURCE bit field, and NOT the original flags from the "ranges"
> > resource.
> >
> > Then mvebu_get_tgt_attr() attempts the very same conversion again.
> > But this is a misinterpretation of range.flags.
> >
> > Remove the misinterpretation of range.flags in mvebu_get_tgt_addr(),
> > to restore the intended behavior.
> >
> > Signed-off-by: Klaus Kudielka <klaus.kudielka@gmail.com>
> > Fixes: 5da3d94a23c6 ("PCI: mvebu: Use for_each_of_range() iterator for parsing "ranges"")
> > Reported-by: Bjorn Helgaas <helgaas@kernel.org>
> > Closes: https://lore.kernel.org/r/20250820184603.GA633069@bhelgaas/
> > Reported-by: Jan Palus <jpalus@fastmail.com>
> > Closes: https://bugzilla.kernel.org/show_bug.cgi?id=220479
> > ---
> >  drivers/pci/controller/pci-mvebu.c | 14 ++------------
> >  1 file changed, 2 insertions(+), 12 deletions(-)
> >
> > diff --git a/drivers/pci/controller/pci-mvebu.c b/drivers/pci/controller/pci-mvebu.c
> > index 755651f338..4e2e1fa197 100644
> > --- a/drivers/pci/controller/pci-mvebu.c
> > +++ b/drivers/pci/controller/pci-mvebu.c
> > @@ -1168,9 +1168,6 @@ static void __iomem *mvebu_pcie_map_registers(struct platform_device *pdev,
> >       return devm_ioremap_resource(&pdev->dev, &port->regs);
> >  }
> >
> > -#define DT_FLAGS_TO_TYPE(flags)       (((flags) >> 24) & 0x03)
> > -#define    DT_TYPE_IO                 0x1
> > -#define    DT_TYPE_MEM32              0x2
> >  #define DT_CPUADDR_TO_TARGET(cpuaddr) (((cpuaddr) >> 56) & 0xFF)
> >  #define DT_CPUADDR_TO_ATTR(cpuaddr)   (((cpuaddr) >> 48) & 0xFF)
> >
> > @@ -1189,17 +1186,10 @@ static int mvebu_get_tgt_attr(struct device_node *np, int devfn,
> >               return -EINVAL;
> >
> >       for_each_of_range(&parser, &range) {
> > -             unsigned long rtype;
> >               u32 slot = upper_32_bits(range.bus_addr);
> >
> > -             if (DT_FLAGS_TO_TYPE(range.flags) == DT_TYPE_IO)
> > -                     rtype = IORESOURCE_IO;
> > -             else if (DT_FLAGS_TO_TYPE(range.flags) == DT_TYPE_MEM32)
> > -                     rtype = IORESOURCE_MEM;
> > -             else
> > -                     continue;
> > -
> > -             if (slot == PCI_SLOT(devfn) && type == rtype) {
> > +             if (slot == PCI_SLOT(devfn) &&
> > +                 type == (range.flags & IORESOURCE_TYPE_BITS)) {
> >                       *tgt = DT_CPUADDR_TO_TARGET(range.cpu_addr);
> >                       *attr = DT_CPUADDR_TO_ATTR(range.cpu_addr);
>
> Thanks for the patch Klaus! While it does improve situation we're not
> quite there yet. It appears that what used to be stored in `cpuaddr` var
> is also very different from `range.cpu_addr` value so the results
> in both `*tgt` and `*attr` are both wrong.
>
> Previously `cpuaddr` had a value like ie 0x8e8000000000000 or
> 0x4d0000000000000. Now `range.cpu_addr` is always 0xffffffffffffffff.
> Luckily what used to be stored in `cpuaddr`:

~0 is OF_BAD_ADDR which means we couldn't translate the address. Seems
it is not needed here, but it should work. Can you define DEBUG in
drivers/of/address.c and post the log?

Rob

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH] PCI: mvebu: Fix the use of the for_each_of_range() iterator
  2025-09-03 15:29   ` Rob Herring
@ 2025-09-03 17:31     ` Jan Palus
  0 siblings, 0 replies; 6+ messages in thread
From: Jan Palus @ 2025-09-03 17:31 UTC (permalink / raw)
  To: Rob Herring
  Cc: Klaus Kudielka, Thomas Petazzoni, Pali Rohár,
	Lorenzo Pieralisi, Krzysztof Wilczyński,
	Manivannan Sadhasivam, Bjorn Helgaas, linux-pci, linux-arm-kernel,
	linux-kernel, Bjorn Helgaas

On 03.09.2025 10:29, Rob Herring wrote:
> On Wed, Sep 3, 2025 at 7:44 AM Jan Palus <jpalus@fastmail.com> wrote:
> >
> > On 02.09.2025 17:13, Klaus Kudielka wrote:
> > > The blamed commit simplifies code, by using the for_each_of_range()
> > > iterator. But it results in no pci devices being detected anymore on
> > > Turris Omnia (and probably other mvebu targets).
> > >
> > > Analysis:
> > >
> > > To determine range.flags, of_pci_range_parser_one() uses bus->get_flags(),
> > > which resolves to of_bus_pci_get_flags(). That function already returns an
> > > IORESOURCE bit field, and NOT the original flags from the "ranges"
> > > resource.
> > >
> > > Then mvebu_get_tgt_attr() attempts the very same conversion again.
> > > But this is a misinterpretation of range.flags.
> > >
> > > Remove the misinterpretation of range.flags in mvebu_get_tgt_addr(),
> > > to restore the intended behavior.
> > >
> > > Signed-off-by: Klaus Kudielka <klaus.kudielka@gmail.com>
> > > Fixes: 5da3d94a23c6 ("PCI: mvebu: Use for_each_of_range() iterator for parsing "ranges"")
> > > Reported-by: Bjorn Helgaas <helgaas@kernel.org>
> > > Closes: https://lore.kernel.org/r/20250820184603.GA633069@bhelgaas/
> > > Reported-by: Jan Palus <jpalus@fastmail.com>
> > > Closes: https://bugzilla.kernel.org/show_bug.cgi?id=220479
> > > ---
> > >  drivers/pci/controller/pci-mvebu.c | 14 ++------------
> > >  1 file changed, 2 insertions(+), 12 deletions(-)
> > >
> > > diff --git a/drivers/pci/controller/pci-mvebu.c b/drivers/pci/controller/pci-mvebu.c
> > > index 755651f338..4e2e1fa197 100644
> > > --- a/drivers/pci/controller/pci-mvebu.c
> > > +++ b/drivers/pci/controller/pci-mvebu.c
> > > @@ -1168,9 +1168,6 @@ static void __iomem *mvebu_pcie_map_registers(struct platform_device *pdev,
> > >       return devm_ioremap_resource(&pdev->dev, &port->regs);
> > >  }
> > >
> > > -#define DT_FLAGS_TO_TYPE(flags)       (((flags) >> 24) & 0x03)
> > > -#define    DT_TYPE_IO                 0x1
> > > -#define    DT_TYPE_MEM32              0x2
> > >  #define DT_CPUADDR_TO_TARGET(cpuaddr) (((cpuaddr) >> 56) & 0xFF)
> > >  #define DT_CPUADDR_TO_ATTR(cpuaddr)   (((cpuaddr) >> 48) & 0xFF)
> > >
> > > @@ -1189,17 +1186,10 @@ static int mvebu_get_tgt_attr(struct device_node *np, int devfn,
> > >               return -EINVAL;
> > >
> > >       for_each_of_range(&parser, &range) {
> > > -             unsigned long rtype;
> > >               u32 slot = upper_32_bits(range.bus_addr);
> > >
> > > -             if (DT_FLAGS_TO_TYPE(range.flags) == DT_TYPE_IO)
> > > -                     rtype = IORESOURCE_IO;
> > > -             else if (DT_FLAGS_TO_TYPE(range.flags) == DT_TYPE_MEM32)
> > > -                     rtype = IORESOURCE_MEM;
> > > -             else
> > > -                     continue;
> > > -
> > > -             if (slot == PCI_SLOT(devfn) && type == rtype) {
> > > +             if (slot == PCI_SLOT(devfn) &&
> > > +                 type == (range.flags & IORESOURCE_TYPE_BITS)) {
> > >                       *tgt = DT_CPUADDR_TO_TARGET(range.cpu_addr);
> > >                       *attr = DT_CPUADDR_TO_ATTR(range.cpu_addr);
> >
> > Thanks for the patch Klaus! While it does improve situation we're not
> > quite there yet. It appears that what used to be stored in `cpuaddr` var
> > is also very different from `range.cpu_addr` value so the results
> > in both `*tgt` and `*attr` are both wrong.
> >
> > Previously `cpuaddr` had a value like ie 0x8e8000000000000 or
> > 0x4d0000000000000. Now `range.cpu_addr` is always 0xffffffffffffffff.
> > Luckily what used to be stored in `cpuaddr`:
> 
> ~0 is OF_BAD_ADDR which means we couldn't translate the address. Seems
> it is not needed here, but it should work. Can you define DEBUG in
> drivers/of/address.c and post the log?

All of OF: entries from pci initialization (with explicit marks where
mvebu_get_tgt_attr() enters and exits):

mvebu-pcie soc:pcie: host bridge /soc/pcie ranges:
OF: ** translation for device /soc/pcie **
OF: bus is default (na=2, ns=1) on /soc
OF: translating address: f0010000 00080000
OF: parent bus is default (na=1, ns=1) on 
OF: walking ranges...
OF: default map, cp=f001000000000000, s=100000, da=f001000000080000
OF: parent translation for: f1000000
OF: with offset: 80000
OF: one level translation: f1080000
OF: reached root node
OF: ** translation for device /soc/pcie **
OF: bus is default (na=2, ns=1) on /soc
OF: translating address: f0010000 00040000
OF: parent bus is default (na=1, ns=1) on 
OF: walking ranges...
OF: default map, cp=f001000000000000, s=100000, da=f001000000040000
OF: parent translation for: f1000000
OF: with offset: 40000
OF: one level translation: f1040000
OF: reached root node
mvebu-pcie soc:pcie:      MEM 0x00f1080000..0x00f1081fff -> 0x0000080000
OF: ** translation for device /soc/pcie **
OF: bus is default (na=2, ns=1) on /soc
OF: translating address: f0010000 00040000
OF: parent bus is default (na=1, ns=1) on 
OF: walking ranges...
OF: default map, cp=f001000000000000, s=100000, da=f001000000040000
OF: parent translation for: f1000000
OF: with offset: 40000
OF: one level translation: f1040000
OF: reached root node
OF: ** translation for device /soc/pcie **
OF: bus is default (na=2, ns=1) on /soc
OF: translating address: f0010000 00044000
OF: parent bus is default (na=1, ns=1) on 
OF: walking ranges...
OF: default map, cp=f001000000000000, s=100000, da=f001000000044000
OF: parent translation for: f1000000
OF: with offset: 44000
OF: one level translation: f1044000
OF: reached root node
mvebu-pcie soc:pcie:      MEM 0x00f1040000..0x00f1041fff -> 0x0000040000
OF: ** translation for device /soc/pcie **
OF: bus is default (na=2, ns=1) on /soc
OF: translating address: f0010000 00044000
OF: parent bus is default (na=1, ns=1) on 
OF: walking ranges...
OF: default map, cp=f001000000000000, s=100000, da=f001000000044000
OF: parent translation for: f1000000
OF: with offset: 44000
OF: one level translation: f1044000
OF: reached root node
OF: ** translation for device /soc/pcie **
OF: bus is default (na=2, ns=1) on /soc
OF: translating address: f0010000 00048000
OF: parent bus is default (na=1, ns=1) on 
OF: walking ranges...
OF: default map, cp=f001000000000000, s=100000, da=f001000000048000
OF: parent translation for: f1000000
OF: with offset: 48000
OF: one level translation: f1048000
OF: reached root node
mvebu-pcie soc:pcie:      MEM 0x00f1044000..0x00f1045fff -> 0x0000044000
OF: ** translation for device /soc/pcie **
OF: bus is default (na=2, ns=1) on /soc
OF: translating address: f0010000 00048000
OF: parent bus is default (na=1, ns=1) on 
OF: walking ranges...
OF: default map, cp=f001000000000000, s=100000, da=f001000000048000
OF: parent translation for: f1000000
OF: with offset: 48000
OF: one level translation: f1048000
OF: reached root node
OF: ** translation for device /soc/pcie **
OF: bus is default (na=2, ns=1) on /soc
OF: translating address: 08e80000 00000000
OF: parent bus is default (na=1, ns=1) on 
OF: walking ranges...
OF: default map, cp=f001000000000000, s=100000, da=8e8000000000000
OF: default map, cp=11d000000000000, s=100000, da=8e8000000000000
OF: default map, cp=919000000000000, s=10000, da=8e8000000000000
OF: default map, cp=915000000000000, s=10000, da=8e8000000000000
OF: default map, cp=c04000000000000, s=100000, da=8e8000000000000
OF: not found !
mvebu-pcie soc:pcie:      MEM 0x00f1048000..0x00f1049fff -> 0x0000048000
OF: ** translation for device /soc/pcie **
OF: bus is default (na=2, ns=1) on /soc
OF: translating address: 08e80000 00000000
OF: parent bus is default (na=1, ns=1) on 
OF: walking ranges...
OF: default map, cp=f001000000000000, s=100000, da=8e8000000000000
OF: default map, cp=11d000000000000, s=100000, da=8e8000000000000
OF: default map, cp=919000000000000, s=10000, da=8e8000000000000
OF: default map, cp=915000000000000, s=10000, da=8e8000000000000
OF: default map, cp=c04000000000000, s=100000, da=8e8000000000000
OF: not found !
OF: ** translation for device /soc/pcie **
OF: bus is default (na=2, ns=1) on /soc
OF: translating address: 08e00000 00000000
OF: parent bus is default (na=1, ns=1) on 
OF: walking ranges...
OF: default map, cp=f001000000000000, s=100000, da=8e0000000000000
OF: default map, cp=11d000000000000, s=100000, da=8e0000000000000
OF: default map, cp=919000000000000, s=10000, da=8e0000000000000
OF: default map, cp=915000000000000, s=10000, da=8e0000000000000
OF: default map, cp=c04000000000000, s=100000, da=8e0000000000000
OF: not found !
mvebu-pcie soc:pcie:      MEM 0xffffffffffffffff..0x00fffffffe -> 0x0100000000
OF: ** translation for device /soc/pcie **
OF: bus is default (na=2, ns=1) on /soc
OF: translating address: 08e00000 00000000
OF: parent bus is default (na=1, ns=1) on 
OF: walking ranges...
OF: default map, cp=f001000000000000, s=100000, da=8e0000000000000
OF: default map, cp=11d000000000000, s=100000, da=8e0000000000000
OF: default map, cp=919000000000000, s=10000, da=8e0000000000000
OF: default map, cp=915000000000000, s=10000, da=8e0000000000000
OF: default map, cp=c04000000000000, s=100000, da=8e0000000000000
OF: not found !
OF: ** translation for device /soc/pcie **
OF: bus is default (na=2, ns=1) on /soc
OF: translating address: 04e80000 00000000
OF: parent bus is default (na=1, ns=1) on 
OF: walking ranges...
OF: default map, cp=f001000000000000, s=100000, da=4e8000000000000
OF: default map, cp=11d000000000000, s=100000, da=4e8000000000000
OF: default map, cp=919000000000000, s=10000, da=4e8000000000000
OF: default map, cp=915000000000000, s=10000, da=4e8000000000000
OF: default map, cp=c04000000000000, s=100000, da=4e8000000000000
OF: not found !
mvebu-pcie soc:pcie:       IO 0xffffffffffffffff..0x00fffffffe -> 0x0100000000
OF: ** translation for device /soc/pcie **
OF: bus is default (na=2, ns=1) on /soc
OF: translating address: 04e80000 00000000
OF: parent bus is default (na=1, ns=1) on 
OF: walking ranges...
OF: default map, cp=f001000000000000, s=100000, da=4e8000000000000
OF: default map, cp=11d000000000000, s=100000, da=4e8000000000000
OF: default map, cp=919000000000000, s=10000, da=4e8000000000000
OF: default map, cp=915000000000000, s=10000, da=4e8000000000000
OF: default map, cp=c04000000000000, s=100000, da=4e8000000000000
OF: not found !
OF: ** translation for device /soc/pcie **
OF: bus is default (na=2, ns=1) on /soc
OF: translating address: 04e00000 00000000
OF: parent bus is default (na=1, ns=1) on 
OF: walking ranges...
OF: default map, cp=f001000000000000, s=100000, da=4e0000000000000
OF: default map, cp=11d000000000000, s=100000, da=4e0000000000000
OF: default map, cp=919000000000000, s=10000, da=4e0000000000000
OF: default map, cp=915000000000000, s=10000, da=4e0000000000000
OF: default map, cp=c04000000000000, s=100000, da=4e0000000000000
OF: not found !
mvebu-pcie soc:pcie:      MEM 0xffffffffffffffff..0x00fffffffe -> 0x0200000000
OF: ** translation for device /soc/pcie **
OF: bus is default (na=2, ns=1) on /soc
OF: translating address: 04e00000 00000000
OF: parent bus is default (na=1, ns=1) on 
OF: walking ranges...
OF: default map, cp=f001000000000000, s=100000, da=4e0000000000000
OF: default map, cp=11d000000000000, s=100000, da=4e0000000000000
OF: default map, cp=919000000000000, s=10000, da=4e0000000000000
OF: default map, cp=915000000000000, s=10000, da=4e0000000000000
OF: default map, cp=c04000000000000, s=100000, da=4e0000000000000
OF: not found !
OF: ** translation for device /soc/pcie **
OF: bus is default (na=2, ns=1) on /soc
OF: translating address: 04d80000 00000000
OF: parent bus is default (na=1, ns=1) on 
OF: walking ranges...
OF: default map, cp=f001000000000000, s=100000, da=4d8000000000000
OF: default map, cp=11d000000000000, s=100000, da=4d8000000000000
OF: default map, cp=919000000000000, s=10000, da=4d8000000000000
OF: default map, cp=915000000000000, s=10000, da=4d8000000000000
OF: default map, cp=c04000000000000, s=100000, da=4d8000000000000
OF: not found !
mvebu-pcie soc:pcie:       IO 0xffffffffffffffff..0x00fffffffe -> 0x0200000000
OF: ** translation for device /soc/pcie **
OF: bus is default (na=2, ns=1) on /soc
OF: translating address: 04d80000 00000000
OF: parent bus is default (na=1, ns=1) on 
OF: walking ranges...
OF: default map, cp=f001000000000000, s=100000, da=4d8000000000000
OF: default map, cp=11d000000000000, s=100000, da=4d8000000000000
OF: default map, cp=919000000000000, s=10000, da=4d8000000000000
OF: default map, cp=915000000000000, s=10000, da=4d8000000000000
OF: default map, cp=c04000000000000, s=100000, da=4d8000000000000
OF: not found !
OF: ** translation for device /soc/pcie **
OF: bus is default (na=2, ns=1) on /soc
OF: translating address: 04d00000 00000000
OF: parent bus is default (na=1, ns=1) on 
OF: walking ranges...
OF: default map, cp=f001000000000000, s=100000, da=4d0000000000000
OF: default map, cp=11d000000000000, s=100000, da=4d0000000000000
OF: default map, cp=919000000000000, s=10000, da=4d0000000000000
OF: default map, cp=915000000000000, s=10000, da=4d0000000000000
OF: default map, cp=c04000000000000, s=100000, da=4d0000000000000
OF: not found !
mvebu-pcie soc:pcie:      MEM 0xffffffffffffffff..0x00fffffffe -> 0x0300000000
OF: ** translation for device /soc/pcie **
OF: bus is default (na=2, ns=1) on /soc
OF: translating address: 04d00000 00000000
OF: parent bus is default (na=1, ns=1) on 
OF: walking ranges...
OF: default map, cp=f001000000000000, s=100000, da=4d0000000000000
OF: default map, cp=11d000000000000, s=100000, da=4d0000000000000
OF: default map, cp=919000000000000, s=10000, da=4d0000000000000
OF: default map, cp=915000000000000, s=10000, da=4d0000000000000
OF: default map, cp=c04000000000000, s=100000, da=4d0000000000000
OF: not found !
OF: ** translation for device /soc/pcie **
OF: bus is default (na=2, ns=1) on /soc
OF: translating address: 04b80000 00000000
OF: parent bus is default (na=1, ns=1) on 
OF: walking ranges...
OF: default map, cp=f001000000000000, s=100000, da=4b8000000000000
OF: default map, cp=11d000000000000, s=100000, da=4b8000000000000
OF: default map, cp=919000000000000, s=10000, da=4b8000000000000
OF: default map, cp=915000000000000, s=10000, da=4b8000000000000
OF: default map, cp=c04000000000000, s=100000, da=4b8000000000000
OF: not found !
mvebu-pcie soc:pcie:       IO 0xffffffffffffffff..0x00fffffffe -> 0x0300000000
OF: ** translation for device /soc/pcie **
OF: bus is default (na=2, ns=1) on /soc
OF: translating address: 04b80000 00000000
OF: parent bus is default (na=1, ns=1) on 
OF: walking ranges...
OF: default map, cp=f001000000000000, s=100000, da=4b8000000000000
OF: default map, cp=11d000000000000, s=100000, da=4b8000000000000
OF: default map, cp=919000000000000, s=10000, da=4b8000000000000
OF: default map, cp=915000000000000, s=10000, da=4b8000000000000
OF: default map, cp=c04000000000000, s=100000, da=4b8000000000000
OF: not found !
OF: ** translation for device /soc/pcie **
OF: bus is default (na=2, ns=1) on /soc
OF: translating address: 04b00000 00000000
OF: parent bus is default (na=1, ns=1) on 
OF: walking ranges...
OF: default map, cp=f001000000000000, s=100000, da=4b0000000000000
OF: default map, cp=11d000000000000, s=100000, da=4b0000000000000
OF: default map, cp=919000000000000, s=10000, da=4b0000000000000
OF: default map, cp=915000000000000, s=10000, da=4b0000000000000
OF: default map, cp=c04000000000000, s=100000, da=4b0000000000000
OF: not found !
mvebu-pcie soc:pcie:      MEM 0xffffffffffffffff..0x00fffffffe -> 0x0400000000
OF: ** translation for device /soc/pcie **
OF: bus is default (na=2, ns=1) on /soc
OF: translating address: 04b00000 00000000
OF: parent bus is default (na=1, ns=1) on 
OF: walking ranges...
OF: default map, cp=f001000000000000, s=100000, da=4b0000000000000
OF: default map, cp=11d000000000000, s=100000, da=4b0000000000000
OF: default map, cp=919000000000000, s=10000, da=4b0000000000000
OF: default map, cp=915000000000000, s=10000, da=4b0000000000000
OF: default map, cp=c04000000000000, s=100000, da=4b0000000000000
OF: not found !
mvebu-pcie soc:pcie:       IO 0xffffffffffffffff..0x00fffffffe -> 0x0400000000

mvebu_get_tgt_attr() start

OF: ** translation for device /soc/pcie **
OF: bus is default (na=2, ns=1) on /soc
OF: translating address: f0010000 00080000
OF: parent bus is default (na=1, ns=1) on 
OF: walking ranges...
OF: default map, cp=f001000000000000, s=100000, da=f001000000080000
OF: parent translation for: f1000000
OF: with offset: 80000
OF: one level translation: f1080000
OF: reached root node
OF: ** translation for device /soc/pcie **
OF: bus is default (na=2, ns=1) on /soc
OF: translating address: f0010000 00040000
OF: parent bus is default (na=1, ns=1) on 
OF: walking ranges...
OF: default map, cp=f001000000000000, s=100000, da=f001000000040000
OF: parent translation for: f1000000
OF: with offset: 40000
OF: one level translation: f1040000
OF: reached root node
OF: ** translation for device /soc/pcie **
OF: bus is default (na=2, ns=1) on /soc
OF: translating address: f0010000 00040000
OF: parent bus is default (na=1, ns=1) on 
OF: walking ranges...
OF: default map, cp=f001000000000000, s=100000, da=f001000000040000
OF: parent translation for: f1000000
OF: with offset: 40000
OF: one level translation: f1040000
OF: reached root node
OF: ** translation for device /soc/pcie **
OF: bus is default (na=2, ns=1) on /soc
OF: translating address: f0010000 00044000
OF: parent bus is default (na=1, ns=1) on 
OF: walking ranges...
OF: default map, cp=f001000000000000, s=100000, da=f001000000044000
OF: parent translation for: f1000000
OF: with offset: 44000
OF: one level translation: f1044000
OF: reached root node
OF: ** translation for device /soc/pcie **
OF: bus is default (na=2, ns=1) on /soc
OF: translating address: f0010000 00044000
OF: parent bus is default (na=1, ns=1) on 
OF: walking ranges...
OF: default map, cp=f001000000000000, s=100000, da=f001000000044000
OF: parent translation for: f1000000
OF: with offset: 44000
OF: one level translation: f1044000
OF: reached root node
OF: ** translation for device /soc/pcie **
OF: bus is default (na=2, ns=1) on /soc
OF: translating address: f0010000 00048000
OF: parent bus is default (na=1, ns=1) on 
OF: walking ranges...
OF: default map, cp=f001000000000000, s=100000, da=f001000000048000
OF: parent translation for: f1000000
OF: with offset: 48000
OF: one level translation: f1048000
OF: reached root node
OF: ** translation for device /soc/pcie **
OF: bus is default (na=2, ns=1) on /soc
OF: translating address: f0010000 00048000
OF: parent bus is default (na=1, ns=1) on 
OF: walking ranges...
OF: default map, cp=f001000000000000, s=100000, da=f001000000048000
OF: parent translation for: f1000000
OF: with offset: 48000
OF: one level translation: f1048000
OF: reached root node
OF: ** translation for device /soc/pcie **
OF: bus is default (na=2, ns=1) on /soc
OF: translating address: 08e80000 00000000
OF: parent bus is default (na=1, ns=1) on 
OF: walking ranges...
OF: default map, cp=f001000000000000, s=100000, da=8e8000000000000
OF: default map, cp=11d000000000000, s=100000, da=8e8000000000000
OF: default map, cp=919000000000000, s=10000, da=8e8000000000000
OF: default map, cp=915000000000000, s=10000, da=8e8000000000000
OF: default map, cp=c04000000000000, s=100000, da=8e8000000000000
OF: not found !
OF: ** translation for device /soc/pcie **
OF: bus is default (na=2, ns=1) on /soc
OF: translating address: 08e80000 00000000
OF: parent bus is default (na=1, ns=1) on 
OF: walking ranges...
OF: default map, cp=f001000000000000, s=100000, da=8e8000000000000
OF: default map, cp=11d000000000000, s=100000, da=8e8000000000000
OF: default map, cp=919000000000000, s=10000, da=8e8000000000000
OF: default map, cp=915000000000000, s=10000, da=8e8000000000000
OF: default map, cp=c04000000000000, s=100000, da=8e8000000000000
OF: not found !
OF: ** translation for device /soc/pcie **
OF: bus is default (na=2, ns=1) on /soc
OF: translating address: 08e00000 00000000
OF: parent bus is default (na=1, ns=1) on 
OF: walking ranges...
OF: default map, cp=f001000000000000, s=100000, da=8e0000000000000
OF: default map, cp=11d000000000000, s=100000, da=8e0000000000000
OF: default map, cp=919000000000000, s=10000, da=8e0000000000000
OF: default map, cp=915000000000000, s=10000, da=8e0000000000000
OF: default map, cp=c04000000000000, s=100000, da=8e0000000000000
OF: not found !
OF: ** translation for device /soc/pcie **
OF: bus is default (na=2, ns=1) on /soc
OF: translating address: 08e00000 00000000
OF: parent bus is default (na=1, ns=1) on 
OF: walking ranges...
OF: default map, cp=f001000000000000, s=100000, da=8e0000000000000
OF: default map, cp=11d000000000000, s=100000, da=8e0000000000000
OF: default map, cp=919000000000000, s=10000, da=8e0000000000000
OF: default map, cp=915000000000000, s=10000, da=8e0000000000000
OF: default map, cp=c04000000000000, s=100000, da=8e0000000000000
OF: not found !
OF: ** translation for device /soc/pcie **
OF: bus is default (na=2, ns=1) on /soc
OF: translating address: 04e80000 00000000
OF: parent bus is default (na=1, ns=1) on 
OF: walking ranges...
OF: default map, cp=f001000000000000, s=100000, da=4e8000000000000
OF: default map, cp=11d000000000000, s=100000, da=4e8000000000000
OF: default map, cp=919000000000000, s=10000, da=4e8000000000000
OF: default map, cp=915000000000000, s=10000, da=4e8000000000000
OF: default map, cp=c04000000000000, s=100000, da=4e8000000000000
OF: not found !
OF: ** translation for device /soc/pcie **
OF: bus is default (na=2, ns=1) on /soc
OF: translating address: 04e80000 00000000
OF: parent bus is default (na=1, ns=1) on 
OF: walking ranges...
OF: default map, cp=f001000000000000, s=100000, da=4e8000000000000
OF: default map, cp=11d000000000000, s=100000, da=4e8000000000000
OF: default map, cp=919000000000000, s=10000, da=4e8000000000000
OF: default map, cp=915000000000000, s=10000, da=4e8000000000000
OF: default map, cp=c04000000000000, s=100000, da=4e8000000000000
OF: not found !
OF: ** translation for device /soc/pcie **
OF: bus is default (na=2, ns=1) on /soc
OF: translating address: 04e00000 00000000
OF: parent bus is default (na=1, ns=1) on 
OF: walking ranges...
OF: default map, cp=f001000000000000, s=100000, da=4e0000000000000
OF: default map, cp=11d000000000000, s=100000, da=4e0000000000000
OF: default map, cp=919000000000000, s=10000, da=4e0000000000000
OF: default map, cp=915000000000000, s=10000, da=4e0000000000000
OF: default map, cp=c04000000000000, s=100000, da=4e0000000000000
OF: not found !

mvebu_get_tgt_attr() end

mvebu_get_tgt_attr() start

OF: ** translation for device /soc/pcie **
OF: bus is default (na=2, ns=1) on /soc
OF: translating address: f0010000 00080000
OF: parent bus is default (na=1, ns=1) on 
OF: walking ranges...
OF: default map, cp=f001000000000000, s=100000, da=f001000000080000
OF: parent translation for: f1000000
OF: with offset: 80000
OF: one level translation: f1080000
OF: reached root node
OF: ** translation for device /soc/pcie **
OF: bus is default (na=2, ns=1) on /soc
OF: translating address: f0010000 00040000
OF: parent bus is default (na=1, ns=1) on 
OF: walking ranges...
OF: default map, cp=f001000000000000, s=100000, da=f001000000040000
OF: parent translation for: f1000000
OF: with offset: 40000
OF: one level translation: f1040000
OF: reached root node
OF: ** translation for device /soc/pcie **
OF: bus is default (na=2, ns=1) on /soc
OF: translating address: f0010000 00040000
OF: parent bus is default (na=1, ns=1) on 
OF: walking ranges...
OF: default map, cp=f001000000000000, s=100000, da=f001000000040000
OF: parent translation for: f1000000
OF: with offset: 40000
OF: one level translation: f1040000
OF: reached root node
OF: ** translation for device /soc/pcie **
OF: bus is default (na=2, ns=1) on /soc
OF: translating address: f0010000 00044000
OF: parent bus is default (na=1, ns=1) on 
OF: walking ranges...
OF: default map, cp=f001000000000000, s=100000, da=f001000000044000
OF: parent translation for: f1000000
OF: with offset: 44000
OF: one level translation: f1044000
OF: reached root node
OF: ** translation for device /soc/pcie **
OF: bus is default (na=2, ns=1) on /soc
OF: translating address: f0010000 00044000
OF: parent bus is default (na=1, ns=1) on 
OF: walking ranges...
OF: default map, cp=f001000000000000, s=100000, da=f001000000044000
OF: parent translation for: f1000000
OF: with offset: 44000
OF: one level translation: f1044000
OF: reached root node
OF: ** translation for device /soc/pcie **
OF: bus is default (na=2, ns=1) on /soc
OF: translating address: f0010000 00048000
OF: parent bus is default (na=1, ns=1) on 
OF: walking ranges...
OF: default map, cp=f001000000000000, s=100000, da=f001000000048000
OF: parent translation for: f1000000
OF: with offset: 48000
OF: one level translation: f1048000
OF: reached root node
OF: ** translation for device /soc/pcie **
OF: bus is default (na=2, ns=1) on /soc
OF: translating address: f0010000 00048000
OF: parent bus is default (na=1, ns=1) on 
OF: walking ranges...
OF: default map, cp=f001000000000000, s=100000, da=f001000000048000
OF: parent translation for: f1000000
OF: with offset: 48000
OF: one level translation: f1048000
OF: reached root node
OF: ** translation for device /soc/pcie **
OF: bus is default (na=2, ns=1) on /soc
OF: translating address: 08e80000 00000000
OF: parent bus is default (na=1, ns=1) on 
OF: walking ranges...
OF: default map, cp=f001000000000000, s=100000, da=8e8000000000000
OF: default map, cp=11d000000000000, s=100000, da=8e8000000000000
OF: default map, cp=919000000000000, s=10000, da=8e8000000000000
OF: default map, cp=915000000000000, s=10000, da=8e8000000000000
OF: default map, cp=c04000000000000, s=100000, da=8e8000000000000
OF: not found !
OF: ** translation for device /soc/pcie **
OF: bus is default (na=2, ns=1) on /soc
OF: translating address: 08e80000 00000000
OF: parent bus is default (na=1, ns=1) on 
OF: walking ranges...
OF: default map, cp=f001000000000000, s=100000, da=8e8000000000000
OF: default map, cp=11d000000000000, s=100000, da=8e8000000000000
OF: default map, cp=919000000000000, s=10000, da=8e8000000000000
OF: default map, cp=915000000000000, s=10000, da=8e8000000000000
OF: default map, cp=c04000000000000, s=100000, da=8e8000000000000
OF: not found !
OF: ** translation for device /soc/pcie **
OF: bus is default (na=2, ns=1) on /soc
OF: translating address: 08e00000 00000000
OF: parent bus is default (na=1, ns=1) on 
OF: walking ranges...
OF: default map, cp=f001000000000000, s=100000, da=8e0000000000000
OF: default map, cp=11d000000000000, s=100000, da=8e0000000000000
OF: default map, cp=919000000000000, s=10000, da=8e0000000000000
OF: default map, cp=915000000000000, s=10000, da=8e0000000000000
OF: default map, cp=c04000000000000, s=100000, da=8e0000000000000
OF: not found !
OF: ** translation for device /soc/pcie **
OF: bus is default (na=2, ns=1) on /soc
OF: translating address: 08e00000 00000000
OF: parent bus is default (na=1, ns=1) on 
OF: walking ranges...
OF: default map, cp=f001000000000000, s=100000, da=8e0000000000000
OF: default map, cp=11d000000000000, s=100000, da=8e0000000000000
OF: default map, cp=919000000000000, s=10000, da=8e0000000000000
OF: default map, cp=915000000000000, s=10000, da=8e0000000000000
OF: default map, cp=c04000000000000, s=100000, da=8e0000000000000
OF: not found !
OF: ** translation for device /soc/pcie **
OF: bus is default (na=2, ns=1) on /soc
OF: translating address: 04e80000 00000000
OF: parent bus is default (na=1, ns=1) on 
OF: walking ranges...
OF: default map, cp=f001000000000000, s=100000, da=4e8000000000000
OF: default map, cp=11d000000000000, s=100000, da=4e8000000000000
OF: default map, cp=919000000000000, s=10000, da=4e8000000000000
OF: default map, cp=915000000000000, s=10000, da=4e8000000000000
OF: default map, cp=c04000000000000, s=100000, da=4e8000000000000
OF: not found !
OF: ** translation for device /soc/pcie **
OF: bus is default (na=2, ns=1) on /soc
OF: translating address: 04e80000 00000000
OF: parent bus is default (na=1, ns=1) on 
OF: walking ranges...
OF: default map, cp=f001000000000000, s=100000, da=4e8000000000000
OF: default map, cp=11d000000000000, s=100000, da=4e8000000000000
OF: default map, cp=919000000000000, s=10000, da=4e8000000000000
OF: default map, cp=915000000000000, s=10000, da=4e8000000000000
OF: default map, cp=c04000000000000, s=100000, da=4e8000000000000
OF: not found !
OF: ** translation for device /soc/pcie **
OF: bus is default (na=2, ns=1) on /soc
OF: translating address: 04e00000 00000000
OF: parent bus is default (na=1, ns=1) on 
OF: walking ranges...
OF: default map, cp=f001000000000000, s=100000, da=4e0000000000000
OF: default map, cp=11d000000000000, s=100000, da=4e0000000000000
OF: default map, cp=919000000000000, s=10000, da=4e0000000000000
OF: default map, cp=915000000000000, s=10000, da=4e0000000000000
OF: default map, cp=c04000000000000, s=100000, da=4e0000000000000
OF: not found !
OF: ** translation for device /soc/pcie **
OF: bus is default (na=2, ns=1) on /soc
OF: translating address: 04e00000 00000000
OF: parent bus is default (na=1, ns=1) on 
OF: walking ranges...
OF: default map, cp=f001000000000000, s=100000, da=4e0000000000000
OF: default map, cp=11d000000000000, s=100000, da=4e0000000000000
OF: default map, cp=919000000000000, s=10000, da=4e0000000000000
OF: default map, cp=915000000000000, s=10000, da=4e0000000000000
OF: default map, cp=c04000000000000, s=100000, da=4e0000000000000
OF: not found !
OF: ** translation for device /soc/pcie **
OF: bus is default (na=2, ns=1) on /soc
OF: translating address: 04d80000 00000000
OF: parent bus is default (na=1, ns=1) on 
OF: walking ranges...
OF: default map, cp=f001000000000000, s=100000, da=4d8000000000000
OF: default map, cp=11d000000000000, s=100000, da=4d8000000000000
OF: default map, cp=919000000000000, s=10000, da=4d8000000000000
OF: default map, cp=915000000000000, s=10000, da=4d8000000000000
OF: default map, cp=c04000000000000, s=100000, da=4d8000000000000
OF: not found !

mvebu_get_tgt_attr() end

mvebu-pcie soc:pcie: pcie1.0: Slot power limit 10.0W

mvebu_get_tgt_attr() start

OF: ** translation for device /soc/pcie **
OF: bus is default (na=2, ns=1) on /soc
OF: translating address: f0010000 00080000
OF: parent bus is default (na=1, ns=1) on 
OF: walking ranges...
OF: default map, cp=f001000000000000, s=100000, da=f001000000080000
OF: parent translation for: f1000000
OF: with offset: 80000
OF: one level translation: f1080000
OF: reached root node
OF: ** translation for device /soc/pcie **
OF: bus is default (na=2, ns=1) on /soc
OF: translating address: f0010000 00040000
OF: parent bus is default (na=1, ns=1) on 
OF: walking ranges...
OF: default map, cp=f001000000000000, s=100000, da=f001000000040000
OF: parent translation for: f1000000
OF: with offset: 40000
OF: one level translation: f1040000
OF: reached root node
OF: ** translation for device /soc/pcie **
OF: bus is default (na=2, ns=1) on /soc
OF: translating address: f0010000 00040000
OF: parent bus is default (na=1, ns=1) on 
OF: walking ranges...
OF: default map, cp=f001000000000000, s=100000, da=f001000000040000
OF: parent translation for: f1000000
OF: with offset: 40000
OF: one level translation: f1040000
OF: reached root node
OF: ** translation for device /soc/pcie **
OF: bus is default (na=2, ns=1) on /soc
OF: translating address: f0010000 00044000
OF: parent bus is default (na=1, ns=1) on 
OF: walking ranges...
OF: default map, cp=f001000000000000, s=100000, da=f001000000044000
OF: parent translation for: f1000000
OF: with offset: 44000
OF: one level translation: f1044000
OF: reached root node
OF: ** translation for device /soc/pcie **
OF: bus is default (na=2, ns=1) on /soc
OF: translating address: f0010000 00044000
OF: parent bus is default (na=1, ns=1) on 
OF: walking ranges...
OF: default map, cp=f001000000000000, s=100000, da=f001000000044000
OF: parent translation for: f1000000
OF: with offset: 44000
OF: one level translation: f1044000
OF: reached root node
OF: ** translation for device /soc/pcie **
OF: bus is default (na=2, ns=1) on /soc
OF: translating address: f0010000 00048000
OF: parent bus is default (na=1, ns=1) on 
OF: walking ranges...
OF: default map, cp=f001000000000000, s=100000, da=f001000000048000
OF: parent translation for: f1000000
OF: with offset: 48000
OF: one level translation: f1048000
OF: reached root node
OF: ** translation for device /soc/pcie **
OF: bus is default (na=2, ns=1) on /soc
OF: translating address: f0010000 00048000
OF: parent bus is default (na=1, ns=1) on 
OF: walking ranges...
OF: default map, cp=f001000000000000, s=100000, da=f001000000048000
OF: parent translation for: f1000000
OF: with offset: 48000
OF: one level translation: f1048000
OF: reached root node
OF: ** translation for device /soc/pcie **
OF: bus is default (na=2, ns=1) on /soc
OF: translating address: 08e80000 00000000
OF: parent bus is default (na=1, ns=1) on 
OF: walking ranges...
OF: default map, cp=f001000000000000, s=100000, da=8e8000000000000
OF: default map, cp=11d000000000000, s=100000, da=8e8000000000000
OF: default map, cp=919000000000000, s=10000, da=8e8000000000000
OF: default map, cp=915000000000000, s=10000, da=8e8000000000000
OF: default map, cp=c04000000000000, s=100000, da=8e8000000000000
OF: not found !
OF: ** translation for device /soc/pcie **
OF: bus is default (na=2, ns=1) on /soc
OF: translating address: 08e80000 00000000
OF: parent bus is default (na=1, ns=1) on 
OF: walking ranges...
OF: default map, cp=f001000000000000, s=100000, da=8e8000000000000
OF: default map, cp=11d000000000000, s=100000, da=8e8000000000000
OF: default map, cp=919000000000000, s=10000, da=8e8000000000000
OF: default map, cp=915000000000000, s=10000, da=8e8000000000000
OF: default map, cp=c04000000000000, s=100000, da=8e8000000000000
OF: not found !
OF: ** translation for device /soc/pcie **
OF: bus is default (na=2, ns=1) on /soc
OF: translating address: 08e00000 00000000
OF: parent bus is default (na=1, ns=1) on 
OF: walking ranges...
OF: default map, cp=f001000000000000, s=100000, da=8e0000000000000
OF: default map, cp=11d000000000000, s=100000, da=8e0000000000000
OF: default map, cp=919000000000000, s=10000, da=8e0000000000000
OF: default map, cp=915000000000000, s=10000, da=8e0000000000000
OF: default map, cp=c04000000000000, s=100000, da=8e0000000000000
OF: not found !
OF: ** translation for device /soc/pcie **
OF: bus is default (na=2, ns=1) on /soc
OF: translating address: 08e00000 00000000
OF: parent bus is default (na=1, ns=1) on 
OF: walking ranges...
OF: default map, cp=f001000000000000, s=100000, da=8e0000000000000
OF: default map, cp=11d000000000000, s=100000, da=8e0000000000000
OF: default map, cp=919000000000000, s=10000, da=8e0000000000000
OF: default map, cp=915000000000000, s=10000, da=8e0000000000000
OF: default map, cp=c04000000000000, s=100000, da=8e0000000000000
OF: not found !
OF: ** translation for device /soc/pcie **
OF: bus is default (na=2, ns=1) on /soc
OF: translating address: 04e80000 00000000
OF: parent bus is default (na=1, ns=1) on 
OF: walking ranges...
OF: default map, cp=f001000000000000, s=100000, da=4e8000000000000
OF: default map, cp=11d000000000000, s=100000, da=4e8000000000000
OF: default map, cp=919000000000000, s=10000, da=4e8000000000000
OF: default map, cp=915000000000000, s=10000, da=4e8000000000000
OF: default map, cp=c04000000000000, s=100000, da=4e8000000000000
OF: not found !
OF: ** translation for device /soc/pcie **
OF: bus is default (na=2, ns=1) on /soc
OF: translating address: 04e80000 00000000
OF: parent bus is default (na=1, ns=1) on 
OF: walking ranges...
OF: default map, cp=f001000000000000, s=100000, da=4e8000000000000
OF: default map, cp=11d000000000000, s=100000, da=4e8000000000000
OF: default map, cp=919000000000000, s=10000, da=4e8000000000000
OF: default map, cp=915000000000000, s=10000, da=4e8000000000000
OF: default map, cp=c04000000000000, s=100000, da=4e8000000000000
OF: not found !
OF: ** translation for device /soc/pcie **
OF: bus is default (na=2, ns=1) on /soc
OF: translating address: 04e00000 00000000
OF: parent bus is default (na=1, ns=1) on 
OF: walking ranges...
OF: default map, cp=f001000000000000, s=100000, da=4e0000000000000
OF: default map, cp=11d000000000000, s=100000, da=4e0000000000000
OF: default map, cp=919000000000000, s=10000, da=4e0000000000000
OF: default map, cp=915000000000000, s=10000, da=4e0000000000000
OF: default map, cp=c04000000000000, s=100000, da=4e0000000000000
OF: not found !
OF: ** translation for device /soc/pcie **
OF: bus is default (na=2, ns=1) on /soc
OF: translating address: 04e00000 00000000
OF: parent bus is default (na=1, ns=1) on 
OF: walking ranges...
OF: default map, cp=f001000000000000, s=100000, da=4e0000000000000
OF: default map, cp=11d000000000000, s=100000, da=4e0000000000000
OF: default map, cp=919000000000000, s=10000, da=4e0000000000000
OF: default map, cp=915000000000000, s=10000, da=4e0000000000000
OF: default map, cp=c04000000000000, s=100000, da=4e0000000000000
OF: not found !
OF: ** translation for device /soc/pcie **
OF: bus is default (na=2, ns=1) on /soc
OF: translating address: 04d80000 00000000
OF: parent bus is default (na=1, ns=1) on 
OF: walking ranges...
OF: default map, cp=f001000000000000, s=100000, da=4d8000000000000
OF: default map, cp=11d000000000000, s=100000, da=4d8000000000000
OF: default map, cp=919000000000000, s=10000, da=4d8000000000000
OF: default map, cp=915000000000000, s=10000, da=4d8000000000000
OF: default map, cp=c04000000000000, s=100000, da=4d8000000000000
OF: not found !
OF: ** translation for device /soc/pcie **
OF: bus is default (na=2, ns=1) on /soc
OF: translating address: 04d80000 00000000
OF: parent bus is default (na=1, ns=1) on 
OF: walking ranges...
OF: default map, cp=f001000000000000, s=100000, da=4d8000000000000
OF: default map, cp=11d000000000000, s=100000, da=4d8000000000000
OF: default map, cp=919000000000000, s=10000, da=4d8000000000000
OF: default map, cp=915000000000000, s=10000, da=4d8000000000000
OF: default map, cp=c04000000000000, s=100000, da=4d8000000000000
OF: not found !
OF: ** translation for device /soc/pcie **
OF: bus is default (na=2, ns=1) on /soc
OF: translating address: 04d00000 00000000
OF: parent bus is default (na=1, ns=1) on 
OF: walking ranges...
OF: default map, cp=f001000000000000, s=100000, da=4d0000000000000
OF: default map, cp=11d000000000000, s=100000, da=4d0000000000000
OF: default map, cp=919000000000000, s=10000, da=4d0000000000000
OF: default map, cp=915000000000000, s=10000, da=4d0000000000000
OF: default map, cp=c04000000000000, s=100000, da=4d0000000000000
OF: not found !

mvebu_get_tgt_attr() end

mvebu_get_tgt_attr() start

OF: ** translation for device /soc/pcie **
OF: bus is default (na=2, ns=1) on /soc
OF: translating address: f0010000 00080000
OF: parent bus is default (na=1, ns=1) on 
OF: walking ranges...
OF: default map, cp=f001000000000000, s=100000, da=f001000000080000
OF: parent translation for: f1000000
OF: with offset: 80000
OF: one level translation: f1080000
OF: reached root node
OF: ** translation for device /soc/pcie **
OF: bus is default (na=2, ns=1) on /soc
OF: translating address: f0010000 00040000
OF: parent bus is default (na=1, ns=1) on 
OF: walking ranges...
OF: default map, cp=f001000000000000, s=100000, da=f001000000040000
OF: parent translation for: f1000000
OF: with offset: 40000
OF: one level translation: f1040000
OF: reached root node
OF: ** translation for device /soc/pcie **
OF: bus is default (na=2, ns=1) on /soc
OF: translating address: f0010000 00040000
OF: parent bus is default (na=1, ns=1) on 
OF: walking ranges...
OF: default map, cp=f001000000000000, s=100000, da=f001000000040000
OF: parent translation for: f1000000
OF: with offset: 40000
OF: one level translation: f1040000
OF: reached root node
OF: ** translation for device /soc/pcie **
OF: bus is default (na=2, ns=1) on /soc
OF: translating address: f0010000 00044000
OF: parent bus is default (na=1, ns=1) on 
OF: walking ranges...
OF: default map, cp=f001000000000000, s=100000, da=f001000000044000
OF: parent translation for: f1000000
OF: with offset: 44000
OF: one level translation: f1044000
OF: reached root node
OF: ** translation for device /soc/pcie **
OF: bus is default (na=2, ns=1) on /soc
OF: translating address: f0010000 00044000
OF: parent bus is default (na=1, ns=1) on 
OF: walking ranges...
OF: default map, cp=f001000000000000, s=100000, da=f001000000044000
OF: parent translation for: f1000000
OF: with offset: 44000
OF: one level translation: f1044000
OF: reached root node
OF: ** translation for device /soc/pcie **
OF: bus is default (na=2, ns=1) on /soc
OF: translating address: f0010000 00048000
OF: parent bus is default (na=1, ns=1) on 
OF: walking ranges...
OF: default map, cp=f001000000000000, s=100000, da=f001000000048000
OF: parent translation for: f1000000
OF: with offset: 48000
OF: one level translation: f1048000
OF: reached root node
OF: ** translation for device /soc/pcie **
OF: bus is default (na=2, ns=1) on /soc
OF: translating address: f0010000 00048000
OF: parent bus is default (na=1, ns=1) on 
OF: walking ranges...
OF: default map, cp=f001000000000000, s=100000, da=f001000000048000
OF: parent translation for: f1000000
OF: with offset: 48000
OF: one level translation: f1048000
OF: reached root node
OF: ** translation for device /soc/pcie **
OF: bus is default (na=2, ns=1) on /soc
OF: translating address: 08e80000 00000000
OF: parent bus is default (na=1, ns=1) on 
OF: walking ranges...
OF: default map, cp=f001000000000000, s=100000, da=8e8000000000000
OF: default map, cp=11d000000000000, s=100000, da=8e8000000000000
OF: default map, cp=919000000000000, s=10000, da=8e8000000000000
OF: default map, cp=915000000000000, s=10000, da=8e8000000000000
OF: default map, cp=c04000000000000, s=100000, da=8e8000000000000
OF: not found !
OF: ** translation for device /soc/pcie **
OF: bus is default (na=2, ns=1) on /soc
OF: translating address: 08e80000 00000000
OF: parent bus is default (na=1, ns=1) on 
OF: walking ranges...
OF: default map, cp=f001000000000000, s=100000, da=8e8000000000000
OF: default map, cp=11d000000000000, s=100000, da=8e8000000000000
OF: default map, cp=919000000000000, s=10000, da=8e8000000000000
OF: default map, cp=915000000000000, s=10000, da=8e8000000000000
OF: default map, cp=c04000000000000, s=100000, da=8e8000000000000
OF: not found !
OF: ** translation for device /soc/pcie **
OF: bus is default (na=2, ns=1) on /soc
OF: translating address: 08e00000 00000000
OF: parent bus is default (na=1, ns=1) on 
OF: walking ranges...
OF: default map, cp=f001000000000000, s=100000, da=8e0000000000000
OF: default map, cp=11d000000000000, s=100000, da=8e0000000000000
OF: default map, cp=919000000000000, s=10000, da=8e0000000000000
OF: default map, cp=915000000000000, s=10000, da=8e0000000000000
OF: default map, cp=c04000000000000, s=100000, da=8e0000000000000
OF: not found !
OF: ** translation for device /soc/pcie **
OF: bus is default (na=2, ns=1) on /soc
OF: translating address: 08e00000 00000000
OF: parent bus is default (na=1, ns=1) on 
OF: walking ranges...
OF: default map, cp=f001000000000000, s=100000, da=8e0000000000000
OF: default map, cp=11d000000000000, s=100000, da=8e0000000000000
OF: default map, cp=919000000000000, s=10000, da=8e0000000000000
OF: default map, cp=915000000000000, s=10000, da=8e0000000000000
OF: default map, cp=c04000000000000, s=100000, da=8e0000000000000
OF: not found !
OF: ** translation for device /soc/pcie **
OF: bus is default (na=2, ns=1) on /soc
OF: translating address: 04e80000 00000000
OF: parent bus is default (na=1, ns=1) on 
OF: walking ranges...
OF: default map, cp=f001000000000000, s=100000, da=4e8000000000000
OF: default map, cp=11d000000000000, s=100000, da=4e8000000000000
OF: default map, cp=919000000000000, s=10000, da=4e8000000000000
OF: default map, cp=915000000000000, s=10000, da=4e8000000000000
OF: default map, cp=c04000000000000, s=100000, da=4e8000000000000
OF: not found !
OF: ** translation for device /soc/pcie **
OF: bus is default (na=2, ns=1) on /soc
OF: translating address: 04e80000 00000000
OF: parent bus is default (na=1, ns=1) on 
OF: walking ranges...
OF: default map, cp=f001000000000000, s=100000, da=4e8000000000000
OF: default map, cp=11d000000000000, s=100000, da=4e8000000000000
OF: default map, cp=919000000000000, s=10000, da=4e8000000000000
OF: default map, cp=915000000000000, s=10000, da=4e8000000000000
OF: default map, cp=c04000000000000, s=100000, da=4e8000000000000
OF: not found !
OF: ** translation for device /soc/pcie **
OF: bus is default (na=2, ns=1) on /soc
OF: translating address: 04e00000 00000000
OF: parent bus is default (na=1, ns=1) on 
OF: walking ranges...
OF: default map, cp=f001000000000000, s=100000, da=4e0000000000000
OF: default map, cp=11d000000000000, s=100000, da=4e0000000000000
OF: default map, cp=919000000000000, s=10000, da=4e0000000000000
OF: default map, cp=915000000000000, s=10000, da=4e0000000000000
OF: default map, cp=c04000000000000, s=100000, da=4e0000000000000
OF: not found !
OF: ** translation for device /soc/pcie **
OF: bus is default (na=2, ns=1) on /soc
OF: translating address: 04e00000 00000000
OF: parent bus is default (na=1, ns=1) on 
OF: walking ranges...
OF: default map, cp=f001000000000000, s=100000, da=4e0000000000000
OF: default map, cp=11d000000000000, s=100000, da=4e0000000000000
OF: default map, cp=919000000000000, s=10000, da=4e0000000000000
OF: default map, cp=915000000000000, s=10000, da=4e0000000000000
OF: default map, cp=c04000000000000, s=100000, da=4e0000000000000
OF: not found !
OF: ** translation for device /soc/pcie **
OF: bus is default (na=2, ns=1) on /soc
OF: translating address: 04d80000 00000000
OF: parent bus is default (na=1, ns=1) on 
OF: walking ranges...
OF: default map, cp=f001000000000000, s=100000, da=4d8000000000000
OF: default map, cp=11d000000000000, s=100000, da=4d8000000000000
OF: default map, cp=919000000000000, s=10000, da=4d8000000000000
OF: default map, cp=915000000000000, s=10000, da=4d8000000000000
OF: default map, cp=c04000000000000, s=100000, da=4d8000000000000
OF: not found !
OF: ** translation for device /soc/pcie **
OF: bus is default (na=2, ns=1) on /soc
OF: translating address: 04d80000 00000000
OF: parent bus is default (na=1, ns=1) on 
OF: walking ranges...
OF: default map, cp=f001000000000000, s=100000, da=4d8000000000000
OF: default map, cp=11d000000000000, s=100000, da=4d8000000000000
OF: default map, cp=919000000000000, s=10000, da=4d8000000000000
OF: default map, cp=915000000000000, s=10000, da=4d8000000000000
OF: default map, cp=c04000000000000, s=100000, da=4d8000000000000
OF: not found !
OF: ** translation for device /soc/pcie **
OF: bus is default (na=2, ns=1) on /soc
OF: translating address: 04d00000 00000000
OF: parent bus is default (na=1, ns=1) on 
OF: walking ranges...
OF: default map, cp=f001000000000000, s=100000, da=4d0000000000000
OF: default map, cp=11d000000000000, s=100000, da=4d0000000000000
OF: default map, cp=919000000000000, s=10000, da=4d0000000000000
OF: default map, cp=915000000000000, s=10000, da=4d0000000000000
OF: default map, cp=c04000000000000, s=100000, da=4d0000000000000
OF: not found !
OF: ** translation for device /soc/pcie **
OF: bus is default (na=2, ns=1) on /soc
OF: translating address: 04d00000 00000000
OF: parent bus is default (na=1, ns=1) on 
OF: walking ranges...
OF: default map, cp=f001000000000000, s=100000, da=4d0000000000000
OF: default map, cp=11d000000000000, s=100000, da=4d0000000000000
OF: default map, cp=919000000000000, s=10000, da=4d0000000000000
OF: default map, cp=915000000000000, s=10000, da=4d0000000000000
OF: default map, cp=c04000000000000, s=100000, da=4d0000000000000
OF: not found !
OF: ** translation for device /soc/pcie **
OF: bus is default (na=2, ns=1) on /soc
OF: translating address: 04b80000 00000000
OF: parent bus is default (na=1, ns=1) on 
OF: walking ranges...
OF: default map, cp=f001000000000000, s=100000, da=4b8000000000000
OF: default map, cp=11d000000000000, s=100000, da=4b8000000000000
OF: default map, cp=919000000000000, s=10000, da=4b8000000000000
OF: default map, cp=915000000000000, s=10000, da=4b8000000000000
OF: default map, cp=c04000000000000, s=100000, da=4b8000000000000
OF: not found !

mvebu_get_tgt_attr() end

mvebu-pcie soc:pcie: pcie2.0: Slot power limit 10.0W
OF: ** translation for device /soc/pcie/pcie@2,0 **
OF: bus is pci (na=3, ns=2) on /soc/pcie
OF: translating address: 82001000 00000000 00040000
OF: parent bus is default (na=2, ns=1) on /soc
OF: walking ranges...
OF: default map, cp=80000, s=2000, da=40000
OF: default map, cp=40000, s=2000, da=40000
OF: parent translation for: f0010000 00040000
OF: with offset: 0
OF: one level translation: f0010000 00040000
OF: parent bus is default (na=1, ns=1) on 
OF: walking ranges...
OF: default map, cp=f001000000000000, s=100000, da=f001000000040000
OF: parent translation for: f1000000
OF: with offset: 40000
OF: one level translation: f1040000
OF: reached root node
OF: ** translation for device /soc/pcie/pcie@3,0 **
OF: bus is pci (na=3, ns=2) on /soc/pcie
OF: translating address: 82001800 00000000 00044000
OF: parent bus is default (na=2, ns=1) on /soc
OF: walking ranges...
OF: default map, cp=80000, s=2000, da=44000
OF: default map, cp=40000, s=2000, da=44000
OF: default map, cp=44000, s=2000, da=44000
OF: parent translation for: f0010000 00044000
OF: with offset: 0
OF: one level translation: f0010000 00044000
OF: parent bus is default (na=1, ns=1) on 
OF: walking ranges...
OF: default map, cp=f001000000000000, s=100000, da=f001000000044000
OF: parent translation for: f1000000
OF: with offset: 44000
OF: one level translation: f1044000
OF: reached root node
mvebu-pcie soc:pcie: PCI host bridge to bus 0000:00

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH] PCI: mvebu: Fix the use of the for_each_of_range() iterator
  2025-09-02 15:13 [PATCH] PCI: mvebu: Fix the use of the for_each_of_range() iterator Klaus Kudielka
  2025-09-03  1:38 ` Rob Herring
  2025-09-03 12:44 ` Jan Palus
@ 2025-09-03 17:33 ` Jan Palus
  2 siblings, 0 replies; 6+ messages in thread
From: Jan Palus @ 2025-09-03 17:33 UTC (permalink / raw)
  To: Klaus Kudielka
  Cc: Thomas Petazzoni, Pali Rohár, Lorenzo Pieralisi,
	Krzysztof Wilczyński, Manivannan Sadhasivam, Rob Herring,
	Bjorn Helgaas, linux-pci, linux-arm-kernel, linux-kernel,
	Bjorn Helgaas

On 02.09.2025 17:13, Klaus Kudielka wrote:
> The blamed commit simplifies code, by using the for_each_of_range()
> iterator. But it results in no pci devices being detected anymore on
> Turris Omnia (and probably other mvebu targets).
> 
> Analysis:
> 
> To determine range.flags, of_pci_range_parser_one() uses bus->get_flags(),
> which resolves to of_bus_pci_get_flags(). That function already returns an
> IORESOURCE bit field, and NOT the original flags from the "ranges"
> resource.
> 
> Then mvebu_get_tgt_attr() attempts the very same conversion again.
> But this is a misinterpretation of range.flags.
> 
> Remove the misinterpretation of range.flags in mvebu_get_tgt_addr(),
                                                               ^^^^

Just noticed the typo. Should be mvebu_get_tgt_attr().

> to restore the intended behavior.
> 
> Signed-off-by: Klaus Kudielka <klaus.kudielka@gmail.com>
> Fixes: 5da3d94a23c6 ("PCI: mvebu: Use for_each_of_range() iterator for parsing "ranges"")
> Reported-by: Bjorn Helgaas <helgaas@kernel.org>
> Closes: https://lore.kernel.org/r/20250820184603.GA633069@bhelgaas/
> Reported-by: Jan Palus <jpalus@fastmail.com>
> Closes: https://bugzilla.kernel.org/show_bug.cgi?id=220479
> ---
>  drivers/pci/controller/pci-mvebu.c | 14 ++------------
>  1 file changed, 2 insertions(+), 12 deletions(-)

^ permalink raw reply	[flat|nested] 6+ messages in thread

end of thread, other threads:[~2025-09-03 17:33 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2025-09-02 15:13 [PATCH] PCI: mvebu: Fix the use of the for_each_of_range() iterator Klaus Kudielka
2025-09-03  1:38 ` Rob Herring
2025-09-03 12:44 ` Jan Palus
2025-09-03 15:29   ` Rob Herring
2025-09-03 17:31     ` Jan Palus
2025-09-03 17:33 ` Jan Palus

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