[PATCH -v1 0/2] x86/microcode: Add debugging glue

[PATCH -v1 0/2] x86/microcode: Add debugging glue

[Borislav Petkov]

From: "Borislav Petkov (AMD)" <bp@alien8.de>

Hi,

ok, here's v1 with all review feedback incorporated.

I haven't added tags from previous review because they were to a conglomerate
diff and not to an actual patch.

Btw, the thing helped me already debug one small issue. So already bearing
fruits. :-)

Thx.



Changelog:
=========

v0
--

this is something I've been meaning to do for a long time: each time when
doing despicable things to the loader, I get to add debugging code too and run
it in a VM to see how those despicable things fare. But then I remove the
debugging glue again when cleaning up the despicable things and turning them
into proper patches.

So make this debugging code permanent but keep it out of reach from production
use and have it build- and boot-disabled  by default.


Borislav Petkov (AMD) (2):
  x86/microcode: Add microcode= cmdline parsing
  x86/microcode: Add microcode loader debugging functionality

 .../admin-guide/kernel-parameters.txt         | 14 ++-
 arch/x86/Kconfig                              | 16 +++-
 arch/x86/kernel/cpu/microcode/amd.c           | 88 ++++++++++++++-----
 arch/x86/kernel/cpu/microcode/core.c          | 51 +++++++++--
 arch/x86/kernel/cpu/microcode/internal.h      | 10 +++
 5 files changed, 148 insertions(+), 31 deletions(-)

-- 
2.51.0

[PATCH -v1 1/2] x86/microcode: Add microcode= cmdline parsing

[Borislav Petkov]

From: "Borislav Petkov (AMD)" <bp@alien8.de>

Add a "microcode=" command line argument after which all options can be
passed in a comma-separated list.

Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
---
 .../admin-guide/kernel-parameters.txt         |  8 ++++--
 arch/x86/Kconfig                              |  4 +--
 arch/x86/kernel/cpu/microcode/core.c          | 26 ++++++++++++++++---
 3 files changed, 30 insertions(+), 8 deletions(-)

diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt
index 747a55abf494..9e3bbce6583f 100644
--- a/Documentation/admin-guide/kernel-parameters.txt
+++ b/Documentation/admin-guide/kernel-parameters.txt
@@ -3767,8 +3767,12 @@
 
 	mga=		[HW,DRM]
 
-	microcode.force_minrev=	[X86]
-			Format: <bool>
+	microcode=      [X86] Control the behavior of the microcode loader.
+	                Available options, comma separated:
+
+			dis_ucode_ldr: disable the microcode loader
+
+			force_minrev:
 			Enable or disable the microcode minimal revision
 			enforcement for the runtime microcode loader.
 
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 58d890fe2100..aa250d90f927 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -1340,7 +1340,7 @@ config MICROCODE_LATE_LOADING
 	  use this at your own risk. Late loading taints the kernel unless the
 	  microcode header indicates that it is safe for late loading via the
 	  minimal revision check. This minimal revision check can be enforced on
-	  the kernel command line with "microcode.minrev=Y".
+	  the kernel command line with "microcode=force_minrev".
 
 config MICROCODE_LATE_FORCE_MINREV
 	bool "Enforce late microcode loading minimal revision check"
@@ -1356,7 +1356,7 @@ config MICROCODE_LATE_FORCE_MINREV
 	  revision check fails.
 
 	  This minimal revision check can also be controlled via the
-	  "microcode.minrev" parameter on the kernel command line.
+	  "microcode=force_minrev" parameter on the kernel command line.
 
 	  If unsure say Y.
 
diff --git a/arch/x86/kernel/cpu/microcode/core.c b/arch/x86/kernel/cpu/microcode/core.c
index b92e09a87c69..7d590630673b 100644
--- a/arch/x86/kernel/cpu/microcode/core.c
+++ b/arch/x86/kernel/cpu/microcode/core.c
@@ -43,10 +43,9 @@
 #include "internal.h"
 
 static struct microcode_ops *microcode_ops;
-static bool dis_ucode_ldr = false;
+static bool dis_ucode_ldr;
 
 bool force_minrev = IS_ENABLED(CONFIG_MICROCODE_LATE_FORCE_MINREV);
-module_param(force_minrev, bool, S_IRUSR | S_IWUSR);
 
 /*
  * Synchronization.
@@ -126,13 +125,32 @@ bool __init microcode_loader_disabled(void)
 	return dis_ucode_ldr;
 }
 
+static void early_parse_cmdline(void)
+{
+	char cmd_buf[64] = {};
+	char *s, *p = cmd_buf;
+
+	if (cmdline_find_option(boot_command_line, "microcode", cmd_buf, sizeof(cmd_buf)) > 0) {
+		while ((s = strsep(&p, ","))) {
+			if (!strcmp("force_minrev", s))
+				force_minrev = true;
+
+			if (!strcmp(s, "dis_ucode_ldr"))
+				dis_ucode_ldr = true;
+		}
+	}
+
+	/* old, compat option */
+	if (cmdline_find_option_bool(boot_command_line, "dis_ucode_ldr") > 0)
+		dis_ucode_ldr = true;
+}
+
 void __init load_ucode_bsp(void)
 {
 	unsigned int cpuid_1_eax;
 	bool intel = true;
 
-	if (cmdline_find_option_bool(boot_command_line, "dis_ucode_ldr") > 0)
-		dis_ucode_ldr = true;
+	early_parse_cmdline();
 
 	if (microcode_loader_disabled())
 		return;
-- 
2.51.0

[PATCH -v1 2/2] x86/microcode: Add microcode loader debugging functionality

[Borislav Petkov]

From: "Borislav Petkov (AMD)" <bp@alien8.de>

Instead of adding ad-hoc debugging glue to the microcode loader each
time I need it, add debugging functionality which is not built by
default and when built-in, off by default so that it can only be enabled
explicitly on the command line.

Simulate all patch handling the loader does except the actual loading of
the microcode patch into the hw.

Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
---
 .../admin-guide/kernel-parameters.txt         |  6 ++
 arch/x86/Kconfig                              | 12 +++
 arch/x86/kernel/cpu/microcode/amd.c           | 88 ++++++++++++++-----
 arch/x86/kernel/cpu/microcode/core.c          | 25 +++++-
 arch/x86/kernel/cpu/microcode/internal.h      | 10 +++
 5 files changed, 118 insertions(+), 23 deletions(-)

diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt
index 9e3bbce6583f..e7badf2aba63 100644
--- a/Documentation/admin-guide/kernel-parameters.txt
+++ b/Documentation/admin-guide/kernel-parameters.txt
@@ -3770,6 +3770,12 @@
 	microcode=      [X86] Control the behavior of the microcode loader.
 	                Available options, comma separated:
 
+			base_rev=X - with <X> with format: <u32>
+			Set the base microcode revision of each thread when in
+			debug mode.
+
+			dbg: enable debugging mode when run in a guest
+
 			dis_ucode_ldr: disable the microcode loader
 
 			force_minrev:
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index aa250d90f927..77f72f075d89 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -1360,6 +1360,18 @@ config MICROCODE_LATE_FORCE_MINREV
 
 	  If unsure say Y.
 
+config MICROCODE_DBG
+	bool "Enable microcode loader debugging"
+	default n
+	depends on MICROCODE
+	help
+	  Enable code which allows for debugging the microcode loader in
+	  a guest. Meaning the patch loading is simulated but everything else
+	  related to patch parsing and handling is done as on baremetal with
+	  the purpose of debugging solely the software side of things.
+
+	  You almost certainly want to say n here.
+
 config X86_MSR
 	tristate "/dev/cpu/*/msr - Model-specific register support"
 	help
diff --git a/arch/x86/kernel/cpu/microcode/amd.c b/arch/x86/kernel/cpu/microcode/amd.c
index 097e39327942..ced499789d64 100644
--- a/arch/x86/kernel/cpu/microcode/amd.c
+++ b/arch/x86/kernel/cpu/microcode/amd.c
@@ -249,15 +249,6 @@ static bool verify_sha256_digest(u32 patch_id, u32 cur_rev, const u8 *data, unsi
 	return true;
 }
 
-static u32 get_patch_level(void)
-{
-	u32 rev, dummy __always_unused;
-
-	native_rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy);
-
-	return rev;
-}
-
 static union cpuid_1_eax ucode_rev_to_cpuid(unsigned int val)
 {
 	union zen_patch_rev p;
@@ -275,6 +266,45 @@ static union cpuid_1_eax ucode_rev_to_cpuid(unsigned int val)
 	return c;
 }
 
+static u32 cpuid_to_ucode_rev(unsigned int val)
+{
+	union zen_patch_rev p = {};
+	union cpuid_1_eax c;
+
+	c.full = val;
+
+	p.stepping  = c.stepping;
+	p.model     = c.model;
+	p.ext_model = c.ext_model;
+	p.ext_fam   = c.ext_fam;
+
+	return p.ucode_rev;
+}
+
+static u32 get_patch_level(void)
+{
+	u32 rev, dummy __always_unused;
+
+	if (IS_ENABLED(CONFIG_MICROCODE_DBG)) {
+		int cpu = smp_processor_id();
+
+		if (!microcode_rev[cpu]) {
+			if (!base_rev)
+				base_rev = cpuid_to_ucode_rev(bsp_cpuid_1_eax);
+
+			microcode_rev[cpu] = base_rev;
+
+			ucode_dbg("CPU%d, base_rev: 0x%x\n", cpu, base_rev);
+		}
+
+		return microcode_rev[cpu];
+	}
+
+	native_rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy);
+
+	return rev;
+}
+
 static u16 find_equiv_id(struct equiv_cpu_table *et, u32 sig)
 {
 	unsigned int i;
@@ -304,13 +334,13 @@ static bool verify_container(const u8 *buf, size_t buf_size)
 	u32 cont_magic;
 
 	if (buf_size <= CONTAINER_HDR_SZ) {
-		pr_debug("Truncated microcode container header.\n");
+		ucode_dbg("Truncated microcode container header.\n");
 		return false;
 	}
 
 	cont_magic = *(const u32 *)buf;
 	if (cont_magic != UCODE_MAGIC) {
-		pr_debug("Invalid magic value (0x%08x).\n", cont_magic);
+		ucode_dbg("Invalid magic value (0x%08x).\n", cont_magic);
 		return false;
 	}
 
@@ -335,8 +365,8 @@ static bool verify_equivalence_table(const u8 *buf, size_t buf_size)
 
 	cont_type = hdr[1];
 	if (cont_type != UCODE_EQUIV_CPU_TABLE_TYPE) {
-		pr_debug("Wrong microcode container equivalence table type: %u.\n",
-			 cont_type);
+		ucode_dbg("Wrong microcode container equivalence table type: %u.\n",
+			  cont_type);
 		return false;
 	}
 
@@ -345,7 +375,7 @@ static bool verify_equivalence_table(const u8 *buf, size_t buf_size)
 	equiv_tbl_len = hdr[2];
 	if (equiv_tbl_len < sizeof(struct equiv_cpu_entry) ||
 	    buf_size < equiv_tbl_len) {
-		pr_debug("Truncated equivalence table.\n");
+		ucode_dbg("Truncated equivalence table.\n");
 		return false;
 	}
 
@@ -365,7 +395,7 @@ static bool __verify_patch_section(const u8 *buf, size_t buf_size, u32 *sh_psize
 	const u32 *hdr;
 
 	if (buf_size < SECTION_HDR_SIZE) {
-		pr_debug("Truncated patch section.\n");
+		ucode_dbg("Truncated patch section.\n");
 		return false;
 	}
 
@@ -374,13 +404,13 @@ static bool __verify_patch_section(const u8 *buf, size_t buf_size, u32 *sh_psize
 	p_size = hdr[1];
 
 	if (p_type != UCODE_UCODE_TYPE) {
-		pr_debug("Invalid type field (0x%x) in container file section header.\n",
-			 p_type);
+		ucode_dbg("Invalid type field (0x%x) in container file section header.\n",
+			  p_type);
 		return false;
 	}
 
 	if (p_size < sizeof(struct microcode_header_amd)) {
-		pr_debug("Patch of size %u too short.\n", p_size);
+		ucode_dbg("Patch of size %u too short.\n", p_size);
 		return false;
 	}
 
@@ -457,12 +487,12 @@ static int verify_patch(const u8 *buf, size_t buf_size, u32 *patch_size)
 	 * size sh_psize, as the section claims.
 	 */
 	if (buf_size < sh_psize) {
-		pr_debug("Patch of size %u truncated.\n", sh_psize);
+		ucode_dbg("Patch of size %u truncated.\n", sh_psize);
 		return -1;
 	}
 
 	if (!__verify_patch_size(sh_psize, buf_size)) {
-		pr_debug("Per-family patch size mismatch.\n");
+		ucode_dbg("Per-family patch size mismatch.\n");
 		return -1;
 	}
 
@@ -476,6 +506,9 @@ static int verify_patch(const u8 *buf, size_t buf_size, u32 *patch_size)
 
 	proc_id	= mc_hdr->processor_rev_id;
 	patch_fam = 0xf + (proc_id >> 12);
+
+	ucode_dbg("Patch-ID 0x%08x: family: 0x%x\n", mc_hdr->patch_id, patch_fam);
+
 	if (patch_fam != family)
 		return 1;
 
@@ -546,9 +579,14 @@ static size_t parse_container(u8 *ucode, size_t size, struct cont_desc *desc)
 		}
 
 		mc = (struct microcode_amd *)(buf + SECTION_HDR_SIZE);
+
+		ucode_dbg("patch_id: 0x%x\n", mc->hdr.patch_id);
+
 		if (mc_patch_matches(mc, eq_id)) {
 			desc->psize = patch_size;
 			desc->mc = mc;
+
+			ucode_dbg(" match: size: %d\n", patch_size);
 		}
 
 skip:
@@ -619,8 +657,14 @@ static bool __apply_microcode_amd(struct microcode_amd *mc, u32 *cur_rev,
 			invlpg(p_addr_end);
 	}
 
+	if (IS_ENABLED(CONFIG_MICROCODE_DBG))
+		microcode_rev[smp_processor_id()] = mc->hdr.patch_id;
+
 	/* verify patch application was successful */
 	*cur_rev = get_patch_level();
+
+	ucode_dbg("updated rev: 0x%x\n", *cur_rev);
+
 	if (*cur_rev != mc->hdr.patch_id)
 		return false;
 
@@ -1008,7 +1052,7 @@ static int verify_and_add_patch(u8 family, u8 *fw, unsigned int leftover,
 	patch->patch_id  = mc_hdr->patch_id;
 	patch->equiv_cpu = proc_id;
 
-	pr_debug("%s: Adding patch_id: 0x%08x, proc_id: 0x%04x\n",
+	ucode_dbg("%s: Adding patch_id: 0x%08x, proc_id: 0x%04x\n",
 		 __func__, patch->patch_id, proc_id);
 
 	/* ... and add to cache. */
@@ -1151,7 +1195,7 @@ static enum ucode_state request_microcode_amd(int cpu, struct device *device)
 		snprintf(fw_name, sizeof(fw_name), "amd-ucode/microcode_amd_fam%.2xh.bin", c->x86);
 
 	if (request_firmware_direct(&fw, (const char *)fw_name, device)) {
-		pr_debug("failed to load file %s\n", fw_name);
+		ucode_dbg("failed to load file %s\n", fw_name);
 		goto out;
 	}
 
diff --git a/arch/x86/kernel/cpu/microcode/core.c b/arch/x86/kernel/cpu/microcode/core.c
index 7d590630673b..f045670a1fae 100644
--- a/arch/x86/kernel/cpu/microcode/core.c
+++ b/arch/x86/kernel/cpu/microcode/core.c
@@ -47,6 +47,18 @@ static bool dis_ucode_ldr;
 
 bool force_minrev = IS_ENABLED(CONFIG_MICROCODE_LATE_FORCE_MINREV);
 
+/*
+ * Those below should be behind CONFIG_MICROCODE_DBG ifdeffery but in
+ * order to not uglify the code with ifdeffery and use IS_ENABLED()
+ * instead, leave them in. When microcode debugging is not enabled,
+ * those are meaningless anyway.
+ */
+/* enable loader debugging */
+bool dbg;
+/* base microcode revision for debugging */
+u32 base_rev;
+u32 microcode_rev[NR_CPUS] = {};
+
 /*
  * Synchronization.
  *
@@ -118,7 +130,7 @@ bool __init microcode_loader_disabled(void)
 	 *    overwritten.
 	 */
 	if (!cpuid_feature() ||
-	    native_cpuid_ecx(1) & BIT(31) ||
+	    ((native_cpuid_ecx(1) & BIT(31)) && !dbg) ||
 	    amd_check_current_patch_level())
 		dis_ucode_ldr = true;
 
@@ -132,6 +144,17 @@ static void early_parse_cmdline(void)
 
 	if (cmdline_find_option(boot_command_line, "microcode", cmd_buf, sizeof(cmd_buf)) > 0) {
 		while ((s = strsep(&p, ","))) {
+			if (IS_ENABLED(CONFIG_MICROCODE_DBG)) {
+				if (!strcmp(s, "dbg"))
+					dbg = true;
+
+				if (strstr(s, "base_rev=")) {
+					/* advance to the option arg */
+					strsep(&s, "=");
+					if (kstrtouint(s, 16, &base_rev)) { ; }
+				}
+			}
+
 			if (!strcmp("force_minrev", s))
 				force_minrev = true;
 
diff --git a/arch/x86/kernel/cpu/microcode/internal.h b/arch/x86/kernel/cpu/microcode/internal.h
index 50a9702ae4e2..bca806dd1aac 100644
--- a/arch/x86/kernel/cpu/microcode/internal.h
+++ b/arch/x86/kernel/cpu/microcode/internal.h
@@ -44,6 +44,10 @@ struct early_load_data {
 
 extern struct early_load_data early_data;
 extern struct ucode_cpu_info ucode_cpu_info[];
+extern u32 microcode_rev[NR_CPUS];
+extern u32 base_rev;
+extern bool dbg;
+
 struct cpio_data find_microcode_in_initrd(const char *path);
 
 #define MAX_UCODE_COUNT 128
@@ -122,4 +126,10 @@ static inline void reload_ucode_intel(void) { }
 static inline struct microcode_ops *init_intel_microcode(void) { return NULL; }
 #endif  /* !CONFIG_CPU_SUP_INTEL */
 
+#define ucode_dbg(fmt, ...)					\
+({								\
+	if (dbg)						\
+		pr_info(fmt, ##__VA_ARGS__);			\
+})
+
 #endif /* _X86_MICROCODE_INTERNAL_H */
-- 
2.51.0

Re: [PATCH -v1 2/2] x86/microcode: Add microcode loader debugging functionality

[Nikolay Borisov]

On 20.08.25 г. 16:50 ч., Borislav Petkov wrote:
> From: "Borislav Petkov (AMD)" <bp@alien8.de>
> 
> Instead of adding ad-hoc debugging glue to the microcode loader each
> time I need it, add debugging functionality which is not built by
> default and when built-in, off by default so that it can only be enabled
> explicitly on the command line.
> 
> Simulate all patch handling the loader does except the actual loading of
> the microcode patch into the hw.
> 
> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
> ---
>   .../admin-guide/kernel-parameters.txt         |  6 ++
>   arch/x86/Kconfig                              | 12 +++
>   arch/x86/kernel/cpu/microcode/amd.c           | 88 ++++++++++++++-----
>   arch/x86/kernel/cpu/microcode/core.c          | 25 +++++-
>   arch/x86/kernel/cpu/microcode/internal.h      | 10 +++
>   5 files changed, 118 insertions(+), 23 deletions(-)
> 
> diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt
> index 9e3bbce6583f..e7badf2aba63 100644
> --- a/Documentation/admin-guide/kernel-parameters.txt
> +++ b/Documentation/admin-guide/kernel-parameters.txt
> @@ -3770,6 +3770,12 @@
>   	microcode=      [X86] Control the behavior of the microcode loader.
>   	                Available options, comma separated:
>   
> +			base_rev=X - with <X> with format: <u32>
> +			Set the base microcode revision of each thread when in
> +			debug mode.
> +
> +			dbg: enable debugging mode when run in a guest

nit: s/in a guest// since nothing in the debug code is really dependent 
on whether it's run as a guest or not.
> +
>   			dis_ucode_ldr: disable the microcode loader
>   
>   			force_minrev:
> diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
> index aa250d90f927..77f72f075d89 100644
> --- a/arch/x86/Kconfig
> +++ b/arch/x86/Kconfig
> @@ -1360,6 +1360,18 @@ config MICROCODE_LATE_FORCE_MINREV
>   
>   	  If unsure say Y.
>   
> +config MICROCODE_DBG
> +	bool "Enable microcode loader debugging"
> +	default n
> +	depends on MICROCODE
> +	help
> +	  Enable code which allows for debugging the microcode loader in
> +	  a guest. Meaning the patch loading is simulated but everything else

dito, AFAICS it's perfectly fine to have the debug output if not run in 
a guest, no ?
> +	  related to patch parsing and handling is done as on baremetal with
> +	  the purpose of debugging solely the software side of things.
> +
> +	  You almost certainly want to say n here.
> +
>   config X86_MSR
>   	tristate "/dev/cpu/*/msr - Model-specific register support"
>   	help


<snip>

Re: [PATCH -v1 2/2] x86/microcode: Add microcode loader debugging functionality

[Borislav Petkov]

On Wed, Aug 20, 2025 at 06:35:51PM +0300, Nikolay Borisov wrote:
> nit: s/in a guest// since nothing in the debug code is really dependent on
> whether it's run as a guest or not.

It is - see get_patch_level() and microcode_loader_disabled().

> dito, AFAICS it's perfectly fine to have the debug output if not run in a
> guest, no ?

Maybe.

But let's enable that when the actual need for it materializes.

-- 
Regards/Gruss,
    Boris.

https://people.kernel.org/tglx/notes-about-netiquette

Re: [PATCH -v1 1/2] x86/microcode: Add microcode= cmdline parsing

[Sohil Mehta]

On 8/20/2025 6:50 AM, Borislav Petkov wrote:
> From: "Borislav Petkov (AMD)" <bp@alien8.de>
> 
> Add a "microcode=" command line argument after which all options can be
> passed in a comma-separated list.
> 
> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
> ---
>  .../admin-guide/kernel-parameters.txt         |  8 ++++--
>  arch/x86/Kconfig                              |  4 +--
>  arch/x86/kernel/cpu/microcode/core.c          | 26 ++++++++++++++++---
>  3 files changed, 30 insertions(+), 8 deletions(-)
> 

Reviewed-by: Sohil Mehta <sohil.mehta@intel.com>

Re: [PATCH -v1 1/2] x86/microcode: Add microcode= cmdline parsing

[Chang S. Bae]

On 8/20/2025 6:50 AM, Borislav Petkov wrote:
> From: "Borislav Petkov (AMD)" <bp@alien8.de>
> 
> Add a "microcode=" command line argument after which all options can be
> passed in a comma-separated list.
> 
> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
> ---
>   .../admin-guide/kernel-parameters.txt         |  8 ++++--
>   arch/x86/Kconfig                              |  4 +--
>   arch/x86/kernel/cpu/microcode/core.c          | 26 ++++++++++++++++---
>   3 files changed, 30 insertions(+), 8 deletions(-)

Looks good to me as well:

Reviewed-by: Chang S. Bae <chang.seok.bae@intel.com>

Re: [PATCH -v1 2/2] x86/microcode: Add microcode loader debugging functionality

[Sohil Mehta]

On 8/20/2025 6:50 AM, Borislav Petkov wrote:
> From: "Borislav Petkov (AMD)" <bp@alien8.de>
> 
> Instead of adding ad-hoc debugging glue to the microcode loader each
> time I need it, add debugging functionality which is not built by
> default and when built-in, off by default so that it can only be enabled
> explicitly on the command line.
> 

I didn't realize this last time. It's supposed to be compile-time
disabled and runtime disabled by default (which makes sense).


> +static u32 get_patch_level(void)
> +{
> +	u32 rev, dummy __always_unused;
> +
> +	if (IS_ENABLED(CONFIG_MICROCODE_DBG)) {

Does this need to be (IS_ENABLED(CONFIG_MICROCODE_DBG) && dbg)?

The base_rev description says:
base_rev=X - with <X> with format: <u32>
		Set the base microcode revision of each thread when in
		debug mode.

IIUC, the base_rev handling is also supposed to be runtime disabled by
default, right?

You can probably directly check for "if (dbg)" but that would remove the
compile time code optimization.


> +		int cpu = smp_processor_id();
> +
> +		if (!microcode_rev[cpu]) {
> +			if (!base_rev)
> +				base_rev = cpuid_to_ucode_rev(bsp_cpuid_1_eax);
> +
> +			microcode_rev[cpu] = base_rev;
> +
> +			ucode_dbg("CPU%d, base_rev: 0x%x\n", cpu, base_rev);
> +		}
> +
> +		return microcode_rev[cpu];
> +	}
> +
> +	native_rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy);
> +
> +	return rev;
> +}
> +

...

> @@ -619,8 +657,14 @@ static bool __apply_microcode_amd(struct microcode_amd *mc, u32 *cur_rev,
>  			invlpg(p_addr_end);
>  	}
>  
> +	if (IS_ENABLED(CONFIG_MICROCODE_DBG))
> +		microcode_rev[smp_processor_id()] = mc->hdr.patch_id;
> +

Ditto.

>  	/* verify patch application was successful */
>  	*cur_rev = get_patch_level();

...

The rest of the changes look fine to me.

Re: [PATCH -v1 2/2] x86/microcode: Add microcode loader debugging functionality

[Borislav Petkov]

On Wed, Aug 20, 2025 at 10:19:11PM -0700, Sohil Mehta wrote:
> Does this need to be (IS_ENABLED(CONFIG_MICROCODE_DBG) && dbg)?

Both you and Nikolay have a point - we don't need both. So actually, dbg can
go and can be added when really needed.

Right now, the debugging stuff is for in a guest only and will be build-time
enabled.

If we decide we want to have runtime controllable and *baremetal* debugging,
then we can extend that and add the cmdline switch.

I think...

---

diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt
index e7badf2aba63..2c142e5f9f06 100644
--- a/Documentation/admin-guide/kernel-parameters.txt
+++ b/Documentation/admin-guide/kernel-parameters.txt
@@ -3774,8 +3774,6 @@
 			Set the base microcode revision of each thread when in
 			debug mode.
 
-			dbg: enable debugging mode when run in a guest
-
 			dis_ucode_ldr: disable the microcode loader
 
 			force_minrev:
diff --git a/arch/x86/kernel/cpu/microcode/core.c b/arch/x86/kernel/cpu/microcode/core.c
index f045670a1fae..f75c140906d0 100644
--- a/arch/x86/kernel/cpu/microcode/core.c
+++ b/arch/x86/kernel/cpu/microcode/core.c
@@ -53,8 +53,6 @@ bool force_minrev = IS_ENABLED(CONFIG_MICROCODE_LATE_FORCE_MINREV);
  * instead, leave them in. When microcode debugging is not enabled,
  * those are meaningless anyway.
  */
-/* enable loader debugging */
-bool dbg;
 /* base microcode revision for debugging */
 u32 base_rev;
 u32 microcode_rev[NR_CPUS] = {};
@@ -130,7 +128,8 @@ bool __init microcode_loader_disabled(void)
 	 *    overwritten.
 	 */
 	if (!cpuid_feature() ||
-	    ((native_cpuid_ecx(1) & BIT(31)) && !dbg) ||
+	    ((native_cpuid_ecx(1) & BIT(31)) &&
+	      !IS_ENABLED(CONFIG_MICROCODE_DBG)) ||
 	    amd_check_current_patch_level())
 		dis_ucode_ldr = true;
 
@@ -145,9 +144,6 @@ static void early_parse_cmdline(void)
 	if (cmdline_find_option(boot_command_line, "microcode", cmd_buf, sizeof(cmd_buf)) > 0) {
 		while ((s = strsep(&p, ","))) {
 			if (IS_ENABLED(CONFIG_MICROCODE_DBG)) {
-				if (!strcmp(s, "dbg"))
-					dbg = true;
-
 				if (strstr(s, "base_rev=")) {
 					/* advance to the option arg */
 					strsep(&s, "=");
diff --git a/arch/x86/kernel/cpu/microcode/internal.h b/arch/x86/kernel/cpu/microcode/internal.h
index bca806dd1aac..ae8dbc2b908d 100644
--- a/arch/x86/kernel/cpu/microcode/internal.h
+++ b/arch/x86/kernel/cpu/microcode/internal.h
@@ -46,7 +46,6 @@ extern struct early_load_data early_data;
 extern struct ucode_cpu_info ucode_cpu_info[];
 extern u32 microcode_rev[NR_CPUS];
 extern u32 base_rev;
-extern bool dbg;
 
 struct cpio_data find_microcode_in_initrd(const char *path);
 
@@ -128,7 +127,7 @@ static inline struct microcode_ops *init_intel_microcode(void) { return NULL; }
 
 #define ucode_dbg(fmt, ...)					\
 ({								\
-	if (dbg)						\
+	if (IS_ENABLED(CONFIG_MICROCODE_DBG))			\
 		pr_info(fmt, ##__VA_ARGS__);			\
 })
 
-- 
Regards/Gruss,
    Boris.

https://people.kernel.org/tglx/notes-about-netiquette

Re: [PATCH -v1 2/2] x86/microcode: Add microcode loader debugging functionality

[Sohil Mehta]

On 8/29/2025 2:45 AM, Borislav Petkov wrote:
> On Wed, Aug 20, 2025 at 10:19:11PM -0700, Sohil Mehta wrote:
>> Does this need to be (IS_ENABLED(CONFIG_MICROCODE_DBG) && dbg)?
> 
> Both you and Nikolay have a point - we don't need both. So actually, dbg can
> go and can be added when really needed.
> 

My only concern is someone could easily enable it by mistake. It might
lead to unnecessary reports and debug. Maybe we print a scary dmesg log
whenever CONFIG_MICROCODE_DBG is enabled? That would be easy to spot in
reports, and hopefully it would deter folks from enabling it unnecessarily.

No strong preference.

> Right now, the debugging stuff is for in a guest only and will be build-time
> enabled.
> 
> If we decide we want to have runtime controllable and *baremetal* debugging,
> then we can extend that and add the cmdline switch.
> 

Re: [PATCH -v1 2/2] x86/microcode: Add microcode loader debugging functionality

[Borislav Petkov]

On Fri, Aug 29, 2025 at 04:25:13PM -0700, Sohil Mehta wrote:
> My only concern is someone could easily enable it by mistake. It might
> lead to unnecessary reports and debug. Maybe we print a scary dmesg log
> whenever CONFIG_MICROCODE_DBG is enabled? That would be easy to spot in
> reports, and hopefully it would deter folks from enabling it unnecessarily.

When that happens, we'll add the cmdline switch as an additional precaution
but I'm not worried - we look .configs on bug reports.

-- 
Regards/Gruss,
    Boris.

https://people.kernel.org/tglx/notes-about-netiquette

Re: [PATCH -v1 1/2] x86/microcode: Add microcode= cmdline parsing

[kernel test robot]

Hello,


this could be a noise, we didn't see the relation between the patch with the
issue we observed. however, we rebuild the kernels for both this commit and
parent 3 times.
(
our bot chose 894af4a1cde61c as the parent as below
* 19f370d45aceea x86/microcode: Add microcode= cmdline parsing
* 894af4a1cde61c (tip/x86/core, peterz-queue/x86/core) objtool: Validate kCFI calls
)

and for each rerun of both this commit and parent, we run more times, but the
issue is still quite persistent while parent keeps clean:

=========================================================================================
tbox_group/testcase/rootfs/kconfig/compiler/runtime/group/nr_groups:
  vm-snb/trinity/debian-11.1-i386-20220923.cgz/x86_64-randconfig-006-20250826/clang-20/300s/group-01/5

894af4a1cde61c34 19f370d45aceea5ab4c52e3afa0
---------------- ---------------------------
       fail:runs  %reproduction    fail:runs
           |             |             |
           :200         74%         149:200   last_state.is_incomplete_run
           :200         74%         147:200   last_state.running
           :200         75%         150:200   dmesg.CFI_failure_at_kobj_attr_show
           :200         75%         150:200   dmesg.Kernel_panic-not_syncing:Fatal_exception
           :200         75%         150:200   dmesg.Oops:invalid_opcode:#[##]KASAN
           :200         75%         150:200   dmesg.RIP:kobj_attr_show
           :200         75%         150:200   dmesg.boot_failures

so we just follow our report rule to still report this results FYI.

if it's really irrelevant, sorry maybe our env issues (though we still cannot
figure out for now). and if you can help us to figure out the potential problem
from our dmesg in below link, it will be very apprecidated!

below is full report.


kernel test robot noticed "CFI_failure_at_kobj_attr_show" on:

commit: 19f370d45aceea5ab4c52e3afa00226fb99c3fc8 ("[PATCH -v1 1/2] x86/microcode: Add microcode= cmdline parsing")
url: https://github.com/intel-lab-lkp/linux/commits/Borislav-Petkov/x86-microcode-Add-microcode-cmdline-parsing/20250820-215624
base: https://git.kernel.org/cgit/linux/kernel/git/tip/tip.git 894af4a1cde61c3401f237184fb770f72ff12df8
patch link: https://lore.kernel.org/all/20250820135043.19048-2-bp@kernel.org/
patch subject: [PATCH -v1 1/2] x86/microcode: Add microcode= cmdline parsing

in testcase: trinity
version: trinity-i386-abe9de86-1_20230429
with following parameters:

	runtime: 300s
	group: group-01
	nr_groups: 5



config: x86_64-randconfig-006-20250826
compiler: clang-20
test machine: qemu-system-x86_64 -enable-kvm -cpu SandyBridge -smp 2 -m 16G

(please refer to attached dmesg/kmsg for entire log/backtrace)



If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <oliver.sang@intel.com>
| Closes: https://lore.kernel.org/oe-lkp/202509021646.bc78d9ef-lkp@intel.com


The kernel config and materials to reproduce are available at:
https://download.01.org/0day-ci/archive/20250902/202509021646.bc78d9ef-lkp@intel.com


[  453.382281][ T7761] CFI failure at kobj_attr_show+0x59/0x80 (target: nilfs_feature_revision_show+0x0/0x30; expected type: 0x1b8aae92)
[  453.386793][ T7761] Oops: invalid opcode: 0000 [#1] KASAN
[  453.388638][ T7761] CPU: 0 UID: 65534 PID: 7761 Comm: trinity-c2 Not tainted 6.17.0-rc2-00017-g19f370d45ace #1 NONE 
[  453.391831][ T7761] Hardware name: QEMU Standard PC (i440FX + PIIX, 1996), BIOS 1.16.2-debian-1.16.2-1 04/01/2014
[  453.395231][ T7761] RIP: 0010:kobj_attr_show+0x59/0x80
[  453.397175][ T7761] Code: 08 00 74 08 4c 89 e7 e8 75 90 d2 fb 4d 8b 1c 24 4d 85 db 74 1f 4c 89 ff 4c 89 f6 48 89 da 41 ba 6e 51 75 e4 45 03 53 f1 74 02 <0f> 0b 2e e8 ef d7 08 00 eb 07 48 c7 c0 fb ff ff ff 5b 41 5c 41 5e
[  453.403170][ T7761] RSP: 0018:ffffc90002b57a48 EFLAGS: 00010287
[  453.405399][ T7761] RAX: 1ffffffff11d2fe9 RBX: ffff8881255ce000 RCX: dffffc0000000000
[  453.408012][ T7761] RDX: ffff8881255ce000 RSI: ffffffff88e97f20 RDI: ffff888106a5e250
[  453.410593][ T7761] RBP: ffffc90002b57a68 R08: ffff8881255cefff R09: 0000000000000000
[  453.413717][ T7761] R10: 0000000082bfb03f R11: ffffffff82621360 R12: ffffffff88e97f48
[  453.416820][ T7761] R13: 1ffff110295a3e80 R14: ffffffff88e97f20 R15: ffff888106a5e250
[  453.419944][ T7761] FS:  0000000000000000(0000) GS:0000000000000000(0063) knlGS:00000000f7ed7280
[  453.422938][ T7761] CS:  0010 DS: 002b ES: 002b CR0: 0000000080050033
[  453.425060][ T7761] CR2: 00000000f7795414 CR3: 000000015b1cc000 CR4: 00000000000406b0
[  453.427781][ T7761] Call Trace:
[  453.429070][ T7761]  <TASK>
[  453.430222][ T7761]  sysfs_kf_seq_show+0x2a9/0x390
[  453.431885][ T7761]  ? __cfi_kobj_attr_show+0x10/0x10
[  453.433693][ T7761]  kernfs_seq_show+0x107/0x15b
[  453.435360][ T7761]  seq_read_iter+0x55d/0xdeb
[  453.436971][ T7761]  ? kernfs_fop_read_iter+0x14c/0x4a0
[  453.438770][ T7761]  kernfs_fop_read_iter+0x14c/0x4a0
[  453.440385][ T7761]  ? __import_iovec+0x31b/0x3db
[  453.441900][ T7761]  do_iter_readv_writev+0x3de/0x590
[  453.443609][ T7761]  vfs_readv+0x15d/0x3f5
[  453.445305][ T7761]  ? trace_sys_enter+0x54/0xe5
[  453.447044][ T7761]  do_readv+0xde/0x190
[  453.448551][ T7761]  __ia32_sys_readv+0x80/0x90
[  453.450192][ T7761]  ia32_sys_call+0x2dbd/0x2efb
[  453.451877][ T7761]  __do_fast_syscall_32+0xaa/0x2a5
[  453.453640][ T7761]  do_fast_syscall_32+0x36/0x8b
[  453.455342][ T7761]  do_SYSENTER_32+0x1f/0x3b
[  453.456962][ T7761]  entry_SYSENTER_compat_after_hwframe+0x78/0x82
[  453.459058][ T7761] RIP: 0023:0xf7ede539
[  453.460559][ T7761] Code: 03 74 b4 01 10 07 03 74 b0 01 10 08 03 74 d8 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 51 52 55 89 e5 0f 34 cd 80 <5d> 5a 59 c3 cc 90 90 90 90 90 90 90 90 90 90 90 90 90 90 90 90 90
[  453.466394][ T7761] RSP: 002b:00000000ffa4237c EFLAGS: 00000292 ORIG_RAX: 0000000000000091
[  453.469176][ T7761] RAX: ffffffffffffffda RBX: 00000000000000f5 RCX: 00000000571a6370
[  453.471897][ T7761] RDX: 00000000000000af RSI: 0000000000000013 RDI: 0000000000000002
[  453.474598][ T7761] RBP: 00000000201a2903 R08: 0000000000000000 R09: 0000000000000000
[  453.477296][ T7761] R10: 0000000000000000 R11: 0000000000000246 R12: 0000000000000000
[  453.479969][ T7761] R13: 0000000000000000 R14: 0000000000000000 R15: 0000000000000000
[  453.482612][ T7761]  </TASK>
[  453.483846][ T7761] Modules linked in:
[  453.485501][ T7761] ---[ end trace 0000000000000000 ]---
[  453.487396][ T7761] RIP: 0010:kobj_attr_show+0x59/0x80
[  453.489298][ T7761] Code: 08 00 74 08 4c 89 e7 e8 75 90 d2 fb 4d 8b 1c 24 4d 85 db 74 1f 4c 89 ff 4c 89 f6 48 89 da 41 ba 6e 51 75 e4 45 03 53 f1 74 02 <0f> 0b 2e e8 ef d7 08 00 eb 07 48 c7 c0 fb ff ff ff 5b 41 5c 41 5e
[  453.495522][ T7761] RSP: 0018:ffffc90002b57a48 EFLAGS: 00010287
[  453.497663][ T7761] RAX: 1ffffffff11d2fe9 RBX: ffff8881255ce000 RCX: dffffc0000000000
[  453.500363][ T7761] RDX: ffff8881255ce000 RSI: ffffffff88e97f20 RDI: ffff888106a5e250
[  453.503133][ T7761] RBP: ffffc90002b57a68 R08: ffff8881255cefff R09: 0000000000000000
[  453.505897][ T7761] R10: 0000000082bfb03f R11: ffffffff82621360 R12: ffffffff88e97f48
[  453.508738][ T7761] R13: 1ffff110295a3e80 R14: ffffffff88e97f20 R15: ffff888106a5e250
[  453.511482][ T7761] FS:  0000000000000000(0000) GS:0000000000000000(0063) knlGS:00000000f7ed7280
[  453.514551][ T7761] CS:  0010 DS: 002b ES: 002b CR0: 0000000080050033
[  453.516790][ T7761] CR2: 00000000f7795414 CR3: 000000015b1cc000 CR4: 00000000000406b0
[  453.519505][ T7761] Kernel panic - not syncing: Fatal exception
[  453.521564][ T7761] Kernel Offset: disabled


-- 
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki

Re: [PATCH -v1 1/2] x86/microcode: Add microcode= cmdline parsing

[Borislav Petkov]

+ Nathan for the clang weirdness below...

On Tue, Sep 02, 2025 at 04:45:12PM +0800, kernel test robot wrote:
> 
> 
> Hello,
> 
> 
> this could be a noise, we didn't see the relation between the patch with the
> issue we observed. however, we rebuild the kernels for both this commit and
> parent 3 times.
> (
> our bot chose 894af4a1cde61c as the parent as below
> * 19f370d45aceea x86/microcode: Add microcode= cmdline parsing
> * 894af4a1cde61c (tip/x86/core, peterz-queue/x86/core) objtool: Validate kCFI calls
> )
> 
> and for each rerun of both this commit and parent, we run more times, but the
> issue is still quite persistent while parent keeps clean:
> 
> =========================================================================================
> tbox_group/testcase/rootfs/kconfig/compiler/runtime/group/nr_groups:
>   vm-snb/trinity/debian-11.1-i386-20220923.cgz/x86_64-randconfig-006-20250826/clang-20/300s/group-01/5
> 
> 894af4a1cde61c34 19f370d45aceea5ab4c52e3afa0
> ---------------- ---------------------------
>        fail:runs  %reproduction    fail:runs
>            |             |             |
>            :200         74%         149:200   last_state.is_incomplete_run
>            :200         74%         147:200   last_state.running
>            :200         75%         150:200   dmesg.CFI_failure_at_kobj_attr_show
>            :200         75%         150:200   dmesg.Kernel_panic-not_syncing:Fatal_exception
>            :200         75%         150:200   dmesg.Oops:invalid_opcode:#[##]KASAN
>            :200         75%         150:200   dmesg.RIP:kobj_attr_show
>            :200         75%         150:200   dmesg.boot_failures
> 
> so we just follow our report rule to still report this results FYI.
> 
> if it's really irrelevant, sorry maybe our env issues (though we still cannot
> figure out for now). and if you can help us to figure out the potential problem
> from our dmesg in below link, it will be very apprecidated!

Yeah, I don't know what you did here but building with that .config, I can't
even boot that kernel in a VM because doing:

qemu-... -kernel bzImage ...

sends me into grub and asks me to select the default kernel.

And my qemu script boots arbitrary kernels just fine.

Also, I used clang-20 from here:

https://mirrors.edge.kernel.org/pub/tools/llvm/

and version 20.1.8 took something like ~10(!) minutes to link vmlinux with
that config. Just FYI for Nathan, maybe something's weird there.

> below is full report.

Leaving it in.

> 
> 
> kernel test robot noticed "CFI_failure_at_kobj_attr_show" on:
> 
> commit: 19f370d45aceea5ab4c52e3afa00226fb99c3fc8 ("[PATCH -v1 1/2] x86/microcode: Add microcode= cmdline parsing")
> url: https://github.com/intel-lab-lkp/linux/commits/Borislav-Petkov/x86-microcode-Add-microcode-cmdline-parsing/20250820-215624
> base: https://git.kernel.org/cgit/linux/kernel/git/tip/tip.git 894af4a1cde61c3401f237184fb770f72ff12df8
> patch link: https://lore.kernel.org/all/20250820135043.19048-2-bp@kernel.org/
> patch subject: [PATCH -v1 1/2] x86/microcode: Add microcode= cmdline parsing
> 
> in testcase: trinity
> version: trinity-i386-abe9de86-1_20230429
> with following parameters:
> 
> 	runtime: 300s
> 	group: group-01
> 	nr_groups: 5
> 
> 
> 
> config: x86_64-randconfig-006-20250826
> compiler: clang-20
> test machine: qemu-system-x86_64 -enable-kvm -cpu SandyBridge -smp 2 -m 16G
> 
> (please refer to attached dmesg/kmsg for entire log/backtrace)
> 
> 
> 
> If you fix the issue in a separate patch/commit (i.e. not just a new version of
> the same patch/commit), kindly add following tags
> | Reported-by: kernel test robot <oliver.sang@intel.com>
> | Closes: https://lore.kernel.org/oe-lkp/202509021646.bc78d9ef-lkp@intel.com
> 
> 
> The kernel config and materials to reproduce are available at:
> https://download.01.org/0day-ci/archive/20250902/202509021646.bc78d9ef-lkp@intel.com
> 
> 
> [  453.382281][ T7761] CFI failure at kobj_attr_show+0x59/0x80 (target: nilfs_feature_revision_show+0x0/0x30; expected type: 0x1b8aae92)
> [  453.386793][ T7761] Oops: invalid opcode: 0000 [#1] KASAN
> [  453.388638][ T7761] CPU: 0 UID: 65534 PID: 7761 Comm: trinity-c2 Not tainted 6.17.0-rc2-00017-g19f370d45ace #1 NONE 
> [  453.391831][ T7761] Hardware name: QEMU Standard PC (i440FX + PIIX, 1996), BIOS 1.16.2-debian-1.16.2-1 04/01/2014
> [  453.395231][ T7761] RIP: 0010:kobj_attr_show+0x59/0x80
> [  453.397175][ T7761] Code: 08 00 74 08 4c 89 e7 e8 75 90 d2 fb 4d 8b 1c 24 4d 85 db 74 1f 4c 89 ff 4c 89 f6 48 89 da 41 ba 6e 51 75 e4 45 03 53 f1 74 02 <0f> 0b 2e e8 ef d7 08 00 eb 07 48 c7 c0 fb ff ff ff 5b 41 5c 41 5e
> [  453.403170][ T7761] RSP: 0018:ffffc90002b57a48 EFLAGS: 00010287
> [  453.405399][ T7761] RAX: 1ffffffff11d2fe9 RBX: ffff8881255ce000 RCX: dffffc0000000000
> [  453.408012][ T7761] RDX: ffff8881255ce000 RSI: ffffffff88e97f20 RDI: ffff888106a5e250
> [  453.410593][ T7761] RBP: ffffc90002b57a68 R08: ffff8881255cefff R09: 0000000000000000
> [  453.413717][ T7761] R10: 0000000082bfb03f R11: ffffffff82621360 R12: ffffffff88e97f48
> [  453.416820][ T7761] R13: 1ffff110295a3e80 R14: ffffffff88e97f20 R15: ffff888106a5e250
> [  453.419944][ T7761] FS:  0000000000000000(0000) GS:0000000000000000(0063) knlGS:00000000f7ed7280
> [  453.422938][ T7761] CS:  0010 DS: 002b ES: 002b CR0: 0000000080050033
> [  453.425060][ T7761] CR2: 00000000f7795414 CR3: 000000015b1cc000 CR4: 00000000000406b0
> [  453.427781][ T7761] Call Trace:
> [  453.429070][ T7761]  <TASK>
> [  453.430222][ T7761]  sysfs_kf_seq_show+0x2a9/0x390
> [  453.431885][ T7761]  ? __cfi_kobj_attr_show+0x10/0x10
> [  453.433693][ T7761]  kernfs_seq_show+0x107/0x15b
> [  453.435360][ T7761]  seq_read_iter+0x55d/0xdeb
> [  453.436971][ T7761]  ? kernfs_fop_read_iter+0x14c/0x4a0
> [  453.438770][ T7761]  kernfs_fop_read_iter+0x14c/0x4a0
> [  453.440385][ T7761]  ? __import_iovec+0x31b/0x3db
> [  453.441900][ T7761]  do_iter_readv_writev+0x3de/0x590
> [  453.443609][ T7761]  vfs_readv+0x15d/0x3f5
> [  453.445305][ T7761]  ? trace_sys_enter+0x54/0xe5
> [  453.447044][ T7761]  do_readv+0xde/0x190
> [  453.448551][ T7761]  __ia32_sys_readv+0x80/0x90
> [  453.450192][ T7761]  ia32_sys_call+0x2dbd/0x2efb
> [  453.451877][ T7761]  __do_fast_syscall_32+0xaa/0x2a5
> [  453.453640][ T7761]  do_fast_syscall_32+0x36/0x8b
> [  453.455342][ T7761]  do_SYSENTER_32+0x1f/0x3b
> [  453.456962][ T7761]  entry_SYSENTER_compat_after_hwframe+0x78/0x82
> [  453.459058][ T7761] RIP: 0023:0xf7ede539
> [  453.460559][ T7761] Code: 03 74 b4 01 10 07 03 74 b0 01 10 08 03 74 d8 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 51 52 55 89 e5 0f 34 cd 80 <5d> 5a 59 c3 cc 90 90 90 90 90 90 90 90 90 90 90 90 90 90 90 90 90
> [  453.466394][ T7761] RSP: 002b:00000000ffa4237c EFLAGS: 00000292 ORIG_RAX: 0000000000000091
> [  453.469176][ T7761] RAX: ffffffffffffffda RBX: 00000000000000f5 RCX: 00000000571a6370
> [  453.471897][ T7761] RDX: 00000000000000af RSI: 0000000000000013 RDI: 0000000000000002
> [  453.474598][ T7761] RBP: 00000000201a2903 R08: 0000000000000000 R09: 0000000000000000
> [  453.477296][ T7761] R10: 0000000000000000 R11: 0000000000000246 R12: 0000000000000000
> [  453.479969][ T7761] R13: 0000000000000000 R14: 0000000000000000 R15: 0000000000000000
> [  453.482612][ T7761]  </TASK>
> [  453.483846][ T7761] Modules linked in:
> [  453.485501][ T7761] ---[ end trace 0000000000000000 ]---
> [  453.487396][ T7761] RIP: 0010:kobj_attr_show+0x59/0x80
> [  453.489298][ T7761] Code: 08 00 74 08 4c 89 e7 e8 75 90 d2 fb 4d 8b 1c 24 4d 85 db 74 1f 4c 89 ff 4c 89 f6 48 89 da 41 ba 6e 51 75 e4 45 03 53 f1 74 02 <0f> 0b 2e e8 ef d7 08 00 eb 07 48 c7 c0 fb ff ff ff 5b 41 5c 41 5e
> [  453.495522][ T7761] RSP: 0018:ffffc90002b57a48 EFLAGS: 00010287
> [  453.497663][ T7761] RAX: 1ffffffff11d2fe9 RBX: ffff8881255ce000 RCX: dffffc0000000000
> [  453.500363][ T7761] RDX: ffff8881255ce000 RSI: ffffffff88e97f20 RDI: ffff888106a5e250
> [  453.503133][ T7761] RBP: ffffc90002b57a68 R08: ffff8881255cefff R09: 0000000000000000
> [  453.505897][ T7761] R10: 0000000082bfb03f R11: ffffffff82621360 R12: ffffffff88e97f48
> [  453.508738][ T7761] R13: 1ffff110295a3e80 R14: ffffffff88e97f20 R15: ffff888106a5e250
> [  453.511482][ T7761] FS:  0000000000000000(0000) GS:0000000000000000(0063) knlGS:00000000f7ed7280
> [  453.514551][ T7761] CS:  0010 DS: 002b ES: 002b CR0: 0000000080050033
> [  453.516790][ T7761] CR2: 00000000f7795414 CR3: 000000015b1cc000 CR4: 00000000000406b0
> [  453.519505][ T7761] Kernel panic - not syncing: Fatal exception
> [  453.521564][ T7761] Kernel Offset: disabled
> 
> 
> -- 
> 0-DAY CI Kernel Test Service
> https://github.com/intel/lkp-tests/wiki
> 

-- 
Regards/Gruss,
    Boris.

https://people.kernel.org/tglx/notes-about-netiquette