Re: [PATCH v11 09/23] PCI/AER: Report CXL or PCIe bus error type in trace logging

Lukas Wunner
2025-09-10T15:34:03Z

On Wed, Sep 10, 2025 at 10:26:19AM -0500, Bowman, Terry wrote:
> On 8/27/2025 2:37 AM, Lukas Wunner wrote:
> > On Tue, Aug 26, 2025 at 08:35:24PM -0500, Terry Bowman wrote:
> >> The AER service driver and aer_event tracing currently log 'PCIe Bus Type'
> >> for all errors. Update the driver and aer_event tracing to log 'CXL Bus
> >> Type' for CXL device errors.
> >>
> >> This requires the AER can identify and distinguish between PCIe errors and
> >> CXL errors.
> >>
> >> Introduce boolean 'is_cxl' to 'struct aer_err_info'. Add assignment in
> >> aer_get_device_error_info() and pci_print_aer().
> >>
> >> Update the aer_event trace routine to accept a bus type string parameter.
> > aer_print_error() has a pointer to the struct pci_dev and you've added
> > an is_cxl bit to that struct in the preceding patch.
> >
> > Is there a reason why you can't just use that dev->is_cxl bit, in lieu of
> > adding another is_cxl bit to struct aer_err_info?
> >
> > If so, please document it in a code comment or at least in the commit
> > message. If there isn't, please use dev->is_cxl.
>
> [..] the
> actual device bus state can change between capturing the AER status and
> handling/logging. An example is a training HW error. Caching the 'is_cxl'
> will allow the drivers to properly identify the error bus type for
> further logging and handling.

Thanks for the explanation. Could you document this in a code comment?
It's not obvious at least to me.

Lukas