From: kernel test robot <lkp@intel.com>
To: "Svyatoslav Ryhel" <clamor95@gmail.com>,
"Thierry Reding" <thierry.reding@gmail.com>,
"Mikko Perttunen" <mperttunen@nvidia.com>,
"Jonathan Hunter" <jonathanh@nvidia.com>,
"Sowjanya Komatineni" <skomatineni@nvidia.com>,
"Luca Ceresoli" <luca.ceresoli@bootlin.com>,
"David Airlie" <airlied@gmail.com>,
"Simona Vetter" <simona@ffwll.ch>,
"Maarten Lankhorst" <maarten.lankhorst@linux.intel.com>,
"Maxime Ripard" <mripard@kernel.org>,
"Thomas Zimmermann" <tzimmermann@suse.de>,
"Rob Herring" <robh@kernel.org>,
"Krzysztof Kozlowski" <krzk@kernel.org>,
"Conor Dooley" <conor+dt@kernel.org>,
"Prashant Gaikwad" <pgaikwad@nvidia.com>,
"Michael Turquette" <mturquette@baylibre.com>,
"Stephen Boyd" <sboyd@kernel.org>,
"Mauro Carvalho Chehab" <mchehab@kernel.org>,
"Greg Kroah-Hartman" <gregkh@linuxfoundation.org>,
"Dmitry Osipenko" <digetx@gmail.com>,
"Jonas Schwöbel" <jonasschwoebel@yahoo.de>,
"Charan Pedumuru" <charan.pedumuru@gmail.com>
Cc: oe-kbuild-all@lists.linux.dev, linux-media@vger.kernel.org,
dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org,
linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-clk@vger.kernel.org, linux-staging@lists.linux.dev
Subject: Re: [PATCH v2 23/23] staging: media: tegra-video: add CSI support for Tegra20 and Tegra30
Date: Mon, 15 Sep 2025 13:46:07 +0800 [thread overview]
Message-ID: <202509151319.M4lQXwA8-lkp@intel.com> (raw)
In-Reply-To: <20250906135345.241229-24-clamor95@gmail.com>
Hi Svyatoslav,
kernel test robot noticed the following build warnings:
[auto build test WARNING on tegra/for-next]
[also build test WARNING on robh/for-next clk/clk-next linus/master v6.17-rc6]
[cannot apply to next-20250912]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Svyatoslav-Ryhel/clk-tegra-set-CSUS-as-vi_sensors-gate-for-Tegra20-Tegra30-and-Tegra114/20250906-215750
base: https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux.git for-next
patch link: https://lore.kernel.org/r/20250906135345.241229-24-clamor95%40gmail.com
patch subject: [PATCH v2 23/23] staging: media: tegra-video: add CSI support for Tegra20 and Tegra30
config: arm-randconfig-r131-20250915 (https://download.01.org/0day-ci/archive/20250915/202509151319.M4lQXwA8-lkp@intel.com/config)
compiler: clang version 22.0.0git (https://github.com/llvm/llvm-project 21857ae337e0892a5522b6e7337899caa61de2a6)
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20250915/202509151319.M4lQXwA8-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202509151319.M4lQXwA8-lkp@intel.com/
All warnings (new ones prefixed by >>):
In file included from <built-in>:3:
In file included from include/linux/compiler_types.h:171:
include/linux/compiler-clang.h:28:9: warning: '__SANITIZE_ADDRESS__' macro redefined [-Wmacro-redefined]
28 | #define __SANITIZE_ADDRESS__
| ^
<built-in>:366:9: note: previous definition is here
366 | #define __SANITIZE_ADDRESS__ 1
| ^
>> drivers/staging/media/tegra-video/tegra20.c:909:6: warning: variable 'pp' is used uninitialized whenever 'if' condition is true [-Wsometimes-uninitialized]
909 | if (ret < 0) {
| ^~~~~~~
drivers/staging/media/tegra-video/tegra20.c:923:53: note: uninitialized use occurs here
923 | tegra20_mipi_write(mipi, TEGRA_CSI_CSI_CIL_STATUS, pp);
| ^~
drivers/staging/media/tegra-video/tegra20.c:909:2: note: remove the 'if' if its condition is always false
909 | if (ret < 0) {
| ^~~~~~~~~~~~~~
910 | dev_warn(csi->dev, "MIPI calibration status timeout!\n");
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
911 | goto exit;
| ~~~~~~~~~~
912 | }
| ~
drivers/staging/media/tegra-video/tegra20.c:900:6: warning: variable 'pp' is used uninitialized whenever 'if' condition is true [-Wsometimes-uninitialized]
900 | if (ret < 0) {
| ^~~~~~~
drivers/staging/media/tegra-video/tegra20.c:923:53: note: uninitialized use occurs here
923 | tegra20_mipi_write(mipi, TEGRA_CSI_CSI_CIL_STATUS, pp);
| ^~
drivers/staging/media/tegra-video/tegra20.c:900:2: note: remove the 'if' if its condition is always false
900 | if (ret < 0) {
| ^~~~~~~~~~~~~~
901 | dev_warn(csi->dev, "MIPI calibration timeout!\n");
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
902 | goto exit;
| ~~~~~~~~~~
903 | }
| ~
drivers/staging/media/tegra-video/tegra20.c:886:15: note: initialize the variable 'pp' to silence this warning
886 | u32 value, pp, cil;
| ^
| = 0
3 warnings generated.
vim +909 drivers/staging/media/tegra-video/tegra20.c
880
881 static int tegra20_finish_pad_calibration(struct tegra_mipi_device *mipi)
882 {
883 struct tegra_csi *csi = mipi->csi;
884 void __iomem *cil_status_reg = csi->iomem + TEGRA_CSI_CSI_CIL_STATUS;
885 unsigned int port = mipi->pads;
886 u32 value, pp, cil;
887 int ret;
888
889 /* This part is only for CSI */
890 if (port > PORT_B) {
891 pm_runtime_put(csi->dev);
892
893 return 0;
894 }
895
896 guard(mutex)(&csi->mipi_lock);
897
898 ret = readl_relaxed_poll_timeout(cil_status_reg, value,
899 value & CSI_MIPI_AUTO_CAL_DONE, 50, 250000);
900 if (ret < 0) {
901 dev_warn(csi->dev, "MIPI calibration timeout!\n");
902 goto exit;
903 }
904
905 /* clear status */
906 tegra20_mipi_write(mipi, TEGRA_CSI_CSI_CIL_STATUS, value);
907 ret = readl_relaxed_poll_timeout(cil_status_reg, value,
908 !(value & CSI_MIPI_AUTO_CAL_DONE), 50, 250000);
> 909 if (ret < 0) {
910 dev_warn(csi->dev, "MIPI calibration status timeout!\n");
911 goto exit;
912 }
913
914 pp = tegra20_mipi_read(mipi, TEGRA_CSI_CSI_PIXEL_PARSER_STATUS);
915 cil = tegra20_mipi_read(mipi, TEGRA_CSI_CSI_CIL_STATUS);
916 if (pp | cil) {
917 dev_warn(csi->dev, "Calibration status not been cleared!\n");
918 ret = -EINVAL;
919 goto exit;
920 }
921
922 exit:
923 tegra20_mipi_write(mipi, TEGRA_CSI_CSI_CIL_STATUS, pp);
924
925 /* un-select to avoid interference with DSI */
926 tegra20_mipi_write(mipi, TEGRA_CSI_CILB_MIPI_CAL_CONFIG,
927 CSI_CIL_MIPI_CAL_HSPDOS(0) |
928 CSI_CIL_MIPI_CAL_HSPUOS(0) |
929 CSI_CIL_MIPI_CAL_TERMOS(4));
930
931 tegra20_mipi_write(mipi, TEGRA_CSI_CILA_MIPI_CAL_CONFIG,
932 CSI_CIL_MIPI_CAL_NOISE_FLT(0xa) |
933 CSI_CIL_MIPI_CAL_PRESCALE(0x2) |
934 CSI_CIL_MIPI_CAL_HSPDOS(0) |
935 CSI_CIL_MIPI_CAL_HSPUOS(0) |
936 CSI_CIL_MIPI_CAL_TERMOS(4));
937
938 pm_runtime_put(csi->dev);
939
940 return ret;
941 }
942
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
next prev parent reply other threads:[~2025-09-15 5:47 UTC|newest]
Thread overview: 71+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-06 13:53 [PATCH v2 00/23] tegra-video: add CSI support for Tegra20 and Tegra30 Svyatoslav Ryhel
2025-09-06 13:53 ` [PATCH v2 01/23] clk: tegra: set CSUS as vi_sensors gate for Tegra20, Tegra30 and Tegra114 Svyatoslav Ryhel
2025-09-19 6:29 ` Mikko Perttunen
2025-09-06 13:53 ` [PATCH v2 02/23] dt-bindings: clock: tegra30: Add IDs for CSI pad clocks Svyatoslav Ryhel
2025-09-07 9:34 ` Krzysztof Kozlowski
2025-09-07 9:43 ` Svyatoslav Ryhel
2025-09-07 18:25 ` Krzysztof Kozlowski
2025-09-06 13:53 ` [PATCH v2 03/23] clk: tegra30: add CSI pad clock gates Svyatoslav Ryhel
2025-09-19 6:33 ` Mikko Perttunen
2025-09-06 13:53 ` [PATCH v2 04/23] dt-bindings: display: tegra: document Tegra30 VI and VIP Svyatoslav Ryhel
2025-09-06 19:17 ` Rob Herring (Arm)
2025-09-06 13:53 ` [PATCH v2 05/23] staging: media: tegra-video: expand VI and VIP support to Tegra30 Svyatoslav Ryhel
2025-09-17 7:52 ` Luca Ceresoli
2025-09-06 13:53 ` [PATCH v2 06/23] staging: media: tegra-video: vi: adjust get_selection op check Svyatoslav Ryhel
2025-09-06 13:53 ` [PATCH v2 07/23] staging: media: tegra-video: vi: add flip controls only if no source controls are provided Svyatoslav Ryhel
2025-09-06 13:53 ` [PATCH v2 08/23] staging: media: tegra-video: csi: move CSI helpers to header Svyatoslav Ryhel
2025-09-06 13:53 ` [PATCH v2 09/23] gpu: host1x: convert MIPI to use operations Svyatoslav Ryhel
2025-09-19 6:47 ` Mikko Perttunen
2025-09-19 7:58 ` Svyatoslav Ryhel
2025-09-19 8:56 ` Svyatoslav Ryhel
2025-09-06 13:53 ` [PATCH v2 10/23] staging: media: tegra-video: csi: add support for SoCs with integrated MIPI calibration Svyatoslav Ryhel
2025-09-06 13:53 ` [PATCH v2 11/23] staging: media: tegra-video: csi: add a check to tegra_channel_get_remote_csi_subdev Svyatoslav Ryhel
2025-09-16 16:04 ` Luca Ceresoli
2025-09-16 16:24 ` Svyatoslav Ryhel
2025-09-17 7:25 ` Luca Ceresoli
2025-09-17 7:49 ` Svyatoslav Ryhel
2025-09-06 13:53 ` [PATCH v2 12/23] dt-bindings: display: tegra: move avdd-dsi-csi-supply from VI to CSI Svyatoslav Ryhel
2025-09-09 0:49 ` Rob Herring (Arm)
2025-09-09 0:57 ` Rob Herring
2025-09-09 5:00 ` Svyatoslav Ryhel
2025-09-09 16:03 ` Rob Herring
2025-09-06 13:53 ` [PATCH v2 13/23] staging: media: tegra-video: csi: " Svyatoslav Ryhel
2025-09-17 7:52 ` Luca Ceresoli
2025-09-22 4:11 ` Mikko Perttunen
2025-09-06 13:53 ` [PATCH v2 14/23] staging: media: tegra-video: tegra20: set correct maximum width and height Svyatoslav Ryhel
2025-09-06 13:53 ` [PATCH v2 15/23] staging: media: tegra-video: tegra20: add support for second output of VI Svyatoslav Ryhel
2025-09-22 4:29 ` Mikko Perttunen
2025-09-06 13:53 ` [PATCH v2 16/23] staging: media: tegra-video: tegra20: simplify format align calculations Svyatoslav Ryhel
2025-09-22 4:44 ` Mikko Perttunen
2025-09-22 5:13 ` Svyatoslav Ryhel
2025-09-22 6:23 ` Mikko Perttunen
2025-09-22 6:30 ` Svyatoslav Ryhel
2025-09-22 7:27 ` Mikko Perttunen
2025-09-22 7:36 ` Svyatoslav Ryhel
2025-09-23 6:03 ` Mikko Perttunen
2025-09-23 6:11 ` Svyatoslav Ryhel
2025-09-23 6:50 ` Svyatoslav Ryhel
2025-09-24 4:47 ` Mikko Perttunen
2025-09-24 10:24 ` Svyatoslav Ryhel
2025-09-24 23:20 ` Mikko Perttunen
2025-09-06 13:53 ` [PATCH v2 17/23] staging: media: tegra-video: tegra20: set VI HW revision Svyatoslav Ryhel
2025-09-06 13:53 ` [PATCH v2 18/23] staging: media: tegra-video: tegra20: increase maximum VI clock frequency Svyatoslav Ryhel
2025-09-22 4:54 ` Mikko Perttunen
2025-09-22 4:58 ` Svyatoslav Ryhel
2025-09-22 6:23 ` Mikko Perttunen
2025-09-06 13:53 ` [PATCH v2 19/23] staging: media: tegra-video: tegra20: expand format support with RAW8/10 and YUV422 1X16 Svyatoslav Ryhel
2025-09-22 5:00 ` Mikko Perttunen
2025-09-06 13:53 ` [PATCH v2 20/23] staging: media: tegra-video: tegra20: adjust luma buffer stride Svyatoslav Ryhel
2025-09-06 13:53 ` [PATCH v2 21/23] dt-bindings: display: tegra: document Tegra20 and Tegra30 CSI Svyatoslav Ryhel
2025-09-09 16:26 ` Rob Herring
2025-09-09 16:39 ` Svyatoslav Ryhel
2025-09-10 2:13 ` Rob Herring
2025-09-06 13:53 ` [PATCH v2 22/23] ARM: tegra: add CSI nodes for Tegra20 and Tegra30 Svyatoslav Ryhel
2025-09-06 13:53 ` [PATCH v2 23/23] staging: media: tegra-video: add CSI support " Svyatoslav Ryhel
2025-09-15 5:46 ` kernel test robot [this message]
2025-09-22 5:15 ` Mikko Perttunen
2025-09-22 5:19 ` Svyatoslav Ryhel
2025-09-22 5:38 ` Mikko Perttunen
2025-09-22 6:16 ` Svyatoslav Ryhel
2025-09-22 6:36 ` Mikko Perttunen
2025-09-11 16:03 ` (subset) [PATCH v2 00/23] " Thierry Reding
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