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From: Lu Baolu <baolu.lu@linux.intel.com>
To: Joerg Roedel <joro@8bytes.org>
Cc: iommu@lists.linux.dev, linux-kernel@vger.kernel.org
Subject: [PATCH 5/7] iommu/vt-d: PRS isn't usable if PDS isn't supported
Date: Thu, 18 Sep 2025 13:02:02 +0800	[thread overview]
Message-ID: <20250918050204.359508-6-baolu.lu@linux.intel.com> (raw)
In-Reply-To: <20250918050204.359508-1-baolu.lu@linux.intel.com>

The specification, Section 7.10, "Software Steps to Drain Page Requests &
Responses," requires software to submit an Invalidation Wait Descriptor
(inv_wait_dsc) with the Page-request Drain (PD=1) flag set, along with
the Invalidation Wait Completion Status Write flag (SW=1). It then waits
for the Invalidation Wait Descriptor's completion.

However, the PD field in the Invalidation Wait Descriptor is optional, as
stated in Section 6.5.2.9, "Invalidation Wait Descriptor":

"Page-request Drain (PD): Remapping hardware implementations reporting
 Page-request draining as not supported (PDS = 0 in ECAP_REG) treat this
 field as reserved."

This implies that if the IOMMU doesn't support the PDS capability, software
can't drain page requests and group responses as expected.

Do not enable PCI/PRI if the IOMMU doesn't support PDS.

Reported-by: Joel Granados <joel.granados@kernel.org>
Closes: https://lore.kernel.org/r/20250909-jag-pds-v1-1-ad8cba0e494e@kernel.org
Fixes: 66ac4db36f4c ("iommu/vt-d: Add page request draining support")
Cc: stable@vger.kernel.org
Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
Link: https://lore.kernel.org/r/20250915062946.120196-1-baolu.lu@linux.intel.com
---
 drivers/iommu/intel/iommu.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c
index 9c3ab9d9f69a..92759a8f8330 100644
--- a/drivers/iommu/intel/iommu.c
+++ b/drivers/iommu/intel/iommu.c
@@ -3812,7 +3812,7 @@ static struct iommu_device *intel_iommu_probe_device(struct device *dev)
 			}
 
 			if (info->ats_supported && ecap_prs(iommu->ecap) &&
-			    pci_pri_supported(pdev))
+			    ecap_pds(iommu->ecap) && pci_pri_supported(pdev))
 				info->pri_supported = 1;
 		}
 	}
-- 
2.43.0


  parent reply	other threads:[~2025-09-18  5:04 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-09-18  5:01 [PATCH 0/7] [PULL REQUEST] Intel IOMMU updates for v6.18 Lu Baolu
2025-09-18  5:01 ` [PATCH 1/7] iommu/vt-d: Replace snprintf with scnprintf in dmar_latency_snapshot() Lu Baolu
2025-09-18  5:01 ` [PATCH 2/7] iommu/vt-d: debugfs: Fix legacy mode page table dump logic Lu Baolu
2025-09-18  5:02 ` [PATCH 3/7] iommu/vt-d: Drop unused cap_super_offset() Lu Baolu
2025-09-18  5:02 ` [PATCH 4/7] iommu/vt-d: Remove LPIG from page group response descriptor Lu Baolu
2025-09-18  5:02 ` Lu Baolu [this message]
2025-09-18  5:02 ` [PATCH 6/7] iommu/vt-d: Removal of Advanced Fault Logging Lu Baolu
2025-09-18  5:02 ` [PATCH 7/7] iommu/vt-d: debugfs: Avoid dumping context command register Lu Baolu
2025-09-19  7:43 ` [PATCH 0/7] [PULL REQUEST] Intel IOMMU updates for v6.18 Joerg Roedel

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