From: "Chang S. Bae" <chang.seok.bae@intel.com>
To: linux-kernel@vger.kernel.org
Cc: x86@kernel.org, tglx@linutronix.de, mingo@redhat.com,
bp@alien8.de, dave.hansen@linux.intel.com, chao.gao@intel.com,
abusse@amazon.de, tony.luck@intel.com, chang.seok.bae@intel.com
Subject: [PATCH v6 0/7] x86: Support for Intel Microcode Staging Feature
Date: Sun, 21 Sep 2025 15:48:34 -0700 [thread overview]
Message-ID: <20250921224841.3545-1-chang.seok.bae@intel.com> (raw)
Hi all,
This posting incorporates the following updates:
* Addressed Boris' feedbacks:
* Trimmed down changelogs to key points
* Clarified error messages
* Folded a one-liner helper
- Fixed typos
- Corrected header include ordering
* Collected Tony's review tag
Boris also commented on the heuristic, worth highlighting:
>> + * To tolerate this behavior, allow up to twice the expected
>> + * number of transactions (i.e., a 10-chunk image can take up to
>> + * 20 attempts).
>
> Looks quirky but ok, let's try it in practice first
...
> If this is part of normal operation, your send-max-2x-the-size heuristic might
> fail quickly here. I'd track the number of chunks it wants you to send and
> then set a per-chunk limit and when it reaches that limit, then cancel the
> transaction. Dunno, let's try the simple scheme first...
As the series continues to take shape, I hope this iteration can build
momentum towards the integration.
The branch is available here:
git://github.com/intel-staging/microcode.git staging_v6
Previous posting:
https://lore.kernel.org/lkml/20250823155214.17465-1-chang.seok.bae@intel.com/
Thanks,
Chang
Chang S. Bae (7):
x86/cpu/topology: Make primary thread mask available with SMP=n
x86/microcode: Introduce staging step to reduce late-loading time
x86/microcode/intel: Establish staging control logic
x86/microcode/intel: Define staging state struct
x86/microcode/intel: Implement staging handler
x86/microcode/intel: Support mailbox transfer
x86/microcode/intel: Enable staging when available
arch/x86/include/asm/msr-index.h | 9 +
arch/x86/include/asm/topology.h | 12 +-
arch/x86/kernel/cpu/microcode/core.c | 11 +
arch/x86/kernel/cpu/microcode/intel.c | 359 +++++++++++++++++++++++
arch/x86/kernel/cpu/microcode/internal.h | 4 +-
arch/x86/kernel/cpu/topology.c | 4 -
arch/x86/kernel/cpu/topology_common.c | 3 +
arch/x86/kernel/smpboot.c | 3 -
8 files changed, 391 insertions(+), 14 deletions(-)
base-commit: 835794d1ae4cb94b77f631f810018c286561181a
--
2.48.1
next reply other threads:[~2025-09-21 22:48 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-21 22:48 Chang S. Bae [this message]
2025-09-21 22:48 ` [PATCH v6 1/7] x86/cpu/topology: Make primary thread mask available with SMP=n Chang S. Bae
2025-10-15 16:52 ` [tip: x86/microcode] " tip-bot2 for Chang S. Bae
2025-09-21 22:48 ` [PATCH v6 2/7] x86/microcode: Introduce staging step to reduce late-loading time Chang S. Bae
2025-10-15 16:52 ` [tip: x86/microcode] " tip-bot2 for Chang S. Bae
2025-09-21 22:48 ` [PATCH v6 3/7] x86/microcode/intel: Establish staging control logic Chang S. Bae
2025-10-13 13:42 ` Borislav Petkov
2025-10-13 21:16 ` Chang S. Bae
2025-10-15 16:52 ` [tip: x86/microcode] " tip-bot2 for Chang S. Bae
2025-09-21 22:48 ` [PATCH v6 4/7] x86/microcode/intel: Define staging state struct Chang S. Bae
2025-10-15 16:52 ` [tip: x86/microcode] " tip-bot2 for Chang S. Bae
2025-09-21 22:48 ` [PATCH v6 5/7] x86/microcode/intel: Implement staging handler Chang S. Bae
2025-10-15 16:52 ` [tip: x86/microcode] " tip-bot2 for Chang S. Bae
2025-09-21 22:48 ` [PATCH v6 6/7] x86/microcode/intel: Support mailbox transfer Chang S. Bae
2025-10-15 16:52 ` [tip: x86/microcode] " tip-bot2 for Chang S. Bae
2025-09-21 22:48 ` [PATCH v6 7/7] x86/microcode/intel: Enable staging when available Chang S. Bae
2025-10-15 16:52 ` [tip: x86/microcode] " tip-bot2 for Chang S. Bae
2025-09-22 13:09 ` [PATCH v6 0/7] x86: Support for Intel Microcode Staging Feature Borislav Petkov
2025-09-22 19:53 ` Chang S. Bae
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20250921224841.3545-1-chang.seok.bae@intel.com \
--to=chang.seok.bae@intel.com \
--cc=abusse@amazon.de \
--cc=bp@alien8.de \
--cc=chao.gao@intel.com \
--cc=dave.hansen@linux.intel.com \
--cc=linux-kernel@vger.kernel.org \
--cc=mingo@redhat.com \
--cc=tglx@linutronix.de \
--cc=tony.luck@intel.com \
--cc=x86@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox