[PATCH 3/3] objtool/x86: Fix NOP decode

Peter Zijlstra
2025-09-24T13:47:34Z

For x86_64 the kernel consistently uses 2 instructions for all NOPs:

90 - NOP
0f 1f /0 - NOPL

Notably:

- REP NOP is PAUSE, not a NOP instruction.

- 0f {0c...0f} is reserved space,
except for 0f 0d /1, which is PREFETCHW, not a NOP.

- 0f {19,1c...1f} is reserved space,
except for 0f 1f /0, which is NOPL.

Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
---
tools/objtool/arch/x86/decode.c | 12 +++++++-----
1 file changed, 7 insertions(+), 5 deletions(-)

--- a/tools/objtool/arch/x86/decode.c
+++ b/tools/objtool/arch/x86/decode.c
@@ -494,7 +494,8 @@ int arch_decode_instruction(struct objto
break;

case 0x90:
- insn->type = INSN_NOP;
+ if (prefix != 0xf3) /* REP NOP := PAUSE */
+ insn->type = INSN_NOP;
break;

case 0x9c:
@@ -547,13 +548,14 @@ int arch_decode_instruction(struct objto

} else if (op2 == 0x0b || op2 == 0xb9) {

- /* ud2 */
+ /* ud2, ud1 */
insn->type = INSN_BUG;

- } else if (op2 == 0x0d || op2 == 0x1f) {
+ } else if (op2 == 0x1f) {

- /* nopl/nopw */
- insn->type = INSN_NOP;
+ /* 0f 1f /0 := NOPL */
+ if (modrm_reg == 0)
+ insn->type = INSN_NOP;

} else if (op2 == 0x1e) {