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From: Sudarshan Shetty <tessolveupstream@gmail.com>
To: andrzej.hajda@intel.com, neil.armstrong@linaro.org
Cc: rfoss@kernel.org, Laurent.pinchart@ideasonboard.com,
	tessolveupstream@gmail.com, jonas@kwiboo.se,
	jernej.skrabec@gmail.com, maarten.lankhorst@linux.intel.com,
	mripard@kernel.org, tzimmermann@suse.de, airlied@gmail.com,
	simona@ffwll.ch, dri-devel@lists.freedesktop.org,
	linux-kernel@vger.kernel.org
Subject: [PATCH] drm: bridge: ti-sn65dsi83: Fix LVDS output configuration
Date: Fri,  3 Oct 2025 14:49:10 +0530	[thread overview]
Message-ID: <20251003091911.3269073-1-tessolveupstream@gmail.com> (raw)

Hi all,

This patch series fixes dual-link LVDS support in the SN65DSI83
DSI-to-LVDS bridge driver.

Currently the driver programs the same horizontal timing values for
both single-link and dual-link modes. According to TI, when operating
in dual-link mode the horizontal timing parameters must be divided by
two before being written to the device. Without this adjustment, panels
do not light up or show corrupted output.

TI has provided recommended register settings for dual-link operation.
I have hardcoded those into the driver as I am not driver expert,
With these changes applied, dual-link LVDS panels work reliably
on our hardware.

Summary:
- Adjust horizontal timing parameters by 2 in dual-link mode
- Apply TI dual-link register settings

Thanks,
Sudarshan

             reply	other threads:[~2025-10-03  9:19 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-10-03  9:19 Sudarshan Shetty [this message]
2025-10-03  9:19 ` [PATCH] drm: bridge: ti-sn65dsi83: Fix LVDS output configuration Sudarshan Shetty
2025-10-14  6:08   ` Sudarshan Shetty

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