From: Rob Herring <robh@kernel.org>
To: Ram Prakash Gupta <quic_rampraka@quicinc.com>
Cc: Ulf Hansson <ulf.hansson@linaro.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Adrian Hunter <adrian.hunter@intel.com>,
Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>,
linux-mmc@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org,
dmitry.baryshkov@oss.qualcomm.com, quic_pragalla@quicinc.com,
quic_sayalil@quicinc.com, quic_nitirawa@quicinc.com,
quic_bhaskarv@quicinc.com, kernel@oss.qualcomm.com,
Sachin Gupta <quic_sachgupt@quicinc.com>
Subject: Re: [PATCH v4 3/4] mmc: sdhci-msm: Add Device tree parsing logic for DLL settings
Date: Mon, 6 Oct 2025 16:44:32 -0500 [thread overview]
Message-ID: <20251006214432.GA625548-robh@kernel.org> (raw)
In-Reply-To: <20250929113515.26752-4-quic_rampraka@quicinc.com>
On Mon, Sep 29, 2025 at 05:05:14PM +0530, Ram Prakash Gupta wrote:
> From: Sachin Gupta <quic_sachgupt@quicinc.com>
>
> This update introduces the capability to configure HS200
> and HS400 DLL settings via the device tree and parsing it.
>
> Signed-off-by: Sachin Gupta <quic_sachgupt@quicinc.com>
> Signed-off-by: Ram Prakash Gupta <quic_rampraka@quicinc.com>
> ---
> drivers/mmc/host/sdhci-msm.c | 91 ++++++++++++++++++++++++++++++++++++
> 1 file changed, 91 insertions(+)
>
> diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c
> index 36700735aa3e..d07f0105b733 100644
> --- a/drivers/mmc/host/sdhci-msm.c
> +++ b/drivers/mmc/host/sdhci-msm.c
> @@ -265,6 +265,19 @@ struct sdhci_msm_variant_info {
> const struct sdhci_msm_offset *offset;
> };
>
> +/*
> + * DLL registers which needs be programmed with HSR settings.
> + * Add any new register only at the end and don't change the
> + * sequence.
> + */
> +struct sdhci_msm_dll {
> + u32 dll_config[2];
> + u32 dll_config_2[2];
> + u32 dll_config_3[2];
> + u32 dll_usr_ctl[2];
> + u32 ddr_config[2];
> +};
> +
> struct sdhci_msm_host {
> struct platform_device *pdev;
> void __iomem *core_mem; /* MSM SDCC mapped address */
> @@ -273,6 +286,7 @@ struct sdhci_msm_host {
> struct clk *xo_clk; /* TCXO clk needed for FLL feature of cm_dll*/
> /* core, iface, cal and sleep clocks */
> struct clk_bulk_data bulk_clks[4];
> + struct sdhci_msm_dll dll;
> #ifdef CONFIG_MMC_CRYPTO
> struct qcom_ice *ice;
> #endif
> @@ -301,6 +315,7 @@ struct sdhci_msm_host {
> u32 dll_config;
> u32 ddr_config;
> bool vqmmc_enabled;
> + bool artanis_dll;
> };
>
> static const struct sdhci_msm_offset *sdhci_priv_msm_offset(struct sdhci_host *host)
> @@ -2516,6 +2531,73 @@ static int sdhci_msm_gcc_reset(struct device *dev, struct sdhci_host *host)
> return ret;
> }
>
> +static int sdhci_msm_dt_get_array(struct device *dev, const char *prop_name,
> + u32 **dll_table, int *len)
> +{
> + struct device_node *np = dev->of_node;
> + u32 *arr = NULL;
> + int ret = 0, sz = 0;
> +
> + if (!np)
> + return -ENODEV;
> + if (!of_get_property(np, prop_name, &sz))
Don't add new users of of_get_property which adds untracked pointers to
raw DT data.
> + return -EINVAL;
> +
> + sz = sz / sizeof(*arr);
> + if (sz <= 0)
> + return -EINVAL;
> +
> + arr = kcalloc(sz, sizeof(*arr), GFP_KERNEL);
Why do you need to count the length first when only 5 entries is valid?
> + if (!arr)
> + return -ENOMEM;
> +
> + ret = of_property_read_u32_array(np, prop_name, arr, sz);
> + if (ret) {
> + dev_err(dev, "%s failed reading array %d\n", prop_name, ret);
> + *len = 0;
> + return ret;
> + }
> +
> + *dll_table = arr;
> + *len = sz;
> +
> + return ret;
> +}
> +
> +static int sdhci_msm_dt_parse_dll_info(struct device *dev, struct sdhci_msm_host *msm_host)
> +{
> + int dll_table_len, dll_reg_count;
> + u32 *dll_table = NULL;
> + int i, j;
> +
> + msm_host->artanis_dll = false;
> +
> + if (sdhci_msm_dt_get_array(dev, "qcom,dll-hsr-list",
> + &dll_table, &dll_table_len))
> + return -EINVAL;
> +
> + dll_reg_count = sizeof(struct sdhci_msm_dll) / sizeof(u32);
> +
> + if (dll_table_len != dll_reg_count) {
> + dev_err(dev, "Number of HSR entries are not matching\n");
> + return -EINVAL;
You just leaked memory. devm_* functions are your friend.
> + }
> +
> + for (i = 0, j = 0; j < 2; i = i + 5, j++) {
> + msm_host->dll.dll_config[j] = dll_table[i];
> + msm_host->dll.dll_config_2[j] = dll_table[i + 1];
> + msm_host->dll.dll_config_3[j] = dll_table[i + 2];
> + msm_host->dll.dll_usr_ctl[j] = dll_table[i + 3];
> + msm_host->dll.ddr_config[j] = dll_table[i + 4];
> + }
> +
> + msm_host->artanis_dll = true;
> +
> + kfree(dll_table);
> +
> + return 0;
> +}
next prev parent reply other threads:[~2025-10-06 21:44 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-29 11:35 [PATCH v4 0/4] mmc: sdhci-msm: Rectify DLL programming sequence for SDCC Ram Prakash Gupta
2025-09-29 11:35 ` [PATCH v4 1/4] dt-bindings: mmc: Add dll-hsr-list for HS400 and HS200 modes Ram Prakash Gupta
2025-10-06 21:48 ` Rob Herring
2025-10-07 11:16 ` Ram Prakash Gupta
2025-10-07 11:42 ` Konrad Dybcio
2025-10-13 13:04 ` Ram Prakash Gupta
2025-09-29 11:35 ` [PATCH v4 2/4] mmc: sdhci-msm: Add core_major, minor to msm_host structure Ram Prakash Gupta
2025-09-29 11:35 ` [PATCH v4 3/4] mmc: sdhci-msm: Add Device tree parsing logic for DLL settings Ram Prakash Gupta
2025-09-29 16:12 ` Adrian Hunter
2025-10-07 11:04 ` Ram Prakash Gupta
2025-10-07 11:29 ` Adrian Hunter
2025-10-06 21:44 ` Rob Herring [this message]
2025-10-07 11:08 ` Ram Prakash Gupta
2025-09-29 11:35 ` [PATCH v4 4/4] mmc: sdhci-msm: Rectify DLL programming sequence for SDCC Ram Prakash Gupta
2025-10-02 15:13 ` kernel test robot
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