Re: [PATCH v11 0/7] Add support for DU/DSI clocks and DSI driver support for the Renesas RZ/V2H(P) SoC

Lad, Prabhakar
2025-10-21T18:27:18Z

Hi Geert,

On Tue, Oct 21, 2025 at 11:26 AM Geert Uytterhoeven
<geert@linux-m68k.org> wrote:
>
> Hi Prabhakar et al,
>
> On Wed, 15 Oct 2025 at 21:26, Prabhakar <prabhakar.csengg@gmail.com> wrote:
> > This patch series adds DU/DSI clocks and provides support for the
> > MIPI DSI interface on the RZ/V2H(P) SoC.
> >
> > v10->v11:
> > - Split CPG_PLL_CLK1_K/M/PDIV macro change into separate patch
> > - Updated rzv2h_cpg_plldsi_div_determine_rate()
> > while iterating over the divider table
> > - Added Acked-by tag from Tomi for patch 2/7 and 3/7
> > - Added Reviewed-by tag from Geert for patch 2/7 and 3/7
>
> I think this series is ready for merging.
>
\o/

> > Lad Prabhakar (7):
> > clk: renesas: rzv2h-cpg: Add instance field to struct pll
> > clk: renesas: rzv2h-cpg: Use GENMASK for PLL fields
> > clk: renesas: rzv2h-cpg: Add support for DSI clocks
> > clk: renesas: r9a09g057: Add clock and reset entries for DSI and LCDC
> > dt-bindings: display: bridge: renesas,dsi: Document RZ/V2H(P) and
> > RZ/V2N
> > drm: renesas: rz-du: mipi_dsi: Add LPCLK clock support
> > drm: renesas: rz-du: mipi_dsi: Add support for RZ/V2H(P) SoC
>
> As this touches both clk and drm, let's discuss the merge strategy.
> My proposal:
> 1. I queue patches 1-3 in an immutable branch with a signed tag,
> to be used as a base for the remaining patches,
> 2. I queue patch 4 on top of 1 in renesas-clk for v6.19,
> 3. The DRM people queue patches 5-7 on top of 1.
>
> Does that sound fine for you?
Sounds good to me.

Biju/Tomi, are you OK with the above?

Cheers,
Prabhakar