From: Yazen Ghannam <yazen.ghannam@amd.com>
To: Michal Pecio <michal.pecio@gmail.com>
Cc: Shyam-sundar.S-k@amd.com, bhelgaas@google.com,
hdegoede@redhat.com, ilpo.jarvinen@linux.intel.com,
jdelvare@suse.com, linux-edac@vger.kernel.org,
linux-hwmon@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-pci@vger.kernel.org, linux@roeck-us.net,
mario.limonciello@amd.com, naveenkrishna.chatradhi@amd.com,
platform-driver-x86@vger.kernel.org, suma.hegde@amd.com,
tony.luck@intel.com, x86@kernel.org
Subject: Re: [PATCH v3 06/12] x86/amd_nb: Use topology info to get AMD node count
Date: Wed, 22 Oct 2025 12:09:04 -0400 [thread overview]
Message-ID: <20251022160904.GA174761@yaz-khff2.amd.com> (raw)
In-Reply-To: <20251022173831.671843f4.michal.pecio@gmail.com>
On Wed, Oct 22, 2025 at 05:38:31PM +0200, Michal Pecio wrote:
> On Wed, 22 Oct 2025 09:39:01 -0400, Yazen Ghannam wrote:
> > Can you please share the full output from dmesg and lspci?
> >
> > Also, can you please share the raw CPUID output (cpuid -r)?
>
> Not sure which "cpuid" software you mean?
Many distros package a "cpuid" user space app that will print and decode
the x86 CPUID feature bits.
>
> As for lspci, obviously a single northbridge, no surprises.
>
> 00:00.0 Host bridge: Advanced Micro Devices, Inc. [AMD] RS880 Host Bridge
> 00:02.0 PCI bridge: Advanced Micro Devices, Inc. [AMD] RS780 PCI to PCI bridge (ext gfx port 0)
> 00:05.0 PCI bridge: Advanced Micro Devices, Inc. [AMD] RS780/RS880 PCI to PCI bridge (PCIE port 1)
> 00:07.0 PCI bridge: Advanced Micro Devices, Inc. [AMD] RS780/RS880 PCI to PCI bridge (PCIE port 3)
> 00:09.0 PCI bridge: Advanced Micro Devices, Inc. [AMD] RS780/RS880 PCI to PCI bridge (PCIE port 4)
> 00:11.0 SATA controller: Advanced Micro Devices, Inc. [AMD/ATI] SB7x0/SB8x0/SB9x0 SATA Controller [AHCI mode] (rev 40)
> 00:12.0 USB controller: Advanced Micro Devices, Inc. [AMD/ATI] SB7x0/SB8x0/SB9x0 USB OHCI0 Controller
> 00:12.2 USB controller: Advanced Micro Devices, Inc. [AMD/ATI] SB7x0/SB8x0/SB9x0 USB EHCI Controller
> 00:13.0 USB controller: Advanced Micro Devices, Inc. [AMD/ATI] SB7x0/SB8x0/SB9x0 USB OHCI0 Controller
> 00:13.2 USB controller: Advanced Micro Devices, Inc. [AMD/ATI] SB7x0/SB8x0/SB9x0 USB EHCI Controller
> 00:14.0 SMBus: Advanced Micro Devices, Inc. [AMD/ATI] SBx00 SMBus Controller (rev 41)
> 00:14.2 Audio device: Advanced Micro Devices, Inc. [AMD/ATI] SBx00 Azalia (Intel HDA) (rev 40)
> 00:14.3 ISA bridge: Advanced Micro Devices, Inc. [AMD/ATI] SB7x0/SB8x0/SB9x0 LPC host controller (rev 40)
> 00:14.4 PCI bridge: Advanced Micro Devices, Inc. [AMD/ATI] SBx00 PCI to PCI Bridge (rev 40)
> 00:14.5 USB controller: Advanced Micro Devices, Inc. [AMD/ATI] SB7x0/SB8x0/SB9x0 USB OHCI2 Controller
> 00:16.0 USB controller: Advanced Micro Devices, Inc. [AMD/ATI] SB7x0/SB8x0/SB9x0 USB OHCI0 Controller
> 00:16.2 USB controller: Advanced Micro Devices, Inc. [AMD/ATI] SB7x0/SB8x0/SB9x0 USB EHCI Controller
> 00:18.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Family 10h Processor HyperTransport Configuration
> 00:18.1 Host bridge: Advanced Micro Devices, Inc. [AMD] Family 10h Processor Address Map
> 00:18.2 Host bridge: Advanced Micro Devices, Inc. [AMD] Family 10h Processor DRAM Controller
> 00:18.3 Host bridge: Advanced Micro Devices, Inc. [AMD] Family 10h Processor Miscellaneous Control
> 00:18.4 Host bridge: Advanced Micro Devices, Inc. [AMD] Family 10h Processor Link Control
> 01:00.0 VGA compatible controller: Advanced Micro Devices, Inc. [AMD/ATI] Cedar [Radeon HD 5000/6000/7350/8350 Series]
> 01:00.1 Audio device: Advanced Micro Devices, Inc. [AMD/ATI] Cedar HDMI Audio [Radeon HD 5400/6300/7300 Series]
> 02:00.0 USB controller: Renesas Technology Corp. uPD720201 USB 3.0 Host Controller (rev 03)
> 03:00.0 FireWire (IEEE 1394): VIA Technologies, Inc. VT6315 Series Firewire Controller
> 04:00.0 IDE interface: VIA Technologies, Inc. VT6415 PATA IDE Host Controller
> 05:05.0 Ethernet controller: Realtek Semiconductor Co., Ltd. RTL-8100/8101L/8139 PCI Fast Ethernet Adapter (rev 10)
Yep, looks good.
>
> And dmesg from a working 6.12 kernel. I cut it at "run init".
>
> [ 0.000000] Linux version 6.12.31 (test@localhost) (gcc (GCC) 11.1.0, GNU ld (GNU Binutils) 2.36.1) #3 SMP PREEMPT Mon Jun 2 00:01:52 CEST 2025
[...]
> [ 0.072051] CPU topo: Max. logical packages: 2
> [ 0.072052] CPU topo: Max. logical dies: 2
> [ 0.072052] CPU topo: Max. dies per package: 1
> [ 0.072057] CPU topo: Max. threads per core: 1
> [ 0.072058] CPU topo: Num. cores per package: 4
> [ 0.072059] CPU topo: Num. threads per package: 4
> [ 0.072059] CPU topo: Allowing 4 present CPUs plus 2 hotplug CPUs
As you mentioned, the kernel topology init thinks there are 2 logical
packages. There's probably a corner-case or quirk that needs to be
addressed for these older systems.
We should figure this out, and the CPUID data will help with that.
If there's no clear fix, then we can go back to counting AMD nodes by
searching PCI space.
Thanks,
Yazen
next prev parent reply other threads:[~2025-10-22 16:09 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-01-07 22:28 [PATCH v3 00/12] AMD NB and SMN rework Yazen Ghannam
2025-01-07 22:28 ` [PATCH v3 01/12] x86/amd_nb: Restrict init function to AMD-based systems Yazen Ghannam
2025-01-07 22:28 ` [PATCH v3 02/12] x86/amd_nb: Clean up early_is_amd_nb() Yazen Ghannam
2025-01-07 22:28 ` [PATCH v3 03/12] x86: Start moving AMD node functionality out of AMD_NB Yazen Ghannam
2025-01-07 22:28 ` [PATCH v3 04/12] x86/amd_nb: Simplify function 4 search Yazen Ghannam
2025-01-07 22:28 ` [PATCH v3 05/12] x86/amd_nb: Simplify root device search Yazen Ghannam
2025-01-07 22:28 ` [PATCH v3 06/12] x86/amd_nb: Use topology info to get AMD node count Yazen Ghannam
2025-01-09 9:15 ` [tip: x86/misc] " tip-bot2 for Yazen Ghannam
2025-10-21 23:16 ` [PATCH v3 06/12] " Michal Pecio
2025-10-22 13:39 ` Yazen Ghannam
2025-10-22 15:38 ` Michal Pecio
2025-10-22 16:04 ` Guenter Roeck
2025-10-22 16:09 ` Yazen Ghannam [this message]
2025-10-22 16:18 ` Michal Pecio
2025-10-23 13:59 ` Yazen Ghannam
2025-10-23 15:01 ` Michal Pecio
2025-10-23 16:09 ` Yazen Ghannam
2025-10-23 16:22 ` Mario Limonciello
2025-10-23 17:06 ` Michal Pecio
2025-10-23 17:12 ` Mario Limonciello
2025-10-23 18:25 ` Yazen Ghannam
2025-10-23 21:43 ` Mario Limonciello
2025-10-23 16:31 ` Michal Pecio
2025-10-23 18:15 ` Yazen Ghannam
2025-10-23 18:25 ` Michal Pecio
2025-10-23 19:04 ` Yazen Ghannam
2025-10-23 19:09 ` Yazen Ghannam
2025-10-24 8:48 ` Michal Pecio
2025-10-24 13:42 ` Yazen Ghannam
2025-01-07 22:28 ` [PATCH v3 07/12] x86/amd_nb: Simplify function 3 search Yazen Ghannam
2025-01-09 9:15 ` [tip: x86/misc] " tip-bot2 for Yazen Ghannam
2025-01-07 22:28 ` [PATCH v3 08/12] x86/amd_nb, hwmon: (k10temp): Simplify amd_pci_dev_to_node_id() Yazen Ghannam
2025-01-07 22:28 ` [PATCH v3 09/12] x86/amd_nb: Move SMN access code to a new amd_node driver Yazen Ghannam
2025-01-08 5:30 ` Shyam Sundar S K
2025-01-08 8:56 ` Borislav Petkov
2025-01-07 22:28 ` [PATCH v3 10/12] x86/amd_node: Update __amd_smn_rw() error paths Yazen Ghannam
2025-01-07 22:28 ` [PATCH v3 11/12] x86/amd_node: Remove dependency on AMD_NB Yazen Ghannam
2025-01-07 22:28 ` [PATCH v3 12/12] x86/amd_node: Use defines for SMN register offsets Yazen Ghannam
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