Re: [PATCH v5 5/9] clk: microchip: mpfs: use regmap for clocks

[Conor Dooley <conor@kernel.org>]

[-- Attachment #1: Type: text/plain, Size: 1836 bytes --]

On Thu, Oct 23, 2025 at 07:06:01AM +0300, Claudiu Beznea wrote:
> On 10/13/25 20:45, Conor Dooley wrote:
> > From: Conor Dooley <conor.dooley@microchip.com>
> > +static int mpfs_cfg_clk_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long prate)
> > +{
> > +	struct mpfs_cfg_hw_clock *cfg_hw = to_mpfs_cfg_clk(hw);
> > +	struct mpfs_cfg_clock *cfg = &cfg_hw->cfg;
> > +	unsigned long flags;
> > +	u32 val;
> > +	int divider_setting;
> 
> This could be moved near flags to keep the reverse christmas tree order as
> in the rest of this patch.

The driver doesn't (intentionally) use reverse christmas tree. If it
does, that's just a byproduct of putting bigger types before smaller
ones.

> > +	divider_setting = divider_get_val(rate, prate, cfg->table, cfg->width, 0);
> > +
> > +	if (divider_setting < 0)
> > +		return divider_setting;
> > +
> > +	spin_lock_irqsave(&mpfs_clk_lock, flags);
> 
> As spin locking is introduced in this file by this patch, you can go
> directly w/ cleanup helpers for locking.
> 
> > +
> > +	regmap_read(cfg->map, cfg->map_offset, &val);
> > +	val &= ~(clk_div_mask(cfg->width) << cfg_hw->cfg.shift);
> 
> Why cfg_hw->cfg.shift here --------------------^ but cfg->shift on the next
> line?
> 
> > +	val |= divider_setting << cfg->shift;
> > +	regmap_write(cfg->map, cfg->map_offset, val);
> 
> Can't the regmap_read() + updated + regmap_write() be replaced by
> regmap_update_bits() ?

Yeah, I suppose it could. Ultimately what's here is a revert of with
readl()/writel() replaced by regmap operations directly, so the answer
to the above three items is that that's how they were done before the
patch I am reverting. That's probably the answer to 90% of the things
you've said here, this is how they were done prior to the commit I am
reverting.


[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]