Re: [PATCH V2 2/2] arm64/mm: Add remaining TLBI_XXX_MASK macros

[Jonathan Cameron <jonathan.cameron@huawei.com>]

On Fri, 24 Oct 2025 05:02:07 +0100
Anshuman Khandual <anshuman.khandual@arm.com> wrote:

> Add remaining TLBI_XXX_MASK macros and replace current open encoded fields.
> While here replace hard coded page size based shifts but with derived ones
> via ilog2() thus adding some required context.
> 
> TLBI_TTL_MASK has been split into separate TLBI_TTL_MASK and TLBI_TG_MASK
> as appropriate because currently it simultaneously contains both page size
> and translation table level information. KVM on arm64 has been updated to
> accommodate these changes to TLBI_TTL_MASK.
> 
> Cc: Catalin Marinas <catalin.marinas@arm.com>
> Cc: Will Deacon <will@kernel.org>
> Cc: Marc Zyngier <maz@kernel.org>
> Cc: Oliver Upton <oliver.upton@linux.dev>
> Cc: linux-arm-kernel@lists.infradead.org
> Cc: linux-kernel@vger.kernel.org
> Cc: kvmarm@lists.linux.dev
> Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
> ---
>  arch/arm64/include/asm/tlbflush.h | 26 ++++++++++++++++++--------
>  arch/arm64/kvm/nested.c           |  8 +++++---
>  2 files changed, 23 insertions(+), 11 deletions(-)
> 
> diff --git a/arch/arm64/include/asm/tlbflush.h b/arch/arm64/include/asm/tlbflush.h
> index 131096094f5b..cf75fc2a06c3 100644
> --- a/arch/arm64/include/asm/tlbflush.h
> +++ b/arch/arm64/include/asm/tlbflush.h
> @@ -57,9 +57,10 @@
>  /* This macro creates a properly formatted VA operand for the TLBI */
>  #define __TLBI_VADDR(addr, asid)				\
>  	({							\
> -		unsigned long __ta = (addr) >> 12;		\
> -		__ta &= GENMASK_ULL(43, 0);			\
> -		__ta |= (unsigned long)(asid) << 48;		\
> +		unsigned long __ta = (addr) >> ilog2(SZ_4K);	\
> +		__ta &= TLBI_BADDR_MASK;			\
> +		__ta &= ~TLBI_ASID_MASK;			\
> +		__ta |= FIELD_PREP(TLBI_ASID_MASK, asid);	\
I think you can replace the two lines above with
		FIELD_MODIFY(TLBI_ASID_MASK, &__ta, asid);

It's a small reduction in code but I don't mind much either way.

>  		__ta;						\
>  	})
>  
> @@ -100,8 +101,17 @@ static inline unsigned long get_trans_granule(void)
>   *
>   * For Stage-2 invalidation, use the level values provided to that effect
>   * in asm/stage2_pgtable.h.
> + *
> + * +----------+------+-------+--------------------------------------+
> + * |   ASID   |  TG  |  TTL  |                 BADDR                |
> + * +-----------------+-------+--------------------------------------+
> + * |63      48|47  46|45   44|43                                   0|
> + * +----------+------+-------+--------------------------------------+
>   */
> -#define TLBI_TTL_MASK		GENMASK_ULL(47, 44)
> +#define TLBI_ASID_MASK		GENMASK_ULL(63, 48)
> +#define TLBI_TG_MASK		GENMASK_ULL(47, 46)
> +#define TLBI_TTL_MASK		GENMASK_ULL(45, 44)
> +#define TLBI_BADDR_MASK		GENMASK_ULL(43, 0)
>  
>  #define TLBI_TTL_UNKNOWN	INT_MAX
>  
> @@ -110,10 +120,10 @@ static inline unsigned long get_trans_granule(void)
>  									\
>  	if (alternative_has_cap_unlikely(ARM64_HAS_ARMv8_4_TTL) &&	\
>  	    level >= 0 && level <= 3) {					\
> -		u64 ttl = level;					\
> -		ttl |= get_trans_granule() << 2;			\
> +		arg &= ~TLBI_TG_MASK;					\
> +		arg |= FIELD_PREP(TLBI_TG_MASK, get_trans_granule());	\
>  		arg &= ~TLBI_TTL_MASK;					\
> -		arg |= FIELD_PREP(TLBI_TTL_MASK, ttl);			\
> +		arg |= FIELD_PREP(TLBI_TTL_MASK, level);		\

Similar potential to use FIELD_MODIFY for these.

Jonathan