From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 015CE1E5018; Mon, 27 Oct 2025 00:42:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=213.167.242.64 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761525777; cv=none; b=KIIy6lGeB53j1i1GQuYqjZNrW65bM1iTzmjrkMDRmLmRjAvDDOjIuHCnzWXoTSyhniOeloj4YseZsGbNrj+FgaDFi2NY9GLBMlSxOjZ8fceWi7PQ7XAQgcTsgt/HYC5bvtPxBEBvCW/8eL0ueZ0xsE6LsFfLumnv6Nf2D3kC3mQ= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761525777; c=relaxed/simple; bh=ql+9l2OIUe012ZMtNpJEMb1HFYAsPP+D4QtZAHzeetA=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=ZQxpTp0YQ809PfcWj1xtTVvBo6c+Tnby//TM3HqYm5DGS68yxSauu8agJ0dOd+3/uKiUBLW8rrBdukVway5speSYXLAF41/Mq7PEwkp9dPTROvkeR7uuV4gWcKEypqVTY3OprWVcsm5vDwTS4HVwwJzq4TKSdnYfEZTrlbIEwYM= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=ideasonboard.com; spf=pass smtp.mailfrom=ideasonboard.com; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b=G6xa5BwV; arc=none smtp.client-ip=213.167.242.64 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=ideasonboard.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ideasonboard.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b="G6xa5BwV" Received: from pendragon.ideasonboard.com (82-203-161-16.bb.dnainternet.fi [82.203.161.16]) by perceval.ideasonboard.com (Postfix) with UTF8SMTPSA id 50D9F177B; Mon, 27 Oct 2025 01:41:06 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1761525666; bh=ql+9l2OIUe012ZMtNpJEMb1HFYAsPP+D4QtZAHzeetA=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=G6xa5BwVhhNpPPy76K2KrkE0H4OMjorlFTUcqeMi17nbo7fdC4ihgfpkRkCteqi/a HH01nziHav5NKjZT+Ap0VGM0KoCh40OV9KUxZfoSNAexvnf+ceNeoi/kj4hLKBh/Vt wq8SVBvvCprQS5fK8uFfj24V2wL/n3ME6tpFgJ5Q= Date: Mon, 27 Oct 2025 02:42:39 +0200 From: Laurent Pinchart To: Guoniu Zhou Cc: Rui Miguel Silva , Martin Kepplinger , Purism Kernel Team , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Philipp Zabel , Frank Li , linux-media@vger.kernel.org, devicetree@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Guoniu Zhou Subject: Re: [PATCH v7 3/5] media: imx8mq-mipi-csi2: Explicitly release reset Message-ID: <20251027004239.GO13023@pendragon.ideasonboard.com> References: <20251023-csi2_imx8ulp-v7-0-5ecb081ce79b@nxp.com> <20251023-csi2_imx8ulp-v7-3-5ecb081ce79b@nxp.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <20251023-csi2_imx8ulp-v7-3-5ecb081ce79b@nxp.com> On Thu, Oct 23, 2025 at 05:19:44PM +0800, Guoniu Zhou wrote: > From: Guoniu Zhou > > Call reset_control_deassert() to explicitly release reset to make sure > reset bits are cleared since platform like i.MX8ULP can't clear reset > bits automatically. > > Reviewed-by: Frank Li > Signed-off-by: Guoniu Zhou Reviewed-by: Laurent Pinchart > --- > drivers/media/platform/nxp/imx8mq-mipi-csi2.c | 8 ++------ > 1 file changed, 2 insertions(+), 6 deletions(-) > > diff --git a/drivers/media/platform/nxp/imx8mq-mipi-csi2.c b/drivers/media/platform/nxp/imx8mq-mipi-csi2.c > index fd202601d401145da8be23df4451f6af660642c5..fd788a7f48e5feeff658e3d2347db6fefca5d0cf 100644 > --- a/drivers/media/platform/nxp/imx8mq-mipi-csi2.c > +++ b/drivers/media/platform/nxp/imx8mq-mipi-csi2.c > @@ -337,18 +337,14 @@ static int imx8mq_mipi_csi_sw_reset(struct csi_state *state) > { > int ret; > > - /* > - * these are most likely self-clearing reset bits. to make it > - * more clear, the reset-imx7 driver should implement the > - * .reset() operation. > - */ > ret = reset_control_assert(state->rst); > if (ret < 0) { > dev_err(state->dev, "Failed to assert resets: %d\n", ret); > return ret; > } > > - return 0; > + /* Explicitly release reset to make sure reset bits are cleared. */ > + return reset_control_deassert(state->rst); > } > > static void imx8mq_mipi_csi_set_params(struct csi_state *state) -- Regards, Laurent Pinchart