[PATCH V2 0/2] arm64/mm: Add remaining TLBI_XXX_MASK macros

[PATCH V2 0/2] arm64/mm: Add remaining TLBI_XXX_MASK macros

[Anshuman Khandual]

Add remaining TLBI_XXX_MASK macros. But before that drop one redundant
'level' trimming operation in __tlbi_level().

Changes in V2:

- Added KVM changes required to accommodate TLBI_TTL_MASK split
- Updated the commit message

Changes in V1:

https://lore.kernel.org/all/20251021052022.2898275-1-anshuman.khandual@arm.com/

Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will@kernel.org>
Cc: Marc Zyngier <maz@kernel.org> 
Cc: Oliver Upton <oliver.upton@linux.dev>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Cc: kvmarm@lists.linux.dev

Anshuman Khandual (2):
  arm64/mm: Drop redundant 'level' range trimming in __tlbi_level()
  arm64/mm: Add remaining TLBI_XXX_MASK macros

 arch/arm64/include/asm/tlbflush.h | 26 ++++++++++++++++++--------
 arch/arm64/kvm/nested.c           |  8 +++++---
 2 files changed, 23 insertions(+), 11 deletions(-)

-- 
2.30.2

[PATCH V2 1/2] arm64/mm: Drop redundant 'level' range trimming in __tlbi_level()

[Anshuman Khandual]

Page table level value has already known to be in the range [0..3] before
entering inside the conditional 'if' loop. Hence any subsequent trimming
is just redundant and can be dropped off.

Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
---
 arch/arm64/include/asm/tlbflush.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/include/asm/tlbflush.h b/arch/arm64/include/asm/tlbflush.h
index 18a5dc0c9a54..131096094f5b 100644
--- a/arch/arm64/include/asm/tlbflush.h
+++ b/arch/arm64/include/asm/tlbflush.h
@@ -110,7 +110,7 @@ static inline unsigned long get_trans_granule(void)
 									\
 	if (alternative_has_cap_unlikely(ARM64_HAS_ARMv8_4_TTL) &&	\
 	    level >= 0 && level <= 3) {					\
-		u64 ttl = level & 3;					\
+		u64 ttl = level;					\
 		ttl |= get_trans_granule() << 2;			\
 		arg &= ~TLBI_TTL_MASK;					\
 		arg |= FIELD_PREP(TLBI_TTL_MASK, ttl);			\
-- 
2.30.2

[PATCH V2 2/2] arm64/mm: Add remaining TLBI_XXX_MASK macros

[Anshuman Khandual]

Add remaining TLBI_XXX_MASK macros and replace current open encoded fields.
While here replace hard coded page size based shifts but with derived ones
via ilog2() thus adding some required context.

TLBI_TTL_MASK has been split into separate TLBI_TTL_MASK and TLBI_TG_MASK
as appropriate because currently it simultaneously contains both page size
and translation table level information. KVM on arm64 has been updated to
accommodate these changes to TLBI_TTL_MASK.

Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will@kernel.org>
Cc: Marc Zyngier <maz@kernel.org>
Cc: Oliver Upton <oliver.upton@linux.dev>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Cc: kvmarm@lists.linux.dev
Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
---
 arch/arm64/include/asm/tlbflush.h | 26 ++++++++++++++++++--------
 arch/arm64/kvm/nested.c           |  8 +++++---
 2 files changed, 23 insertions(+), 11 deletions(-)

diff --git a/arch/arm64/include/asm/tlbflush.h b/arch/arm64/include/asm/tlbflush.h
index 131096094f5b..cf75fc2a06c3 100644
--- a/arch/arm64/include/asm/tlbflush.h
+++ b/arch/arm64/include/asm/tlbflush.h
@@ -57,9 +57,10 @@
 /* This macro creates a properly formatted VA operand for the TLBI */
 #define __TLBI_VADDR(addr, asid)				\
 	({							\
-		unsigned long __ta = (addr) >> 12;		\
-		__ta &= GENMASK_ULL(43, 0);			\
-		__ta |= (unsigned long)(asid) << 48;		\
+		unsigned long __ta = (addr) >> ilog2(SZ_4K);	\
+		__ta &= TLBI_BADDR_MASK;			\
+		__ta &= ~TLBI_ASID_MASK;			\
+		__ta |= FIELD_PREP(TLBI_ASID_MASK, asid);	\
 		__ta;						\
 	})
 
@@ -100,8 +101,17 @@ static inline unsigned long get_trans_granule(void)
  *
  * For Stage-2 invalidation, use the level values provided to that effect
  * in asm/stage2_pgtable.h.
+ *
+ * +----------+------+-------+--------------------------------------+
+ * |   ASID   |  TG  |  TTL  |                 BADDR                |
+ * +-----------------+-------+--------------------------------------+
+ * |63      48|47  46|45   44|43                                   0|
+ * +----------+------+-------+--------------------------------------+
  */
-#define TLBI_TTL_MASK		GENMASK_ULL(47, 44)
+#define TLBI_ASID_MASK		GENMASK_ULL(63, 48)
+#define TLBI_TG_MASK		GENMASK_ULL(47, 46)
+#define TLBI_TTL_MASK		GENMASK_ULL(45, 44)
+#define TLBI_BADDR_MASK		GENMASK_ULL(43, 0)
 
 #define TLBI_TTL_UNKNOWN	INT_MAX
 
@@ -110,10 +120,10 @@ static inline unsigned long get_trans_granule(void)
 									\
 	if (alternative_has_cap_unlikely(ARM64_HAS_ARMv8_4_TTL) &&	\
 	    level >= 0 && level <= 3) {					\
-		u64 ttl = level;					\
-		ttl |= get_trans_granule() << 2;			\
+		arg &= ~TLBI_TG_MASK;					\
+		arg |= FIELD_PREP(TLBI_TG_MASK, get_trans_granule());	\
 		arg &= ~TLBI_TTL_MASK;					\
-		arg |= FIELD_PREP(TLBI_TTL_MASK, ttl);			\
+		arg |= FIELD_PREP(TLBI_TTL_MASK, level);		\
 	}								\
 									\
 	__tlbi(op, arg);						\
@@ -383,7 +393,7 @@ do {									\
 	typeof(pages) __flush_pages = pages;				\
 	int num = 0;							\
 	int scale = 3;							\
-	int shift = lpa2 ? 16 : PAGE_SHIFT;				\
+	int shift = lpa2 ? ilog2(SZ_64K) : PAGE_SHIFT;			\
 	unsigned long addr;						\
 									\
 	while (__flush_pages > 0) {					\
diff --git a/arch/arm64/kvm/nested.c b/arch/arm64/kvm/nested.c
index f04cda40545b..614629179333 100644
--- a/arch/arm64/kvm/nested.c
+++ b/arch/arm64/kvm/nested.c
@@ -540,7 +540,7 @@ unsigned long compute_tlb_inval_range(struct kvm_s2_mmu *mmu, u64 val)
 	unsigned long max_size;
 	u8 ttl;
 
-	ttl = FIELD_GET(TLBI_TTL_MASK, val);
+	ttl = FIELD_GET(TLBI_TTL_MASK, val) | FIELD_GET(TLBI_TG_MASK, val) << 2;
 
 	if (!ttl || !kvm_has_feat(kvm, ID_AA64MMFR2_EL1, TTL, IMP)) {
 		/* No TTL, check the shadow S2 for a hint */
@@ -963,7 +963,8 @@ static void compute_s1_tlbi_range(struct kvm_vcpu *vcpu, u32 inst, u64 val,
 	case OP_TLBI_VALE1ISNXS:
 	case OP_TLBI_VALE1OSNXS:
 		scope->type = TLBI_VA;
-		scope->size = ttl_to_size(FIELD_GET(TLBI_TTL_MASK, val));
+		scope->size = ttl_to_size(FIELD_GET(TLBI_TTL_MASK, val) |
+					  FIELD_GET(TLBI_TG_MASK, val) << 2);
 		if (!scope->size)
 			scope->size = SZ_1G;
 		scope->va = tlbi_va_s1_to_va(val) & ~(scope->size - 1);
@@ -991,7 +992,8 @@ static void compute_s1_tlbi_range(struct kvm_vcpu *vcpu, u32 inst, u64 val,
 	case OP_TLBI_VAALE1ISNXS:
 	case OP_TLBI_VAALE1OSNXS:
 		scope->type = TLBI_VAA;
-		scope->size = ttl_to_size(FIELD_GET(TLBI_TTL_MASK, val));
+		scope->size = ttl_to_size(FIELD_GET(TLBI_TTL_MASK, val) |
+					  FIELD_GET(TLBI_TG_MASK, val) << 2);
 		if (!scope->size)
 			scope->size = SZ_1G;
 		scope->va = tlbi_va_s1_to_va(val) & ~(scope->size - 1);
-- 
2.30.2

Re: [PATCH V2 2/2] arm64/mm: Add remaining TLBI_XXX_MASK macros

[Ben Horgan]

Hi Anshuman,

On 10/24/25 05:02, Anshuman Khandual wrote:
> Add remaining TLBI_XXX_MASK macros and replace current open encoded fields.
> While here replace hard coded page size based shifts but with derived ones
> via ilog2() thus adding some required context.
> 
> TLBI_TTL_MASK has been split into separate TLBI_TTL_MASK and TLBI_TG_MASK
> as appropriate because currently it simultaneously contains both page size
> and translation table level information. KVM on arm64 has been updated to
> accommodate these changes to TLBI_TTL_MASK.
> 
> Cc: Catalin Marinas <catalin.marinas@arm.com>
> Cc: Will Deacon <will@kernel.org>
> Cc: Marc Zyngier <maz@kernel.org>
> Cc: Oliver Upton <oliver.upton@linux.dev>
> Cc: linux-arm-kernel@lists.infradead.org
> Cc: linux-kernel@vger.kernel.org
> Cc: kvmarm@lists.linux.dev
> Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
> ---
>  arch/arm64/include/asm/tlbflush.h | 26 ++++++++++++++++++--------
>  arch/arm64/kvm/nested.c           |  8 +++++---
>  2 files changed, 23 insertions(+), 11 deletions(-)
> 
The code looks correct to me, no functional changes. I however, don't
have any experience with this code and so don't know whether the split
of TTL into TG and TTL is a good idea or not and if the kvm naming is
best to stay the same or be updated to match this.

Thanks,

Ben

Re: [PATCH V2 2/2] arm64/mm: Add remaining TLBI_XXX_MASK macros

[Anshuman Khandual]

On 24/10/25 2:26 PM, Ben Horgan wrote:
> Hi Anshuman,
> 
> On 10/24/25 05:02, Anshuman Khandual wrote:
>> Add remaining TLBI_XXX_MASK macros and replace current open encoded fields.
>> While here replace hard coded page size based shifts but with derived ones
>> via ilog2() thus adding some required context.
>>
>> TLBI_TTL_MASK has been split into separate TLBI_TTL_MASK and TLBI_TG_MASK
>> as appropriate because currently it simultaneously contains both page size
>> and translation table level information. KVM on arm64 has been updated to
>> accommodate these changes to TLBI_TTL_MASK.
>>
>> Cc: Catalin Marinas <catalin.marinas@arm.com>
>> Cc: Will Deacon <will@kernel.org>
>> Cc: Marc Zyngier <maz@kernel.org>
>> Cc: Oliver Upton <oliver.upton@linux.dev>
>> Cc: linux-arm-kernel@lists.infradead.org
>> Cc: linux-kernel@vger.kernel.org
>> Cc: kvmarm@lists.linux.dev
>> Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
>> ---
>>  arch/arm64/include/asm/tlbflush.h | 26 ++++++++++++++++++--------
>>  arch/arm64/kvm/nested.c           |  8 +++++---
>>  2 files changed, 23 insertions(+), 11 deletions(-)
>>
> The code looks correct to me, no functional changes. I however, don't
> have any experience with this code and so don't know whether the split
> of TTL into TG and TTL is a good idea or not and if the kvm naming is

TLBI_TTL field contains both encoded page size and also page table
level information. This split in the mask makes the code much clear
and explicit.
> best to stay the same or be updated to match this.
This proposed patch keeps the KVM code churn to the minimum while
also adapting to the mask split as necessary. But further changes
to KVM if required can be done subsequently later.

Re: [PATCH V2 2/2] arm64/mm: Add remaining TLBI_XXX_MASK macros

[Jonathan Cameron]

On Fri, 24 Oct 2025 05:02:07 +0100
Anshuman Khandual <anshuman.khandual@arm.com> wrote:

> Add remaining TLBI_XXX_MASK macros and replace current open encoded fields.
> While here replace hard coded page size based shifts but with derived ones
> via ilog2() thus adding some required context.
> 
> TLBI_TTL_MASK has been split into separate TLBI_TTL_MASK and TLBI_TG_MASK
> as appropriate because currently it simultaneously contains both page size
> and translation table level information. KVM on arm64 has been updated to
> accommodate these changes to TLBI_TTL_MASK.
> 
> Cc: Catalin Marinas <catalin.marinas@arm.com>
> Cc: Will Deacon <will@kernel.org>
> Cc: Marc Zyngier <maz@kernel.org>
> Cc: Oliver Upton <oliver.upton@linux.dev>
> Cc: linux-arm-kernel@lists.infradead.org
> Cc: linux-kernel@vger.kernel.org
> Cc: kvmarm@lists.linux.dev
> Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
> ---
>  arch/arm64/include/asm/tlbflush.h | 26 ++++++++++++++++++--------
>  arch/arm64/kvm/nested.c           |  8 +++++---
>  2 files changed, 23 insertions(+), 11 deletions(-)
> 
> diff --git a/arch/arm64/include/asm/tlbflush.h b/arch/arm64/include/asm/tlbflush.h
> index 131096094f5b..cf75fc2a06c3 100644
> --- a/arch/arm64/include/asm/tlbflush.h
> +++ b/arch/arm64/include/asm/tlbflush.h
> @@ -57,9 +57,10 @@
>  /* This macro creates a properly formatted VA operand for the TLBI */
>  #define __TLBI_VADDR(addr, asid)				\
>  	({							\
> -		unsigned long __ta = (addr) >> 12;		\
> -		__ta &= GENMASK_ULL(43, 0);			\
> -		__ta |= (unsigned long)(asid) << 48;		\
> +		unsigned long __ta = (addr) >> ilog2(SZ_4K);	\
> +		__ta &= TLBI_BADDR_MASK;			\
> +		__ta &= ~TLBI_ASID_MASK;			\
> +		__ta |= FIELD_PREP(TLBI_ASID_MASK, asid);	\
I think you can replace the two lines above with
		FIELD_MODIFY(TLBI_ASID_MASK, &__ta, asid);

It's a small reduction in code but I don't mind much either way.

>  		__ta;						\
>  	})
>  
> @@ -100,8 +101,17 @@ static inline unsigned long get_trans_granule(void)
>   *
>   * For Stage-2 invalidation, use the level values provided to that effect
>   * in asm/stage2_pgtable.h.
> + *
> + * +----------+------+-------+--------------------------------------+
> + * |   ASID   |  TG  |  TTL  |                 BADDR                |
> + * +-----------------+-------+--------------------------------------+
> + * |63      48|47  46|45   44|43                                   0|
> + * +----------+------+-------+--------------------------------------+
>   */
> -#define TLBI_TTL_MASK		GENMASK_ULL(47, 44)
> +#define TLBI_ASID_MASK		GENMASK_ULL(63, 48)
> +#define TLBI_TG_MASK		GENMASK_ULL(47, 46)
> +#define TLBI_TTL_MASK		GENMASK_ULL(45, 44)
> +#define TLBI_BADDR_MASK		GENMASK_ULL(43, 0)
>  
>  #define TLBI_TTL_UNKNOWN	INT_MAX
>  
> @@ -110,10 +120,10 @@ static inline unsigned long get_trans_granule(void)
>  									\
>  	if (alternative_has_cap_unlikely(ARM64_HAS_ARMv8_4_TTL) &&	\
>  	    level >= 0 && level <= 3) {					\
> -		u64 ttl = level;					\
> -		ttl |= get_trans_granule() << 2;			\
> +		arg &= ~TLBI_TG_MASK;					\
> +		arg |= FIELD_PREP(TLBI_TG_MASK, get_trans_granule());	\
>  		arg &= ~TLBI_TTL_MASK;					\
> -		arg |= FIELD_PREP(TLBI_TTL_MASK, ttl);			\
> +		arg |= FIELD_PREP(TLBI_TTL_MASK, level);		\

Similar potential to use FIELD_MODIFY for these.

Jonathan

Re: [PATCH V2 2/2] arm64/mm: Add remaining TLBI_XXX_MASK macros

[Anshuman Khandual]

On 24/10/25 4:30 PM, Jonathan Cameron wrote:
> On Fri, 24 Oct 2025 05:02:07 +0100
> Anshuman Khandual <anshuman.khandual@arm.com> wrote:
> 
>> Add remaining TLBI_XXX_MASK macros and replace current open encoded fields.
>> While here replace hard coded page size based shifts but with derived ones
>> via ilog2() thus adding some required context.
>>
>> TLBI_TTL_MASK has been split into separate TLBI_TTL_MASK and TLBI_TG_MASK
>> as appropriate because currently it simultaneously contains both page size
>> and translation table level information. KVM on arm64 has been updated to
>> accommodate these changes to TLBI_TTL_MASK.
>>
>> Cc: Catalin Marinas <catalin.marinas@arm.com>
>> Cc: Will Deacon <will@kernel.org>
>> Cc: Marc Zyngier <maz@kernel.org>
>> Cc: Oliver Upton <oliver.upton@linux.dev>
>> Cc: linux-arm-kernel@lists.infradead.org
>> Cc: linux-kernel@vger.kernel.org
>> Cc: kvmarm@lists.linux.dev
>> Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
>> ---
>>  arch/arm64/include/asm/tlbflush.h | 26 ++++++++++++++++++--------
>>  arch/arm64/kvm/nested.c           |  8 +++++---
>>  2 files changed, 23 insertions(+), 11 deletions(-)
>>
>> diff --git a/arch/arm64/include/asm/tlbflush.h b/arch/arm64/include/asm/tlbflush.h
>> index 131096094f5b..cf75fc2a06c3 100644
>> --- a/arch/arm64/include/asm/tlbflush.h
>> +++ b/arch/arm64/include/asm/tlbflush.h
>> @@ -57,9 +57,10 @@
>>  /* This macro creates a properly formatted VA operand for the TLBI */
>>  #define __TLBI_VADDR(addr, asid)				\
>>  	({							\
>> -		unsigned long __ta = (addr) >> 12;		\
>> -		__ta &= GENMASK_ULL(43, 0);			\
>> -		__ta |= (unsigned long)(asid) << 48;		\
>> +		unsigned long __ta = (addr) >> ilog2(SZ_4K);	\
>> +		__ta &= TLBI_BADDR_MASK;			\
>> +		__ta &= ~TLBI_ASID_MASK;			\
>> +		__ta |= FIELD_PREP(TLBI_ASID_MASK, asid);	\
> I think you can replace the two lines above with
> 		FIELD_MODIFY(TLBI_ASID_MASK, &__ta, asid);
> 
> It's a small reduction in code but I don't mind much either way.

Right. FIELD_MODIFY() might be appropriate in this scenario but
there will be some additional code churn needed. I don't have a
strong opinion either way.

--- a/arch/arm64/include/asm/tlbflush.h
+++ b/arch/arm64/include/asm/tlbflush.h
@@ -55,13 +55,12 @@
 } while (0)

 /* This macro creates a properly formatted VA operand for the TLBI */
-#define __TLBI_VADDR(addr, asid)                               \
-       ({                                                      \
-               unsigned long __ta = (addr) >> ilog2(SZ_4K);    \
-               __ta &= TLBI_BADDR_MASK;                        \
-               __ta &= ~TLBI_ASID_MASK;                        \
-               __ta |= FIELD_PREP(TLBI_ASID_MASK, asid);       \
-               __ta;                                           \
+#define __TLBI_VADDR(addr, asid)                                       \
+       ({                                                              \
+               unsigned long __ta = (addr) >> ilog2(SZ_4K);            \
+               __ta &= TLBI_BADDR_MASK;                                \
+               __ta |= FIELD_MODIFY(TLBI_ASID_MASK, &__ta, asid);      \
+               __ta;                                                   \
        })
 > 
>>  		__ta;						\
>>  	})
>>  
>> @@ -100,8 +101,17 @@ static inline unsigned long get_trans_granule(void)
>>   *
>>   * For Stage-2 invalidation, use the level values provided to that effect
>>   * in asm/stage2_pgtable.h.
>> + *
>> + * +----------+------+-------+--------------------------------------+
>> + * |   ASID   |  TG  |  TTL  |                 BADDR                |
>> + * +-----------------+-------+--------------------------------------+
>> + * |63      48|47  46|45   44|43                                   0|
>> + * +----------+------+-------+--------------------------------------+
>>   */
>> -#define TLBI_TTL_MASK		GENMASK_ULL(47, 44)
>> +#define TLBI_ASID_MASK		GENMASK_ULL(63, 48)
>> +#define TLBI_TG_MASK		GENMASK_ULL(47, 46)
>> +#define TLBI_TTL_MASK		GENMASK_ULL(45, 44)
>> +#define TLBI_BADDR_MASK		GENMASK_ULL(43, 0)
>>  
>>  #define TLBI_TTL_UNKNOWN	INT_MAX
>>  
>> @@ -110,10 +120,10 @@ static inline unsigned long get_trans_granule(void)
>>  									\
>>  	if (alternative_has_cap_unlikely(ARM64_HAS_ARMv8_4_TTL) &&	\
>>  	    level >= 0 && level <= 3) {					\
>> -		u64 ttl = level;					\
>> -		ttl |= get_trans_granule() << 2;			\
>> +		arg &= ~TLBI_TG_MASK;					\
>> +		arg |= FIELD_PREP(TLBI_TG_MASK, get_trans_granule());	\
>>  		arg &= ~TLBI_TTL_MASK;					\
>> -		arg |= FIELD_PREP(TLBI_TTL_MASK, ttl);			\
>> +		arg |= FIELD_PREP(TLBI_TTL_MASK, level);		\
> 
> Similar potential to use FIELD_MODIFY for these.
> 
> Jonathan
> 

Re: [PATCH V2 2/2] arm64/mm: Add remaining TLBI_XXX_MASK macros

[Jonathan Cameron]

On Mon, 27 Oct 2025 07:06:45 +0530
Anshuman Khandual <anshuman.khandual@arm.com> wrote:

> On 24/10/25 4:30 PM, Jonathan Cameron wrote:
> > On Fri, 24 Oct 2025 05:02:07 +0100
> > Anshuman Khandual <anshuman.khandual@arm.com> wrote:
> >   
> >> Add remaining TLBI_XXX_MASK macros and replace current open encoded fields.
> >> While here replace hard coded page size based shifts but with derived ones
> >> via ilog2() thus adding some required context.
> >>
> >> TLBI_TTL_MASK has been split into separate TLBI_TTL_MASK and TLBI_TG_MASK
> >> as appropriate because currently it simultaneously contains both page size
> >> and translation table level information. KVM on arm64 has been updated to
> >> accommodate these changes to TLBI_TTL_MASK.
> >>
> >> Cc: Catalin Marinas <catalin.marinas@arm.com>
> >> Cc: Will Deacon <will@kernel.org>
> >> Cc: Marc Zyngier <maz@kernel.org>
> >> Cc: Oliver Upton <oliver.upton@linux.dev>
> >> Cc: linux-arm-kernel@lists.infradead.org
> >> Cc: linux-kernel@vger.kernel.org
> >> Cc: kvmarm@lists.linux.dev
> >> Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
> >> ---
> >>  arch/arm64/include/asm/tlbflush.h | 26 ++++++++++++++++++--------
> >>  arch/arm64/kvm/nested.c           |  8 +++++---
> >>  2 files changed, 23 insertions(+), 11 deletions(-)
> >>
> >> diff --git a/arch/arm64/include/asm/tlbflush.h b/arch/arm64/include/asm/tlbflush.h
> >> index 131096094f5b..cf75fc2a06c3 100644
> >> --- a/arch/arm64/include/asm/tlbflush.h
> >> +++ b/arch/arm64/include/asm/tlbflush.h
> >> @@ -57,9 +57,10 @@
> >>  /* This macro creates a properly formatted VA operand for the TLBI */
> >>  #define __TLBI_VADDR(addr, asid)				\
> >>  	({							\
> >> -		unsigned long __ta = (addr) >> 12;		\
> >> -		__ta &= GENMASK_ULL(43, 0);			\
> >> -		__ta |= (unsigned long)(asid) << 48;		\
> >> +		unsigned long __ta = (addr) >> ilog2(SZ_4K);	\
> >> +		__ta &= TLBI_BADDR_MASK;			\
> >> +		__ta &= ~TLBI_ASID_MASK;			\
> >> +		__ta |= FIELD_PREP(TLBI_ASID_MASK, asid);	\  
> > I think you can replace the two lines above with
> > 		FIELD_MODIFY(TLBI_ASID_MASK, &__ta, asid);
> > 
> > It's a small reduction in code but I don't mind much either way.  
> 
> Right. FIELD_MODIFY() might be appropriate in this scenario but
> there will be some additional code churn needed. I don't have a
> strong opinion either way.
> 
> --- a/arch/arm64/include/asm/tlbflush.h
> +++ b/arch/arm64/include/asm/tlbflush.h
> @@ -55,13 +55,12 @@
>  } while (0)
> 
>  /* This macro creates a properly formatted VA operand for the TLBI */
> -#define __TLBI_VADDR(addr, asid)                               \
> -       ({                                                      \
> -               unsigned long __ta = (addr) >> ilog2(SZ_4K);    \
> -               __ta &= TLBI_BADDR_MASK;                        \
> -               __ta &= ~TLBI_ASID_MASK;                        \
> -               __ta |= FIELD_PREP(TLBI_ASID_MASK, asid);       \
> -               __ta;                                           \
> +#define __TLBI_VADDR(addr, asid)                                       \
> +       ({                                                              \
> +               unsigned long __ta = (addr) >> ilog2(SZ_4K);            \
> +               __ta &= TLBI_BADDR_MASK;                                \
> +               __ta |= FIELD_MODIFY(TLBI_ASID_MASK, &__ta, asid);      \
		  FIELD_MODIFY(TLBI_ASID_MASK, &__tab, asid);

as it's done in place in the second parameter.
 

Re: [PATCH V2 2/2] arm64/mm: Add remaining TLBI_XXX_MASK macros

[Anshuman Khandual]

On 28/10/25 6:13 PM, Jonathan Cameron wrote:
> On Mon, 27 Oct 2025 07:06:45 +0530
> Anshuman Khandual <anshuman.khandual@arm.com> wrote:
> 
>> On 24/10/25 4:30 PM, Jonathan Cameron wrote:
>>> On Fri, 24 Oct 2025 05:02:07 +0100
>>> Anshuman Khandual <anshuman.khandual@arm.com> wrote:
>>>   
>>>> Add remaining TLBI_XXX_MASK macros and replace current open encoded fields.
>>>> While here replace hard coded page size based shifts but with derived ones
>>>> via ilog2() thus adding some required context.
>>>>
>>>> TLBI_TTL_MASK has been split into separate TLBI_TTL_MASK and TLBI_TG_MASK
>>>> as appropriate because currently it simultaneously contains both page size
>>>> and translation table level information. KVM on arm64 has been updated to
>>>> accommodate these changes to TLBI_TTL_MASK.
>>>>
>>>> Cc: Catalin Marinas <catalin.marinas@arm.com>
>>>> Cc: Will Deacon <will@kernel.org>
>>>> Cc: Marc Zyngier <maz@kernel.org>
>>>> Cc: Oliver Upton <oliver.upton@linux.dev>
>>>> Cc: linux-arm-kernel@lists.infradead.org
>>>> Cc: linux-kernel@vger.kernel.org
>>>> Cc: kvmarm@lists.linux.dev
>>>> Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
>>>> ---
>>>>  arch/arm64/include/asm/tlbflush.h | 26 ++++++++++++++++++--------
>>>>  arch/arm64/kvm/nested.c           |  8 +++++---
>>>>  2 files changed, 23 insertions(+), 11 deletions(-)
>>>>
>>>> diff --git a/arch/arm64/include/asm/tlbflush.h b/arch/arm64/include/asm/tlbflush.h
>>>> index 131096094f5b..cf75fc2a06c3 100644
>>>> --- a/arch/arm64/include/asm/tlbflush.h
>>>> +++ b/arch/arm64/include/asm/tlbflush.h
>>>> @@ -57,9 +57,10 @@
>>>>  /* This macro creates a properly formatted VA operand for the TLBI */
>>>>  #define __TLBI_VADDR(addr, asid)				\
>>>>  	({							\
>>>> -		unsigned long __ta = (addr) >> 12;		\
>>>> -		__ta &= GENMASK_ULL(43, 0);			\
>>>> -		__ta |= (unsigned long)(asid) << 48;		\
>>>> +		unsigned long __ta = (addr) >> ilog2(SZ_4K);	\
>>>> +		__ta &= TLBI_BADDR_MASK;			\
>>>> +		__ta &= ~TLBI_ASID_MASK;			\
>>>> +		__ta |= FIELD_PREP(TLBI_ASID_MASK, asid);	\  
>>> I think you can replace the two lines above with
>>> 		FIELD_MODIFY(TLBI_ASID_MASK, &__ta, asid);
>>>
>>> It's a small reduction in code but I don't mind much either way.  
>>
>> Right. FIELD_MODIFY() might be appropriate in this scenario but
>> there will be some additional code churn needed. I don't have a
>> strong opinion either way.
>>
>> --- a/arch/arm64/include/asm/tlbflush.h
>> +++ b/arch/arm64/include/asm/tlbflush.h
>> @@ -55,13 +55,12 @@
>>  } while (0)
>>
>>  /* This macro creates a properly formatted VA operand for the TLBI */
>> -#define __TLBI_VADDR(addr, asid)                               \
>> -       ({                                                      \
>> -               unsigned long __ta = (addr) >> ilog2(SZ_4K);    \
>> -               __ta &= TLBI_BADDR_MASK;                        \
>> -               __ta &= ~TLBI_ASID_MASK;                        \
>> -               __ta |= FIELD_PREP(TLBI_ASID_MASK, asid);       \
>> -               __ta;                                           \
>> +#define __TLBI_VADDR(addr, asid)                                       \
>> +       ({                                                              \
>> +               unsigned long __ta = (addr) >> ilog2(SZ_4K);            \
>> +               __ta &= TLBI_BADDR_MASK;                                \
>> +               __ta |= FIELD_MODIFY(TLBI_ASID_MASK, &__ta, asid);      \
> 		  FIELD_MODIFY(TLBI_ASID_MASK, &__tab, asid);
> 
> as it's done in place in the second parameter.

Sorry but could not understand your point above.

Re: [PATCH V2 0/2] arm64/mm: Add remaining TLBI_XXX_MASK macros

[Anshuman Khandual]

On 24/10/25 9:32 AM, Anshuman Khandual wrote:
> Add remaining TLBI_XXX_MASK macros. But before that drop one redundant
> 'level' trimming operation in __tlbi_level().
> 
> Changes in V2:
> 
> - Added KVM changes required to accommodate TLBI_TTL_MASK split
> - Updated the commit message
> 
> Changes in V1:
> 
> https://lore.kernel.org/all/20251021052022.2898275-1-anshuman.khandual@arm.com/
> 
> Cc: Catalin Marinas <catalin.marinas@arm.com>
> Cc: Will Deacon <will@kernel.org>
> Cc: Marc Zyngier <maz@kernel.org> 
> Cc: Oliver Upton <oliver.upton@linux.dev>
> Cc: linux-arm-kernel@lists.infradead.org
> Cc: linux-kernel@vger.kernel.org
> Cc: kvmarm@lists.linux.dev
> 
> Anshuman Khandual (2):
>   arm64/mm: Drop redundant 'level' range trimming in __tlbi_level()
>   arm64/mm: Add remaining TLBI_XXX_MASK macros
> 
>  arch/arm64/include/asm/tlbflush.h | 26 ++++++++++++++++++--------
>  arch/arm64/kvm/nested.c           |  8 +++++---
>  2 files changed, 23 insertions(+), 11 deletions(-)
> 

Gentle ping. Any updates or concerns regarding these changes ?