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X-OriginatorOrg: ti.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 04 Nov 2025 15:14:30.5246 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: fa6bbf67-f0f1-4998-228e-08de1bb4da74 X-MS-Exchange-CrossTenant-Id: e5b49634-450b-4709-8abb-1e2b19b982b7 X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=e5b49634-450b-4709-8abb-1e2b19b982b7;Ip=[198.47.23.195];Helo=[lewvzet201.ext.ti.com] X-MS-Exchange-CrossTenant-AuthSource: SJ5PEPF000001D1.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ0PR10MB6422 In an effort to make the existing compatibles more usable, we are removing the max/min_pclk_khz form dispc_features structure and doing the supported pixel clock checks using clk_round_rate(). Changes are fully backwards compatible. - Remove max/min_pclk_khz and use clk_round_rate to validate modes - Skip OLDI mode validate through dispc_vp_mode_valid and add mode_valid hook to validate modes for OLDI bridge in tidss_oldi.c --- Changelog v7->v8 - Add commit message in PATCH 2/2 to explain the need of skipping check_pixel_clock() for VP's having external clocking - Make check_pixel_clock() inline - Add newline for code readability - Pick up R-by tag v7 patch link: https://lore.kernel.org/all/20251028033958.369100-1-s-jain1@ti.com/ Changelog v6->v7 - Remove both max/min_pclk_khz as suggested by Tomi - Use mode_valid() instead of atomic_check() - Squash patches v6 PATCH 1/3 and PATCH 3/3 which is a fix to OLDI series[1] - Minor fixes in commit message - Update commit message to include more reasoning to add Fixes tag to Patch v7 2/2 [1]: https://lore.kernel.org/all/20250528122544.817829-1-aradhya.bhatia@linux.dev/ v6 patch link: https://lore.kernel.org/all/20250911110715.2873596-1-s-jain1@ti.com/ Changelog v5->v6 - Drop caching logic - Add comments for tolerance value (We are targeting another series for reducing tolerance value) - Minor fixes in commit message v5 patch link: https://lore.kernel.org/all/20250819192113.2420396-1-s-jain1@ti.com/ Changelog v4->v5 - Rename is_oldi_vp[] to is_ext_vp_clk[] - Store both pixel clock round_rate and attempted_rate to reduce clk_round_rate() calls while validating modes - Code changes suggested by Tomi[2] - Minor fixes in comments and commit message [2]: https://lore.kernel.org/all/8cd9d1c4-2e9f-4766-b224-21925c4f991d@ideasonboard.com/ v4 patch link: https://lore.kernel.org/all/20250704094851.182131-1-j-choudhary@ti.com/ Changelog v3->v4: - Minor cosmetic fixes in code, comments and commit message - Pick up R-by and add Fixes tag v3 patch link: https://lore.kernel.org/all/20250701095541.190422-1-j-choudhary@ti.com/ Changelog v2->v3: - Add changes for OLDI - Rename max_pclk as it is misleading - Change commit message to make it more appropriate - Drop unnecessary zero initialization v2 patch link: https://lore.kernel.org/all/20250618100509.20386-1-j-choudhary@ti.com/ Changelog v1->v2: - Rebase it on linux-next after OLDI support series as all of its patches are reviewed and tested and it touches one of the functions used. v1 patch link: https://lore.kernel.org/all/20250618075804.139844-1-j-choudhary@ti.com/ --- Jayesh Choudhary (2): drm/tidss: Remove max_pclk_khz and min_pclk_khz from tidss display features drm/tidss: Move OLDI mode validation to OLDI bridge mode_valid hook drivers/gpu/drm/tidss/tidss_dispc.c | 93 ++++++++++++----------------- drivers/gpu/drm/tidss/tidss_dispc.h | 3 - drivers/gpu/drm/tidss/tidss_drv.h | 2 + drivers/gpu/drm/tidss/tidss_oldi.c | 22 +++++++ 4 files changed, 62 insertions(+), 58 deletions(-)