[PATCH 01/21] arc: disasm: rename BITS() for FIELD()

Yury Norov (NVIDIA)
2025-10-25T16:29:04Z

In preparation for adding generic BITS() macro, rename the local one.

Signed-off-by: Yury Norov (NVIDIA) <yury.norov@gmail.com>
---
arch/arc/include/asm/disasm.h | 62 +++++++++++++++++------------------
arch/arc/kernel/disasm.c | 46 +++++++++++++-------------
2 files changed, 54 insertions(+), 54 deletions(-)

diff --git a/arch/arc/include/asm/disasm.h b/arch/arc/include/asm/disasm.h
index 61fb4d7affa7..33a0e88e1e8c 100644
--- a/arch/arc/include/asm/disasm.h
+++ b/arch/arc/include/asm/disasm.h
@@ -29,44 +29,44 @@ enum flow {
};

#define IS_BIT(word, n) ((word) & (1<<n))
-#define BITS(word, s, e) (((word) >> (s)) & (~((-2) << ((e) - (s)))))
+#define FIELD(word, s, e) (((word) >> (s)) & (~((-2) << ((e) - (s)))))

-#define MAJOR_OPCODE(word) (BITS((word), 27, 31))
-#define MINOR_OPCODE(word) (BITS((word), 16, 21))
-#define FIELD_A(word) (BITS((word), 0, 5))
-#define FIELD_B(word) ((BITS((word), 12, 14)<<3) | \
- (BITS((word), 24, 26)))
-#define FIELD_C(word) (BITS((word), 6, 11))
+#define MAJOR_OPCODE(word) (FIELD((word), 27, 31))
+#define MINOR_OPCODE(word) (FIELD((word), 16, 21))
+#define FIELD_A(word) (FIELD((word), 0, 5))
+#define FIELD_B(word) ((FIELD((word), 12, 14)<<3) | \
+ (FIELD((word), 24, 26)))
+#define FIELD_C(word) (FIELD((word), 6, 11))
#define FIELD_u6(word) FIELDC(word)
-#define FIELD_s12(word) sign_extend(((BITS((word), 0, 5) << 6) | \
- BITS((word), 6, 11)), 12)
+#define FIELD_s12(word) sign_extend(((FIELD((word), 0, 5) << 6) | \
+ FIELD((word), 6, 11)), 12)

/* note that for BL/BRcc these two macro's need another AND statement to mask
* out bit 1 (make the result a multiple of 4) */
-#define FIELD_s9(word) sign_extend(((BITS(word, 15, 15) << 8) | \
- BITS(word, 16, 23)), 9)
-#define FIELD_s21(word) sign_extend(((BITS(word, 6, 15) << 11) | \
- (BITS(word, 17, 26) << 1)), 12)
-#define FIELD_s25(word) sign_extend(((BITS(word, 0, 3) << 21) | \
- (BITS(word, 6, 15) << 11) | \
- (BITS(word, 17, 26) << 1)), 12)
+#define FIELD_s9(word) sign_extend(((FIELD(word, 15, 15) << 8) | \
+ FIELD(word, 16, 23)), 9)
+#define FIELD_s21(word) sign_extend(((FIELD(word, 6, 15) << 11) | \
+ (FIELD(word, 17, 26) << 1)), 12)
+#define FIELD_s25(word) sign_extend(((FIELD(word, 0, 3) << 21) | \
+ (FIELD(word, 6, 15) << 11) | \
+ (FIELD(word, 17, 26) << 1)), 12)

/* note: these operate on 16 bits! */
-#define FIELD_S_A(word) ((BITS((word), 2, 2)<<3) | BITS((word), 0, 2))
-#define FIELD_S_B(word) ((BITS((word), 10, 10)<<3) | \
- BITS((word), 8, 10))
-#define FIELD_S_C(word) ((BITS((word), 7, 7)<<3) | BITS((word), 5, 7))
-#define FIELD_S_H(word) ((BITS((word), 0, 2)<<3) | BITS((word), 5, 8))
-#define FIELD_S_u5(word) (BITS((word), 0, 4))
-#define FIELD_S_u6(word) (BITS((word), 0, 4) << 1)
-#define FIELD_S_u7(word) (BITS((word), 0, 4) << 2)
-#define FIELD_S_u10(word) (BITS((word), 0, 7) << 2)
-#define FIELD_S_s7(word) sign_extend(BITS((word), 0, 5) << 1, 9)
-#define FIELD_S_s8(word) sign_extend(BITS((word), 0, 7) << 1, 9)
-#define FIELD_S_s9(word) sign_extend(BITS((word), 0, 8), 9)
-#define FIELD_S_s10(word) sign_extend(BITS((word), 0, 8) << 1, 10)
-#define FIELD_S_s11(word) sign_extend(BITS((word), 0, 8) << 2, 11)
-#define FIELD_S_s13(word) sign_extend(BITS((word), 0, 10) << 2, 13)
+#define FIELD_S_A(word) ((FIELD((word), 2, 2)<<3) | FIELD((word), 0, 2))
+#define FIELD_S_B(word) ((FIELD((word), 10, 10)<<3) | \
+ FIELD((word), 8, 10))
+#define FIELD_S_C(word) ((FIELD((word), 7, 7)<<3) | FIELD((word), 5, 7))
+#define FIELD_S_H(word) ((FIELD((word), 0, 2)<<3) | FIELD((word), 5, 8))
+#define FIELD_S_u5(word) (FIELD((word), 0, 4))
+#define FIELD_S_u6(word) (FIELD((word), 0, 4) << 1)
+#define FIELD_S_u7(word) (FIELD((word), 0, 4) << 2)
+#define FIELD_S_u10(word) (FIELD((word), 0, 7) << 2)
+#define FIELD_S_s7(word) sign_extend(FIELD((word), 0, 5) << 1, 9)
+#define FIELD_S_s8(word) sign_extend(FIELD((word), 0, 7) << 1, 9)
+#define FIELD_S_s9(word) sign_extend(FIELD((word), 0, 8), 9)
+#define FIELD_S_s10(word) sign_extend(FIELD((word), 0, 8) << 1, 10)
+#define FIELD_S_s11(word) sign_extend(FIELD((word), 0, 8) << 2, 11)
+#define FIELD_S_s13(word) sign_extend(FIELD((word), 0, 10) << 2, 13)

#define STATUS32_L 0x00000100
#define REG_LIMM 62
diff --git a/arch/arc/kernel/disasm.c b/arch/arc/kernel/disasm.c
index ccc7e8c39eb3..926b67c40346 100644
--- a/arch/arc/kernel/disasm.c
+++ b/arch/arc/kernel/disasm.c
@@ -100,12 +100,12 @@ void __kprobes disasm_instr(unsigned long addr, struct disasm_state *state,

case op_LD: /* LD<zz> a,[b,s9] */
state->write = 0;
- state->di = BITS(state->words[0], 11, 11);
+ state->di = FIELD(state->words[0], 11, 11);
if (state->di)
break;
- state->x = BITS(state->words[0], 6, 6);
- state->zz = BITS(state->words[0], 7, 8);
- state->aa = BITS(state->words[0], 9, 10);
+ state->x = FIELD(state->words[0], 6, 6);
+ state->zz = FIELD(state->words[0], 7, 8);
+ state->aa = FIELD(state->words[0], 9, 10);
state->wb_reg = FIELD_B(state->words[0]);
if (state->wb_reg == REG_LIMM) {
state->instr_len += 4;
@@ -121,11 +121,11 @@ void __kprobes disasm_instr(unsigned long addr, struct disasm_state *state,

case op_ST:
state->write = 1;
- state->di = BITS(state->words[0], 5, 5);
+ state->di = FIELD(state->words[0], 5, 5);
if (state->di)
break;
- state->aa = BITS(state->words[0], 3, 4);
- state->zz = BITS(state->words[0], 1, 2);
+ state->aa = FIELD(state->words[0], 3, 4);
+ state->zz = FIELD(state->words[0], 1, 2);
state->src1 = FIELD_C(state->words[0]);
if (state->src1 == REG_LIMM) {
state->instr_len += 4;
@@ -160,7 +160,7 @@ void __kprobes disasm_instr(unsigned long addr, struct disasm_state *state,
is_linked = 1;

fieldCisReg = 0;
- op_format = BITS(state->words[0], 22, 23);
+ op_format = FIELD(state->words[0], 22, 23);
if (op_format == 0 || ((op_format == 3) &&
(!IS_BIT(state->words[0], 5)))) {
fieldC = FIELD_C(state->words[0]);
@@ -192,7 +192,7 @@ void __kprobes disasm_instr(unsigned long addr, struct disasm_state *state,
break;

case 40: /* LPcc */
- if (BITS(state->words[0], 22, 23) == 3) {
+ if (FIELD(state->words[0], 22, 23) == 3) {
/* Conditional LPcc u7 */
fieldC = FIELD_C(state->words[0]);

@@ -207,12 +207,12 @@ void __kprobes disasm_instr(unsigned long addr, struct disasm_state *state,
break;

case 48 ... 55: /* LD a,[b,c] */
- state->di = BITS(state->words[0], 15, 15);
+ state->di = FIELD(state->words[0], 15, 15);
if (state->di)
break;
- state->x = BITS(state->words[0], 16, 16);
- state->zz = BITS(state->words[0], 17, 18);
- state->aa = BITS(state->words[0], 22, 23);
+ state->x = FIELD(state->words[0], 16, 16);
+ state->zz = FIELD(state->words[0], 17, 18);
+ state->aa = FIELD(state->words[0], 22, 23);
state->wb_reg = FIELD_B(state->words[0]);
if (state->wb_reg == REG_LIMM) {
state->instr_len += 4;
@@ -237,7 +237,7 @@ void __kprobes disasm_instr(unsigned long addr, struct disasm_state *state,
case 10: /* MOV */
/* still need to check for limm to extract instr len */
/* MOV is special case because it only takes 2 args */
- switch (BITS(state->words[0], 22, 23)) {
+ switch (FIELD(state->words[0], 22, 23)) {
case 0: /* OP a,b,c */
if (FIELD_C(state->words[0]) == REG_LIMM)
state->instr_len += 4;
@@ -258,7 +258,7 @@ void __kprobes disasm_instr(unsigned long addr, struct disasm_state *state,
default:
/* Not a Load, Jump or Loop instruction */
/* still need to check for limm to extract instr len */
- switch (BITS(state->words[0], 22, 23)) {
+ switch (FIELD(state->words[0], 22, 23)) {
case 0: /* OP a,b,c */
if ((FIELD_B(state->words[0]) == REG_LIMM) ||
(FIELD_C(state->words[0]) == REG_LIMM))
@@ -281,7 +281,7 @@ void __kprobes disasm_instr(unsigned long addr, struct disasm_state *state,

/* 16 Bit Instructions */
case op_LD_ADD: /* LD_S|LDB_S|LDW_S a,[b,c] */
- state->zz = BITS(state->words[0], 3, 4);
+ state->zz = FIELD(state->words[0], 3, 4);
state->src1 = get_reg(FIELD_S_B(state->words[0]), regs, cregs);
state->src2 = get_reg(FIELD_S_C(state->words[0]), regs, cregs);
state->dest = FIELD_S_A(state->words[0]);
@@ -289,13 +289,13 @@ void __kprobes disasm_instr(unsigned long addr, struct disasm_state *state,

case op_ADD_MOV_CMP:
/* check for limm, ignore mov_s h,b (== mov_s 0,b) */
- if ((BITS(state->words[0], 3, 4) < 3) &&
+ if ((FIELD(state->words[0], 3, 4) < 3) &&
(FIELD_S_H(state->words[0]) == REG_LIMM))
state->instr_len += 4;
break;

case op_S:
- subopcode = BITS(state->words[0], 5, 7);
+ subopcode = FIELD(state->words[0], 5, 7);
switch (subopcode) {
case 0: /* j_s */
case 1: /* j_s.d */
@@ -308,7 +308,7 @@ void __kprobes disasm_instr(unsigned long addr, struct disasm_state *state,
direct_call : indirect_jump;
break;
case 7:
- switch (BITS(state->words[0], 8, 10)) {
+ switch (FIELD(state->words[0], 8, 10)) {
case 4: /* jeq_s [blink] */
case 5: /* jne_s [blink] */
case 6: /* j_s [blink] */
@@ -367,8 +367,8 @@ void __kprobes disasm_instr(unsigned long addr, struct disasm_state *state,
/* note: we are ignoring possibility of:
* ADD_S, SUB_S, PUSH_S, POP_S as these should not
* cause unaligned exception anyway */
- state->write = BITS(state->words[0], 6, 6);
- state->zz = BITS(state->words[0], 5, 5);
+ state->write = FIELD(state->words[0], 6, 6);
+ state->zz = FIELD(state->words[0], 5, 5);
if (state->zz)
break; /* byte accesses should not come here */
if (!state->write) {
@@ -385,7 +385,7 @@ void __kprobes disasm_instr(unsigned long addr, struct disasm_state *state,

case op_GP: /* LD_S|LDB_S|LDW_S r0,[gp,s11/s9/s10] */
/* note: ADD_S r0, gp, s11 is ignored */
- state->zz = BITS(state->words[0], 9, 10);
+ state->zz = FIELD(state->words[0], 9, 10);
state->src1 = get_reg(26, regs, cregs);
state->src2 = state->zz ? FIELD_S_s10(state->words[0]) :
FIELD_S_s11(state->words[0]);
@@ -405,7 +405,7 @@ void __kprobes disasm_instr(unsigned long addr, struct disasm_state *state,
break;

case op_B_S:
- fieldA = (BITS(state->words[0], 9, 10) == 3) ?
+ fieldA = (FIELD(state->words[0], 9, 10) == 3) ?
FIELD_S_s7(state->words[0]) :
FIELD_S_s10(state->words[0]);
state->target = fieldA + (addr & ~0x03);
--
2.43.0