Re: [PATCH v2 2/2] vfio/type1: Set IOMMU_MMIO in dma->prot for MMIO-backed addresses

[Jason Gunthorpe <jgg@nvidia.com>]

On Fri, Nov 07, 2025 at 01:59:00PM -0600, Tom Lendacky wrote:
> On 11/7/25 12:32, Jason Gunthorpe wrote:
> > On Fri, Nov 07, 2025 at 11:56:51AM -0600, Tom Lendacky wrote:
> > 
> >> When you are on bare-metal, or in the hypervisor, System Memory Encryption
> >> (SME) deals with the encryption bit set in the page table entries
> >> (including the nested page table entries for guests). 
> > 
> > So "decrypted" means something about AMD's unique memory encryption
> > scheme on bare metal but in a CC guest it is a cross arch 'shared with
> > hypervisor' flag?
> 
> Note, that if the encryption bit is not set in the guest, then the host
> encryption key is used if the underlying NPT leaf entry has the encryption
> bit set. In that case, both the host and guest can read the memory, with
> the memory still being encrypted in physical memory.

Sure, so in the guest it is simple a 'shared with hypervisor' flag and
does not directly indicate if the memory controller did encryption or
not.

> > What about CXL memory? What about ZONE_DEVICE coherent memory? Do
> > these get the C bit set too?
> 
> When CXL memory is presented as system memory to the OS it does support
> the encryption bit. So when pages are allocated for the guest, the memory
> pages will be encrypted with the guest key.
> 
> Not sure what you mean by ZONE_DEVICE coherent memory. Is it presented to
> the system as system physical memory that the hypervisor can allocate as
> guest memory?

This is an option for CXL memory on CXL type 2 devices - ie GPU
memory. It is coherent but it is managed by a driver not by the core
OS as system memory.

> There was a patch series submitted a while back to allocate the IOMMU
> buffers in shared memory in order to support a (non-secure) vIOMMU in the
> guest in order to support >255 vCPUs, but that was rejected in favor of
> using kvm-msi-ext-dest-id.

Yes, but that was incomplete, it only did the data structures and only
really worked for interrupt remapping. It left the actual iommu
broken since we don't clear the C bit on swiotlb.
 
Jason