Re: [PATCH v5 13/14] iommu/amd: Refactor logic to program the host page table in DTE

[Jason Gunthorpe <jgg@nvidia.com>]

On Thu, Nov 13, 2025 at 01:29:39PM -0800, Nicolin Chen wrote:
> On Thu, Nov 13, 2025 at 01:19:16PM -0800, Nicolin Chen wrote:
> > On Wed, Nov 12, 2025 at 06:25:05PM +0000, Suravee Suthikulpanit wrote:
> > >  	else {
> > > @@ -2097,35 +2115,29 @@ static void set_dte_entry(struct amd_iommu *iommu,
> > >  						       &pt_info);
> > >  			}
> > >  
> > > -			new.data[0] |= __sme_set(pt_info.host_pt_root) |
> > > -				       (pt_info.mode & DEV_ENTRY_MODE_MASK)
> > > -					       << DEV_ENTRY_MODE_SHIFT;
> > > +			pt_info.host_pt_root = __sme_set(pt_info.host_pt_root);
> > >  		}
> > >  	}
> > 
> > And this __IOMMU_DOMAIN_PAGING path seems to be used by v1 only.
> > So, it could be squashed into amd_iommu_set_dte_v1(). This could
> > tidy set_dte_entry() further.
> 
> Having looked at PATCH-14, I realized that amd_iommu_set_dte_v1()
> is shared with the nesting pathway.
> 
> So perhaps:
> 	else if (domain->domain.type & __IOMMU_DOMAIN_PAGING &&
> 		 domain->pd_mode == PD_MODE_V1) {
> 		struct pt_iommu_amdv1_hw_info pt_info;
> 
> 		....; // <--move here
> 		amd_iommu_set_dte_v1(dev_data, domain, domid, &pt_info, &new)
> 	} else

Even so it should be called from the set functions and the set
functions should sort it out, if another helper is needed to share
with nesting then fine, but you might also just have nesting call the
set_dte_v1 to start and then modify in the gcr3 table..

Jason