From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8CEF25464D for ; Wed, 19 Nov 2025 04:18:15 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=213.167.242.64 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1763525897; cv=none; b=le2lvNLVdrDtKDNbZGKPvGhzA59UtFSCpc+jLu9H7/ELYIBs4/uzN0EaMu/9olJIFm9emx4U5Jc6jUx/eOIndkIgm0kCoESOqRQhq/3XW4EvA6u/dXjcLwlgXpoDzxx4nIbOjD7DFxfUHU6EJXZUVGNeohA0xvA34we+hU/UtP8= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1763525897; c=relaxed/simple; bh=Co0SQdTL8Op1neOiTCduNOiGp6gu3Kt8Xc6qs6rJnZw=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=ghbh+BA/b2eYxfsR1oMepiwa7XTIJlG43OGtn0k2cFBojHyYxd1NxdRz4uLPeGnMWU3PnbBcUiwKgr4yphWTU10Wy1AIhcIGXhu8xP20IUz4e2vDxvBe0m+RMgDY3i7JLuEdSURHHRiQ3CsRph+l+YCmjcEBb2XRZGnfAWQGAB8= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=ideasonboard.com; spf=pass smtp.mailfrom=ideasonboard.com; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b=Avztu/6T; arc=none smtp.client-ip=213.167.242.64 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=ideasonboard.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ideasonboard.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b="Avztu/6T" Received: from pendragon.ideasonboard.com (unknown [205.220.129.225]) by perceval.ideasonboard.com (Postfix) with UTF8SMTPSA id 08E8FDD9; Wed, 19 Nov 2025 05:16:08 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1763525770; bh=Co0SQdTL8Op1neOiTCduNOiGp6gu3Kt8Xc6qs6rJnZw=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=Avztu/6TS5bq2e/sK12229OUVbG1IkQ3SJlt5Fqo3xPeyTSpPD8yNyN0X5siBD4en mW9jba6o5mX6EH5BjkWy76EjvT/FJ7O1k2YlK4EJ66NWd3pc5/gguO1iuq6F8EhpQ/ g24tg3xmkJxc5vkin6RTxvPBT08bdLkKnWYztSDE= Date: Wed, 19 Nov 2025 13:17:47 +0900 From: Laurent Pinchart To: Nicolas Frattaroli Cc: Harry Wentland , Leo Li , Rodrigo Siqueira , Alex Deucher , Christian =?utf-8?B?S8O2bmln?= , David Airlie , Simona Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Andrzej Hajda , Neil Armstrong , Robert Foss , Jonas Karlman , Jernej Skrabec , Sandy Huang , Heiko =?utf-8?Q?St=C3=BCbner?= , Andy Yan , Jani Nikula , Rodrigo Vivi , Joonas Lahtinen , Tvrtko Ursulin , kernel@collabora.com, amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Subject: Re: [PATCH v4 06/10] drm/rockchip: dw_hdmi_qp: Set supported_formats platdata Message-ID: <20251119041747.GF10711@pendragon.ideasonboard.com> References: <20251117-color-format-v4-0-0ded72bd1b00@collabora.com> <20251117-color-format-v4-6-0ded72bd1b00@collabora.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <20251117-color-format-v4-6-0ded72bd1b00@collabora.com> On Mon, Nov 17, 2025 at 08:11:50PM +0100, Nicolas Frattaroli wrote: > With the introduction of the supported_formats member in the > dw-hdmi-qp platform data struct, drivers that have access to this > information should now set it. > > Set it in the rockchip dw_hdmi_qp glue driver, where such a bitmask of > supported color formats already exists. It just needs to be converted to > the appropriate HDMI_COLORSPACE_ mask. > > This allows this information to be passed down to the dw-hdmi-qp core, > which sets it in the bridge it creates, and consequently will allow the > common HDMI bridge code to act on it. > > Signed-off-by: Nicolas Frattaroli > --- > drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c | 24 ++++++++++++++++++++++++ > 1 file changed, 24 insertions(+) > > diff --git a/drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c > index c9fe6aa3e3e3..7c294751de19 100644 > --- a/drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c > +++ b/drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c > @@ -468,6 +468,28 @@ static const struct of_device_id dw_hdmi_qp_rockchip_dt_ids[] = { > }; > MODULE_DEVICE_TABLE(of, dw_hdmi_qp_rockchip_dt_ids); > > +static const u32 supported_colorformats = DRM_COLOR_FORMAT_AUTO | > + DRM_COLOR_FORMAT_RGB444 | > + DRM_COLOR_FORMAT_YCBCR444; > + > +static unsigned int __pure drm_to_hdmi_fmts(const u32 fmt) > +{ > + unsigned int res = 0; > + > + if (fmt & DRM_COLOR_FORMAT_AUTO) > + res |= BIT(HDMI_COLORSPACE_RGB); > + if (fmt & DRM_COLOR_FORMAT_RGB444) > + res |= BIT(HDMI_COLORSPACE_RGB); > + if (fmt & DRM_COLOR_FORMAT_YCBCR444) > + res |= BIT(HDMI_COLORSPACE_YUV444); > + if (fmt & DRM_COLOR_FORMAT_YCBCR422) > + res |= BIT(HDMI_COLORSPACE_YUV422); > + if (fmt & DRM_COLOR_FORMAT_YCBCR420) > + res |= BIT(HDMI_COLORSPACE_YUV420); > + > + return res; > +} > + This would be greatly simplified by turning supported_formats into a bitmask of DRM_MODE_COLOR_FORMAT_* values, as suggested in 05/10. > static int dw_hdmi_qp_rockchip_bind(struct device *dev, struct device *master, > void *data) > { > @@ -521,6 +543,8 @@ static int dw_hdmi_qp_rockchip_bind(struct device *dev, struct device *master, > plat_data.phy_data = hdmi; > plat_data.max_bpc = 10; > > + plat_data.supported_formats = drm_to_hdmi_fmts(supported_colorformats); > + > encoder = &hdmi->encoder.encoder; > encoder->possible_crtcs = drm_of_find_possible_crtcs(drm, dev->of_node); > -- Regards, Laurent Pinchart