Re: [PATCH v4 6/9] cxl/region: Add register_dax flag to defer DAX setup

Koralahalli Channabasappa, Smita
2025-11-20T18:17:21Z

On 11/19/2025 7:19 PM, Smita Koralahalli wrote:
> Stop creating cxl_dax during cxl_region_probe(). Early DAX registration
> can online memory before ownership of Soft Reserved ranges is finalized.
> This makes it difficult to tear down regions later when HMEM determines
> that a region should not claim that range.
>
> Introduce a register_dax flag in struct cxl_region_params and gate DAX
> registration on this flag. Leave probe time registration disabled for
> regions discovered during early CXL enumeration; set the flag only for
> regions created dynamically at runtime to preserve existing behaviour.
>
> This patch prepares the region code for later changes where cxl_dax
> setup occurs from the HMEM path only after ownership arbitration
> completes.
>
> Signed-off-by: Smita Koralahalli <Smita.KoralahalliChannabasappa@amd.com>
> ---
> drivers/cxl/core/region.c | 21 ++++++++++++++++-----
> drivers/cxl/cxl.h | 1 +
> 2 files changed, 17 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/cxl/core/region.c b/drivers/cxl/core/region.c
> index 94dbbd6b5513..c17cd8706b9d 100644
> --- a/drivers/cxl/core/region.c
> +++ b/drivers/cxl/core/region.c
> @@ -2540,9 +2540,11 @@ static int cxl_region_calculate_adistance(struct notifier_block *nb,
> static struct cxl_region *devm_cxl_add_region(struct cxl_root_decoder *cxlrd,
> int id,
> enum cxl_partition_mode mode,
> - enum cxl_decoder_type type)
> + enum cxl_decoder_type type,
> + bool register_dax)
> {
> struct cxl_port *port = to_cxl_port(cxlrd->cxlsd.cxld.dev.parent);
> + struct cxl_region_params *p;
> struct cxl_region *cxlr;
> struct device *dev;
> int rc;
> @@ -2553,6 +2555,9 @@ static struct cxl_region *devm_cxl_add_region(struct cxl_root_decoder *cxlrd,
> cxlr->mode = mode;
> cxlr->type = type;
>
> + p = &cxlr->params;
> + p->register_dax = register_dax;
> +
> dev = &cxlr->dev;
> rc = dev_set_name(dev, "region%d", id);
> if (rc)
> @@ -2593,7 +2598,8 @@ static ssize_t create_ram_region_show(struct device *dev,
> }
>
> static struct cxl_region *__create_region(struct cxl_root_decoder *cxlrd,
> - enum cxl_partition_mode mode, int id)
> + enum cxl_partition_mode mode, int id,
> + bool register_dax)
> {
> int rc;
>
> @@ -2615,7 +2621,8 @@ static struct cxl_region *__create_region(struct cxl_root_decoder *cxlrd,
> return ERR_PTR(-EBUSY);
> }
>
> - return devm_cxl_add_region(cxlrd, id, mode, CXL_DECODER_HOSTONLYMEM);
> + return devm_cxl_add_region(cxlrd, id, mode, CXL_DECODER_HOSTONLYMEM,
> + register_dax);
> }
>
> static ssize_t create_region_store(struct device *dev, const char *buf,
> @@ -2629,7 +2636,7 @@ static ssize_t create_region_store(struct device *dev, const char *buf,
> if (rc != 1)
> return -EINVAL;
>
> - cxlr = __create_region(cxlrd, mode, id);
> + cxlr = __create_region(cxlrd, mode, id, true);
> if (IS_ERR(cxlr))
> return PTR_ERR(cxlr);
>
> @@ -3523,7 +3530,7 @@ static struct cxl_region *construct_region(struct cxl_root_decoder *cxlrd,
>
> do {
> cxlr = __create_region(cxlrd, cxlds->part[part].mode,
> - atomic_read(&cxlrd->region_id));
> + atomic_read(&cxlrd->region_id), false);
> } while (IS_ERR(cxlr) && PTR_ERR(cxlr) == -EBUSY);
>
> if (IS_ERR(cxlr)) {
> @@ -3930,6 +3937,10 @@ static int cxl_region_probe(struct device *dev)
> p->res->start, p->res->end, cxlr,
> is_system_ram) > 0)
> return 0;
> +
> + if (!p->register_dax)
> + return 0;

Sorry, I missed this. It should continue registering DAX if HMEM is
disabled. I will fix this in v5 and add a comment here

- if (!p->register_dax)
- return 0;
+ /*
+ * Only skip probe time DAX if HMEM will handle it
+ * later.
+ */
+ if (IS_ENABLED(CONFIG_DEV_DAX_HMEM) && !p->register_dax)
+ return 0;
> +
> return devm_cxl_add_dax_region(cxlr);
> default:
> dev_dbg(&cxlr->dev, "unsupported region mode: %d\n",
> diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h
> index af78c9fd37f2..324220596890 100644
> --- a/drivers/cxl/cxl.h
> +++ b/drivers/cxl/cxl.h
> @@ -495,6 +495,7 @@ struct cxl_region_params {
> struct cxl_endpoint_decoder *targets[CXL_DECODER_MAX_INTERLEAVE];
> int nr_targets;
> resource_size_t cache_size;
> + bool register_dax;
> };
>
> enum cxl_partition_mode {