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From: Leo Yan <leo.yan@arm.com>
To: Kuan-Wei Chiu <visitorckw@gmail.com>
Cc: James Clark <james.clark@linaro.org>,
	Mike Leach <mike.leach@linaro.org>,
	suzuki.poulose@arm.com, alexander.shishkin@linux.intel.com,
	pratikp@codeaurora.org, mathieu.poirier@linaro.org,
	gregkh@linuxfoundation.org, jserv@ccns.ncku.edu.tw,
	marscheng@google.com, ericchancf@google.com,
	milesjiang@google.com, nickpan@google.com,
	coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH] coresight: etm3x: Fix buffer overwrite in cntr_val_show()
Date: Thu, 27 Nov 2025 09:22:31 +0000	[thread overview]
Message-ID: <20251127092231.GN724103@e132581.arm.com> (raw)
In-Reply-To: <aSgPhd4u3Oqi3Ymy@google.com>

On Thu, Nov 27, 2025 at 04:44:53PM +0800, Kuan-Wei Chiu wrote:

[...]

> I don't feel it is my place to say whether the etm3x driver should be
> removed entirely.

Sorry for confusion.  Your fix patch is welcome, this is useful no
matter if remove the ETMv3 driver or not.

> However, if we decide to keep it, I agree that aligning cntr_val_show
> with the cntr_val_store behavior (using cntr_idx) makes more sense.
> 
> Here is my plan for v2:
> 
> diff --git a/drivers/hwtracing/coresight/coresight-etm3x-sysfs.c b/drivers/hwtracing/coresight/coresight-etm3x-sysfs.c
> index 762109307b86..77578885e8f3 100644
> --- a/drivers/hwtracing/coresight/coresight-etm3x-sysfs.c
> +++ b/drivers/hwtracing/coresight/coresight-etm3x-sysfs.c
> @@ -717,26 +717,19 @@ static DEVICE_ATTR_RW(cntr_rld_event);
>  static ssize_t cntr_val_show(struct device *dev,
>  			     struct device_attribute *attr, char *buf)
>  {
> -	int i, ret = 0;
>  	u32 val;
>  	struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent);
>  	struct etm_config *config = &drvdata->config;
>  
>  	if (!coresight_get_mode(drvdata->csdev)) {
>  		spin_lock(&drvdata->spinlock);
> -		for (i = 0; i < drvdata->nr_cntr; i++)
> -			ret += sprintf(buf, "counter %d: %x\n",
> -				       i, config->cntr_val[i]);
> +		val = config->cntr_val[config->cntr_idx];
>  		spin_unlock(&drvdata->spinlock);
> -		return ret;
> -	}
> -
> -	for (i = 0; i < drvdata->nr_cntr; i++) {
> -		val = etm_readl(drvdata, ETMCNTVRn(i));
> -		ret += sprintf(buf, "counter %d: %x\n", i, val);
> +		return sprintf(buf, "%x\n", val);
>  	}
>  
> -	return ret;
> +	val = etm_readl(drvdata, ETMCNTVRn(config->cntr_idx));

It is not right to read register at here (it cannot promise to read the
CPU (cp14) register on the target CPU).

Please refer to the same function in coresight-etm4x-sysfs.c. I think
we can do the same thing at here.

> +	return sprintf(buf, "%x\n", val);
>  }
>  
>  static ssize_t cntr_val_store(struct device *dev,
> 
> 
> Given the upcoming merge window, I plan to submit this v2 after -rc1
> is released.
> 
> Alternatively, if the consensus is to drop the driver, I am happy to
> submit a patch for that instead.

Please continue this patch.  Thanks a lot!

Leo

  parent reply	other threads:[~2025-11-27  9:22 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-11-21  0:23 [PATCH] coresight: etm3x: Fix buffer overwrite in cntr_val_show() Kuan-Wei Chiu
2025-11-21  9:50 ` James Clark
2025-11-21 17:02   ` Kuan-Wei Chiu
2025-11-24 16:12     ` James Clark
2025-11-26 10:49       ` Mike Leach
2025-11-26 10:57         ` James Clark
2025-11-27  8:44           ` Kuan-Wei Chiu
2025-11-27  9:17             ` James Clark
2025-11-27  9:22             ` Leo Yan [this message]
2025-11-27  9:30               ` James Clark
2025-11-27  9:57                 ` Leo Yan
2025-11-27 14:30                 ` Mike Leach
2025-11-26 12:09 ` Leo Yan
2025-11-26 12:11   ` James Clark
2025-11-26 12:31     ` Leo Yan
2025-11-26 13:42       ` Mike Leach
2025-11-26 15:33         ` James Clark
2025-11-26 16:14           ` Mike Leach
2025-11-27  9:29             ` Leo Yan
2025-11-28 14:53               ` James Clark
2025-11-28 15:14                 ` Al Grant

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