From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 21F80320CC9 for ; Thu, 27 Nov 2025 09:57:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764237427; cv=none; b=ctE1hpSue1RB0JnWvBim8zObvs6jSg93qN1janD7IgSn/of37lizNdNvBEb4JepKW0aFD5iCo8Cn4/CuuVQtrM4r/XddNoxe7xiXkECEhL3iBQTd3ccr0UScPFM3UcMjEpyjOyuI0fTqf0LP+jtuT1TLDHaGrIoG30jv/Rw7rYY= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764237427; c=relaxed/simple; bh=f/iN/VF8spGPnIwLaXPrzPHGcJefUctpKdIw3AEMm7s=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=O3f2/INBdKauj8x4VoWshvXtuzfhTa/gIazzgY/inl7L6vI+GzFAK37NPOVqHUBHYGZOn+5QEf56Xg8RKaf8hdnrNr/dvQHTC31KJpdaNhVgT+jzajnFM44QRQ12dYGxjhyKAPulgFkdUx42znvUF4xzBuuEkg78uf+CZmOWxBI= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 0AF271477; Thu, 27 Nov 2025 01:56:57 -0800 (PST) Received: from localhost (e132581.arm.com [10.1.196.87]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 1A7DA3F6A8; Thu, 27 Nov 2025 01:57:03 -0800 (PST) Date: Thu, 27 Nov 2025 09:57:02 +0000 From: Leo Yan To: James Clark Cc: Kuan-Wei Chiu , Mike Leach , suzuki.poulose@arm.com, alexander.shishkin@linux.intel.com, pratikp@codeaurora.org, mathieu.poirier@linaro.org, gregkh@linuxfoundation.org, jserv@ccns.ncku.edu.tw, marscheng@google.com, ericchancf@google.com, milesjiang@google.com, nickpan@google.com, coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH] coresight: etm3x: Fix buffer overwrite in cntr_val_show() Message-ID: <20251127095702.GP724103@e132581.arm.com> References: <20251121002350.1166758-1-visitorckw@gmail.com> <172ca2d9-4a6f-4498-bdfd-8aa7428581ce@linaro.org> <05babb6d-a588-49f8-a34a-c82d5f58adf5@linaro.org> <68efd5a2-3b65-4f37-9bf0-40c4e5ade480@linaro.org> <20251127092231.GN724103@e132581.arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: On Thu, Nov 27, 2025 at 09:30:28AM +0000, James Clark wrote: [...] > > > - for (i = 0; i < drvdata->nr_cntr; i++) { > > > - val = etm_readl(drvdata, ETMCNTVRn(i)); > > > - ret += sprintf(buf, "counter %d: %x\n", i, val); > > > + return sprintf(buf, "%x\n", val); > > > } > > > - return ret; > > > + val = etm_readl(drvdata, ETMCNTVRn(config->cntr_idx)); > > > > It is not right to read register at here (it cannot promise to read the > > CPU (cp14) register on the target CPU). > > > > Please refer to the same function in coresight-etm4x-sysfs.c. I think > > we can do the same thing at here. > > > > That's a different fix than the display bug though. This change doesn't > change that if it's already wrong. The display fix should go in alone and > then if there is an issue with not running things on the right CPU that > should go in separately. Makes sense. So the pasted change is fine for me. Thanks for correcting!