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From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
To: Prajna Rajendra Kumar <prajna.rajendrakumar@microchip.com>,
	Mark Brown <broonie@kernel.org>,
	Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
	linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: [PATCH v4 1/2] spi: microchip-core: Refactor FIFO read and write handlers
Date: Fri, 28 Nov 2025 19:52:39 +0100	[thread overview]
Message-ID: <20251128185518.3989250-2-andriy.shevchenko@linux.intel.com> (raw)
In-Reply-To: <20251128185518.3989250-1-andriy.shevchenko@linux.intel.com>

Make both handlers to be shorter and easier to understand.
While at it, unify their style.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Prajna Rajendra Kumar <prajna.rajendrakumar@microchip.com>
---
 drivers/spi/spi-microchip-core-spi.c | 31 +++++++++++-----------------
 1 file changed, 12 insertions(+), 19 deletions(-)

diff --git a/drivers/spi/spi-microchip-core-spi.c b/drivers/spi/spi-microchip-core-spi.c
index 892f066f0074..98bf0e6cd00e 100644
--- a/drivers/spi/spi-microchip-core-spi.c
+++ b/drivers/spi/spi-microchip-core-spi.c
@@ -97,15 +97,12 @@ static inline void mchp_corespi_read_fifo(struct mchp_corespi *spi, u32 fifo_max
 		       MCHP_CORESPI_STATUS_RXFIFO_EMPTY)
 			;
 
+		/* On TX-only transfers always perform a dummy read */
 		data = readb(spi->regs + MCHP_CORESPI_REG_RXDATA);
+		if (spi->rx_buf)
+			*spi->rx_buf++ = data;
 
 		spi->rx_len--;
-		if (!spi->rx_buf)
-			continue;
-
-		*spi->rx_buf = data;
-
-		spi->rx_buf++;
 	}
 }
 
@@ -127,23 +124,19 @@ static void mchp_corespi_disable_ints(struct mchp_corespi *spi)
 
 static inline void mchp_corespi_write_fifo(struct mchp_corespi *spi, u32 fifo_max)
 {
-	int i = 0;
-
-	while ((i < fifo_max) &&
-	       !(readb(spi->regs + MCHP_CORESPI_REG_STAT) &
-		 MCHP_CORESPI_STATUS_TXFIFO_FULL)) {
-		u32 word;
-
-		word = spi->tx_buf ? *spi->tx_buf : 0xaa;
-		writeb(word, spi->regs + MCHP_CORESPI_REG_TXDATA);
+	for (int i = 0; i < fifo_max; i++) {
+		if (readb(spi->regs + MCHP_CORESPI_REG_STAT) &
+		    MCHP_CORESPI_STATUS_TXFIFO_FULL)
+			break;
 
+		/* On RX-only transfers always perform a dummy write */
 		if (spi->tx_buf)
-			spi->tx_buf++;
+			writeb(*spi->tx_buf++, spi->regs + MCHP_CORESPI_REG_TXDATA);
+		else
+			writeb(0xaa, spi->regs + MCHP_CORESPI_REG_TXDATA);
 
-		i++;
+		spi->tx_len--;
 	}
-
-	spi->tx_len -= i;
 }
 
 static void mchp_corespi_set_cs(struct spi_device *spi, bool disable)
-- 
2.50.1


  reply	other threads:[~2025-11-28 18:55 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-11-28 18:52 [PATCH v4 0/2] spi: microchip-core: Code improvements (part 2) Andy Shevchenko
2025-11-28 18:52 ` Andy Shevchenko [this message]
2025-11-28 18:52 ` [PATCH v4 2/2] spi: microchip-core: use XOR instead of ANDNOT to simplify the logic Andy Shevchenko
2025-11-28 19:30   ` Jonas Gorski
2025-11-29  8:19     ` Andy Shevchenko
2025-12-01 16:08       ` Conor Dooley
2025-12-01 17:57         ` Andy Shevchenko
2026-01-08 13:00           ` Prajna Rajendra Kumar
2026-01-08 17:53             ` Andy Shevchenko

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