From: Kevin Cheng <chengkev@google.com>
To: seanjc@google.com, pbonzini@redhat.com
Cc: jmattson@google.com, yosry.ahmed@linux.dev, kvm@vger.kernel.org,
linux-kernel@vger.kernel.org, Kevin Cheng <chengkev@google.com>
Subject: [PATCH] KVM: SVM: Don't allow L1 intercepts for instructions not advertised
Date: Fri, 5 Dec 2025 07:06:30 +0000 [thread overview]
Message-ID: <20251205070630.4013452-1-chengkev@google.com> (raw)
If a feature is not advertised in the guest's CPUID, prevent L1 from
intercepting the unsupported instructions by clearing the corresponding
intercept in KVM's cached vmcb12.
When an L2 guest executes an instruction that is not advertised to L1,
we expect a #UD exception to be injected by L0. However, the nested svm
exit handler first checks if the instruction intercept is set in vmcb12,
and if so, synthesizes an exit from L2 to L1 instead of a #UD exception.
If a feature is not advertised, the L1 intercept should be ignored.
Calculate the nested intercept mask by checking all instructions that
can be intercepted and are controlled by a CPUID bit. Use this mask when
copying from the vmcb12 to KVM's cached vmcb12 to effectively ignore the
intercept on nested vm exit handling.
Another option is to handle ignoring the L1 intercepts in the nested vm
exit code path, but I've gone with modifying the cached vmcb12 to keep
it simpler.
Signed-off-by: Kevin Cheng <chengkev@google.com>
---
arch/x86/kvm/svm/nested.c | 30 +++++++++++++++++++++++++++++-
arch/x86/kvm/svm/svm.c | 2 ++
arch/x86/kvm/svm/svm.h | 14 ++++++++++++++
3 files changed, 45 insertions(+), 1 deletion(-)
diff --git a/arch/x86/kvm/svm/nested.c b/arch/x86/kvm/svm/nested.c
index c81005b245222..f2ade24908b39 100644
--- a/arch/x86/kvm/svm/nested.c
+++ b/arch/x86/kvm/svm/nested.c
@@ -184,6 +184,33 @@ void recalc_intercepts(struct vcpu_svm *svm)
}
}
+/*
+ * If a feature is not advertised to L1, set the mask bit for the corresponding
+ * vmcb12 intercept.
+ */
+void svm_recalc_nested_intercepts_mask(struct kvm_vcpu *vcpu)
+{
+ struct vcpu_svm *svm = to_svm(vcpu);
+
+ memset(svm->nested.nested_intercept_mask, 0,
+ sizeof(svm->nested.nested_intercept_mask));
+
+ if (!guest_cpu_cap_has(vcpu, X86_FEATURE_RDTSCP))
+ set_nested_intercept_mask(&svm->nested, INTERCEPT_RDTSCP);
+
+ if (!guest_cpu_cap_has(vcpu, X86_FEATURE_SKINIT))
+ set_nested_intercept_mask(&svm->nested, INTERCEPT_SKINIT);
+
+ if (!guest_cpu_cap_has(vcpu, X86_FEATURE_XSAVE))
+ set_nested_intercept_mask(&svm->nested, INTERCEPT_XSETBV);
+
+ if (!guest_cpu_cap_has(vcpu, X86_FEATURE_RDPRU))
+ set_nested_intercept_mask(&svm->nested, INTERCEPT_RDPRU);
+
+ if (!guest_cpu_cap_has(vcpu, X86_FEATURE_INVPCID))
+ set_nested_intercept_mask(&svm->nested, INTERCEPT_INVPCID);
+}
+
/*
* This array (and its actual size) holds the set of offsets (indexing by chunk
* size) to process when merging vmcb12's MSRPM with vmcb01's MSRPM. Note, the
@@ -408,10 +435,11 @@ void __nested_copy_vmcb_control_to_cache(struct kvm_vcpu *vcpu,
struct vmcb_ctrl_area_cached *to,
struct vmcb_control_area *from)
{
+ struct vcpu_svm *svm = to_svm(vcpu);
unsigned int i;
for (i = 0; i < MAX_INTERCEPT; i++)
- to->intercepts[i] = from->intercepts[i];
+ to->intercepts[i] = from->intercepts[i] & ~(svm->nested.nested_intercept_mask[i]);
to->iopm_base_pa = from->iopm_base_pa;
to->msrpm_base_pa = from->msrpm_base_pa;
diff --git a/arch/x86/kvm/svm/svm.c b/arch/x86/kvm/svm/svm.c
index f56c2d895011c..dd02a076077d8 100644
--- a/arch/x86/kvm/svm/svm.c
+++ b/arch/x86/kvm/svm/svm.c
@@ -1011,6 +1011,8 @@ static void svm_recalc_instruction_intercepts(struct kvm_vcpu *vcpu)
svm->vmcb->control.virt_ext |= VIRTUAL_VMLOAD_VMSAVE_ENABLE_MASK;
}
}
+
+ svm_recalc_nested_intercepts_mask(vcpu);
}
static void svm_recalc_intercepts(struct kvm_vcpu *vcpu)
diff --git a/arch/x86/kvm/svm/svm.h b/arch/x86/kvm/svm/svm.h
index 9e151dbdef25d..08779d78c0c27 100644
--- a/arch/x86/kvm/svm/svm.h
+++ b/arch/x86/kvm/svm/svm.h
@@ -217,6 +217,12 @@ struct svm_nested_state {
* on its side.
*/
bool force_msr_bitmap_recalc;
+
+ /*
+ * Reserved bitmask for instruction intercepts that should not be set
+ * by L1 if the feature is not advertised to L1 in guest CPUID.
+ */
+ u32 nested_intercept_mask[MAX_INTERCEPT];
};
struct vcpu_sev_es_state {
@@ -478,6 +484,12 @@ static inline void clr_exception_intercept(struct vcpu_svm *svm, u32 bit)
recalc_intercepts(svm);
}
+static inline void set_nested_intercept_mask(struct svm_nested_state *nested, u32 bit)
+{
+ WARN_ON_ONCE(bit >= 32 * MAX_INTERCEPT);
+ __set_bit(bit, (unsigned long *)&nested->nested_intercept_mask);
+}
+
static inline void svm_set_intercept(struct vcpu_svm *svm, int bit)
{
struct vmcb *vmcb = svm->vmcb01.ptr;
@@ -746,6 +758,8 @@ static inline bool nested_exit_on_nmi(struct vcpu_svm *svm)
return vmcb12_is_intercept(&svm->nested.ctl, INTERCEPT_NMI);
}
+void svm_recalc_nested_intercepts_mask(struct kvm_vcpu *vcpu);
+
int __init nested_svm_init_msrpm_merge_offsets(void);
int enter_svm_guest_mode(struct kvm_vcpu *vcpu,
--
2.52.0.223.gf5cc29aaa4-goog
next reply other threads:[~2025-12-05 7:06 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-12-05 7:06 Kevin Cheng [this message]
2025-12-09 1:12 ` [PATCH] KVM: SVM: Don't allow L1 intercepts for instructions not advertised Yosry Ahmed
2025-12-09 16:52 ` Sean Christopherson
2025-12-13 16:11 ` Kevin Cheng
2025-12-16 16:01 ` Sean Christopherson
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