[PATCH v2 0/3] pic64gx clk kconfig/binding changes

[PATCH v2 0/3] pic64gx clk kconfig/binding changes

[Conor Dooley]

From: Conor Dooley <conor.dooley@microchip.com>

Mostly this is stuff that PH did last year, but rebased on top of
current work, now that the clock driver rework patches have been
applied.

v2: fix the binding, d'oh

CC: Conor Dooley <conor.dooley@microchip.com>
CC: Daire McNamara <daire.mcnamara@microchip.com>
CC: Michael Turquette <mturquette@baylibre.com>
CC: Stephen Boyd <sboyd@kernel.org>
CC: Rob Herring <robh@kernel.org>
CC: Krzysztof Kozlowski <krzk+dt@kernel.org>
CC: Claudiu Beznea <claudiu.beznea@tuxon.dev>
CC: linux-riscv@lists.infradead.org
CC: linux-clk@vger.kernel.org
CC: devicetree@vger.kernel.org

Conor Dooley (1):
  clk: microchip: drop POLARFIRE from ARCH_MICROCHIP_POLARFIRE

Pierre-Henry Moussay (2):
  dt-bindings: clock: mpfs-ccc: Add pic64gx compatibility
  dt-bindings: clock: mpfs-clkcfg: Add pic64gx compatibility

 .../bindings/clock/microchip,mpfs-ccc.yaml       |  6 +++++-
 .../bindings/clock/microchip,mpfs-clkcfg.yaml    | 16 +++++++++++++++-
 drivers/clk/microchip/Kconfig                    |  4 ++--
 3 files changed, 22 insertions(+), 4 deletions(-)

-- 
2.51.0

[PATCH v2 1/3] clk: microchip: drop POLARFIRE from ARCH_MICROCHIP_POLARFIRE

[Conor Dooley]

From: Conor Dooley <conor.dooley@microchip.com>

This driver is used by non-polarfire devices now, and the ARCH_MICROCHIP
symbol has been defined for some time on RISCV so drop it without any
functional change.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
 drivers/clk/microchip/Kconfig | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/clk/microchip/Kconfig b/drivers/clk/microchip/Kconfig
index cab9a909893b..a0ef14310417 100644
--- a/drivers/clk/microchip/Kconfig
+++ b/drivers/clk/microchip/Kconfig
@@ -5,8 +5,8 @@ config COMMON_CLK_PIC32
 
 config MCHP_CLK_MPFS
 	bool "Clk driver for PolarFire SoC"
-	depends on ARCH_MICROCHIP_POLARFIRE || COMPILE_TEST
-	default ARCH_MICROCHIP_POLARFIRE
+	depends on ARCH_MICROCHIP || COMPILE_TEST
+	default y
 	depends on MFD_SYSCON
 	select AUXILIARY_BUS
 	select COMMON_CLK_DIVIDER_REGMAP
-- 
2.51.0

[PATCH v2 2/3] dt-bindings: clock: mpfs-ccc: Add pic64gx compatibility

[Conor Dooley]

From: Pierre-Henry Moussay <pierre-henry.moussay@microchip.com>

pic64gx SoC Clock Conditioning Circuitry is compatibles
with the Polarfire SoC

Signed-off-by: Pierre-Henry Moussay <pierre-henry.moussay@microchip.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
 .../devicetree/bindings/clock/microchip,mpfs-ccc.yaml       | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/clock/microchip,mpfs-ccc.yaml b/Documentation/devicetree/bindings/clock/microchip,mpfs-ccc.yaml
index f1770360798f..9a6b50527c42 100644
--- a/Documentation/devicetree/bindings/clock/microchip,mpfs-ccc.yaml
+++ b/Documentation/devicetree/bindings/clock/microchip,mpfs-ccc.yaml
@@ -17,7 +17,11 @@ description: |
 
 properties:
   compatible:
-    const: microchip,mpfs-ccc
+    oneOf:
+      - items:
+          - const: microchip,pic64gx-ccc
+          - const: microchip,mpfs-ccc
+      - const: microchip,mpfs-ccc
 
   reg:
     items:
-- 
2.51.0

[PATCH v2 3/3] dt-bindings: clock: mpfs-clkcfg: Add pic64gx compatibility

[Conor Dooley]

From: Pierre-Henry Moussay <pierre-henry.moussay@microchip.com>

pic64gx has a clock controller compatible with mpfs-clkcfg. Don't permit
the deprecated configuration that was never supported for this SoC.

Signed-off-by: Pierre-Henry Moussay <pierre-henry.moussay@microchip.com>
Co-developed-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
 .../bindings/clock/microchip,mpfs-clkcfg.yaml    | 16 +++++++++++++++-
 1 file changed, 15 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/clock/microchip,mpfs-clkcfg.yaml b/Documentation/devicetree/bindings/clock/microchip,mpfs-clkcfg.yaml
index ee4f31596d97..a23703c281d1 100644
--- a/Documentation/devicetree/bindings/clock/microchip,mpfs-clkcfg.yaml
+++ b/Documentation/devicetree/bindings/clock/microchip,mpfs-clkcfg.yaml
@@ -19,7 +19,11 @@ description: |
 
 properties:
   compatible:
-    const: microchip,mpfs-clkcfg
+    oneOf:
+      - items:
+          - const: microchip,pic64gx-clkcfg
+          - const: microchip,mpfs-clkcfg
+      - const: microchip,mpfs-clkcfg
 
   reg:
     oneOf:
@@ -69,6 +73,16 @@ required:
   - clocks
   - '#clock-cells'
 
+if:
+  properties:
+    compatible:
+      contains:
+        const: microchip,pic64gx-clkcfg
+then:
+  properties:
+    reg:
+      maxItems: 1
+
 additionalProperties: false
 
 examples:
-- 
2.51.0

Re: [PATCH v2 3/3] dt-bindings: clock: mpfs-clkcfg: Add pic64gx compatibility

[Krzysztof Kozlowski]

On Fri, Nov 21, 2025 at 01:44:02PM +0000, Conor Dooley wrote:
> From: Pierre-Henry Moussay <pierre-henry.moussay@microchip.com>
> 
> pic64gx has a clock controller compatible with mpfs-clkcfg. Don't permit
> the deprecated configuration that was never supported for this SoC.
> 
> Signed-off-by: Pierre-Henry Moussay <pierre-henry.moussay@microchip.com>
> Co-developed-by: Conor Dooley <conor.dooley@microchip.com>
> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
> ---
>  .../bindings/clock/microchip,mpfs-clkcfg.yaml    | 16 +++++++++++++++-
>  1 file changed, 15 insertions(+), 1 deletion(-)

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>

Best regards,
Krzysztof

Re: [PATCH v2 1/3] clk: microchip: drop POLARFIRE from ARCH_MICROCHIP_POLARFIRE

[Claudiu Beznea]

On 11/21/25 15:44, Conor Dooley wrote:
> From: Conor Dooley <conor.dooley@microchip.com>
> 
> This driver is used by non-polarfire devices now, and the ARCH_MICROCHIP
> symbol has been defined for some time on RISCV so drop it without any
> functional change.
> 
> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
> ---
>  drivers/clk/microchip/Kconfig | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/clk/microchip/Kconfig b/drivers/clk/microchip/Kconfig
> index cab9a909893b..a0ef14310417 100644
> --- a/drivers/clk/microchip/Kconfig
> +++ b/drivers/clk/microchip/Kconfig
> @@ -5,8 +5,8 @@ config COMMON_CLK_PIC32
>  
>  config MCHP_CLK_MPFS
>  	bool "Clk driver for PolarFire SoC"
> -	depends on ARCH_MICROCHIP_POLARFIRE || COMPILE_TEST
> -	default ARCH_MICROCHIP_POLARFIRE
> +	depends on ARCH_MICROCHIP || COMPILE_TEST
> +	default y
>  	depends on MFD_SYSCON
>  	select AUXILIARY_BUS
>  	select COMMON_CLK_DIVIDER_REGMAP

OK, I found v2 in my inbox. Same symptom here. It doesn't apply on top of
the current at91-next either.

Thank you,
Claudiu

Re: [PATCH v2 2/3] dt-bindings: clock: mpfs-ccc: Add pic64gx compatibility

[Claudiu Beznea]

On 11/21/25 15:44, Conor Dooley wrote:
> From: Pierre-Henry Moussay <pierre-henry.moussay@microchip.com>
> 
> pic64gx SoC Clock Conditioning Circuitry is compatibles
> with the Polarfire SoC
> 
> Signed-off-by: Pierre-Henry Moussay <pierre-henry.moussay@microchip.com>
> Acked-by: Conor Dooley <conor.dooley@microchip.com>
> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>

Reviewed-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>

> ---
>  .../devicetree/bindings/clock/microchip,mpfs-ccc.yaml       | 6 +++++-
>  1 file changed, 5 insertions(+), 1 deletion(-)
> 
> diff --git a/Documentation/devicetree/bindings/clock/microchip,mpfs-ccc.yaml b/Documentation/devicetree/bindings/clock/microchip,mpfs-ccc.yaml
> index f1770360798f..9a6b50527c42 100644
> --- a/Documentation/devicetree/bindings/clock/microchip,mpfs-ccc.yaml
> +++ b/Documentation/devicetree/bindings/clock/microchip,mpfs-ccc.yaml
> @@ -17,7 +17,11 @@ description: |
>  
>  properties:
>    compatible:
> -    const: microchip,mpfs-ccc
> +    oneOf:
> +      - items:
> +          - const: microchip,pic64gx-ccc
> +          - const: microchip,mpfs-ccc
> +      - const: microchip,mpfs-ccc
>  
>    reg:
>      items:

Re: [PATCH v2 3/3] dt-bindings: clock: mpfs-clkcfg: Add pic64gx compatibility

[Claudiu Beznea]

On 11/21/25 15:44, Conor Dooley wrote:
> From: Pierre-Henry Moussay <pierre-henry.moussay@microchip.com>
> 
> pic64gx has a clock controller compatible with mpfs-clkcfg. Don't permit
> the deprecated configuration that was never supported for this SoC.
> 
> Signed-off-by: Pierre-Henry Moussay <pierre-henry.moussay@microchip.com>
> Co-developed-by: Conor Dooley <conor.dooley@microchip.com>
> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>

Reviewed-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>

Re: [PATCH v2 1/3] clk: microchip: drop POLARFIRE from ARCH_MICROCHIP_POLARFIRE

[Conor Dooley]

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On Sat, Dec 06, 2025 at 01:18:30PM +0200, Claudiu Beznea wrote:
> 
> 
> On 11/21/25 15:44, Conor Dooley wrote:
> > From: Conor Dooley <conor.dooley@microchip.com>
> > 
> > This driver is used by non-polarfire devices now, and the ARCH_MICROCHIP
> > symbol has been defined for some time on RISCV so drop it without any
> > functional change.
> > 
> > Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
> > ---
> >  drivers/clk/microchip/Kconfig | 4 ++--
> >  1 file changed, 2 insertions(+), 2 deletions(-)
> > 
> > diff --git a/drivers/clk/microchip/Kconfig b/drivers/clk/microchip/Kconfig
> > index cab9a909893b..a0ef14310417 100644
> > --- a/drivers/clk/microchip/Kconfig
> > +++ b/drivers/clk/microchip/Kconfig
> > @@ -5,8 +5,8 @@ config COMMON_CLK_PIC32
> >  
> >  config MCHP_CLK_MPFS
> >  	bool "Clk driver for PolarFire SoC"
> > -	depends on ARCH_MICROCHIP_POLARFIRE || COMPILE_TEST
> > -	default ARCH_MICROCHIP_POLARFIRE
> > +	depends on ARCH_MICROCHIP || COMPILE_TEST
> > +	default y
> >  	depends on MFD_SYSCON
> >  	select AUXILIARY_BUS
> >  	select COMMON_CLK_DIVIDER_REGMAP
> 
> OK, I found v2 in my inbox. Same symptom here. It doesn't apply on top of
> the current at91-next either.

I think this should sort itself out after -rc1, but I'll resend if it
doesn't.

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Re: [PATCH v2 1/3] clk: microchip: drop POLARFIRE from ARCH_MICROCHIP_POLARFIRE

[claudiu beznea]

On 12/8/25 20:02, Conor Dooley wrote:
> On Sat, Dec 06, 2025 at 01:18:30PM +0200, Claudiu Beznea wrote:
>>
>>
>> On 11/21/25 15:44, Conor Dooley wrote:
>>> From: Conor Dooley <conor.dooley@microchip.com>
>>>
>>> This driver is used by non-polarfire devices now, and the ARCH_MICROCHIP
>>> symbol has been defined for some time on RISCV so drop it without any
>>> functional change.
>>>
>>> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
>>> ---
>>>   drivers/clk/microchip/Kconfig | 4 ++--
>>>   1 file changed, 2 insertions(+), 2 deletions(-)
>>>
>>> diff --git a/drivers/clk/microchip/Kconfig b/drivers/clk/microchip/Kconfig
>>> index cab9a909893b..a0ef14310417 100644
>>> --- a/drivers/clk/microchip/Kconfig
>>> +++ b/drivers/clk/microchip/Kconfig
>>> @@ -5,8 +5,8 @@ config COMMON_CLK_PIC32
>>>   
>>>   config MCHP_CLK_MPFS
>>>   	bool "Clk driver for PolarFire SoC"
>>> -	depends on ARCH_MICROCHIP_POLARFIRE || COMPILE_TEST
>>> -	default ARCH_MICROCHIP_POLARFIRE
>>> +	depends on ARCH_MICROCHIP || COMPILE_TEST
>>> +	default y
>>>   	depends on MFD_SYSCON
>>>   	select AUXILIARY_BUS
>>>   	select COMMON_CLK_DIVIDER_REGMAP
>>
>> OK, I found v2 in my inbox. Same symptom here. It doesn't apply on top of
>> the current at91-next either.
> 
> I think this should sort itself out after -rc1, but I'll resend if it
> doesn't.

Still doesn't apply. It conflicts at least with
commit c6f2dddfa7f9 ("clk: microchip: mpfs: use regmap for clocks")

Thank you,
Claudiu

Re: [PATCH v2 1/3] clk: microchip: drop POLARFIRE from ARCH_MICROCHIP_POLARFIRE

[Conor Dooley]

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On Fri, Jan 09, 2026 at 09:22:25AM +0200, claudiu beznea wrote:
> 
> 
> On 12/8/25 20:02, Conor Dooley wrote:
> > On Sat, Dec 06, 2025 at 01:18:30PM +0200, Claudiu Beznea wrote:
> > > 
> > > 
> > > On 11/21/25 15:44, Conor Dooley wrote:
> > > > From: Conor Dooley <conor.dooley@microchip.com>
> > > > 
> > > > This driver is used by non-polarfire devices now, and the ARCH_MICROCHIP
> > > > symbol has been defined for some time on RISCV so drop it without any
> > > > functional change.
> > > > 
> > > > Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
> > > > ---
> > > >   drivers/clk/microchip/Kconfig | 4 ++--
> > > >   1 file changed, 2 insertions(+), 2 deletions(-)
> > > > 
> > > > diff --git a/drivers/clk/microchip/Kconfig b/drivers/clk/microchip/Kconfig
> > > > index cab9a909893b..a0ef14310417 100644
> > > > --- a/drivers/clk/microchip/Kconfig
> > > > +++ b/drivers/clk/microchip/Kconfig
> > > > @@ -5,8 +5,8 @@ config COMMON_CLK_PIC32
> > > >   config MCHP_CLK_MPFS
> > > >   	bool "Clk driver for PolarFire SoC"
> > > > -	depends on ARCH_MICROCHIP_POLARFIRE || COMPILE_TEST
> > > > -	default ARCH_MICROCHIP_POLARFIRE
> > > > +	depends on ARCH_MICROCHIP || COMPILE_TEST
> > > > +	default y
> > > >   	depends on MFD_SYSCON
> > > >   	select AUXILIARY_BUS
> > > >   	select COMMON_CLK_DIVIDER_REGMAP
> > > 
> > > OK, I found v2 in my inbox. Same symptom here. It doesn't apply on top of
> > > the current at91-next either.
> > 
> > I think this should sort itself out after -rc1, but I'll resend if it
> > doesn't.
> 
> Still doesn't apply. It conflicts at least with
> commit c6f2dddfa7f9 ("clk: microchip: mpfs: use regmap for clocks")

Right, I'll resend. Thought it was based on the aforementioned patch
tbh!

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