[PATCH v2 1/4] dt-bindings: dma: snps,dw-axi-dmac: Add compatible string for Agilex5

Khairul Anuar Romli
2025-12-08T01:57:56Z

The address bus on Agilex5 is limited to 40 bits. When SMMU is enable this
will cause address truncation and translation faults. Hence introducing
"altr,agilex5-axi-dma" to enable platform specific configuration to
configure the dma addressable bit mask.

Add a fallback capability for the compatible property to allow driver to
probe and initialize with a newly added compatible string without requiring
additional entry in the driver.

Add dma-ranges to the binding schema to allow specifying DMA address
mapping between the controller and its parent bus.

Signed-off-by: Khairul Anuar Romli <khairul.anuar.romli@altera.com>
---
Changes in v2:
- Add dma-ranges
---
.../bindings/dma/snps,dw-axi-dmac.yaml | 23 +++++++++++++++----
1 file changed, 18 insertions(+), 5 deletions(-)

diff --git a/Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml b/Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml
index a393a33c8908..1a1800d9b544 100644
--- a/Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml
+++ b/Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml
@@ -17,11 +17,15 @@ allOf:

properties:
compatible:
- enum:
- - snps,axi-dma-1.01a
- - intel,kmb-axi-dma
- - starfive,jh7110-axi-dma
- - starfive,jh8100-axi-dma
+ oneOf:
+ - enum:
+ - snps,axi-dma-1.01a
+ - intel,kmb-axi-dma
+ - starfive,jh7110-axi-dma
+ - starfive,jh8100-axi-dma
+ - items:
+ - const: altr,agilex5-axi-dma
+ - const: snps,axi-dma-1.01a

reg:
minItems: 1
@@ -104,6 +108,15 @@ properties:
minimum: 1
maximum: 256

+ dma-ranges:
+ description: |
+ Describe memory addresses translation between the DMA address and the
+ CPU address. Each memory region, is declared with 3-6 32-bit cells
+ parameters:
+ - param 1: device base address
+ - param 2: physical base address
+ - param 3: size of the memory region.
+
required:
- compatible
- reg
--
2.43.7