[PATCH v2 0/4] Add Agilex5 AXI DMA support

Khairul Anuar Romli
2025-12-08T01:57:53Z

This series introduces support for Agilex5 SoC in the Synopsys DesignWare
AXI DMA binding and updates the device tree to use the platform-specific
compatible string.

The Agilex5 only has 40-bit DMA addressable bit instead of 64-bit. Hence,
this specific addition will enable driver to handle this limitation.

---
Notes:
This patch series is applied on socfpga maintainer's tree
https://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux.git/log/?h=socfpga_dts_for_v6.19

Changes in v2:
- Add dma-ranges property.
- Add address-cells and size-cells due to warning when dma-ranges
is define without address-cells and size-cells present. Also
prevent kernel panic if address-cells and size-cells are not
defined.
- Add driver support to handle defined properties and set the DMA
BIT MASK according to value from DT.
- Rename "arm64: dts: agilex5: Use platform-specific compatible for
AXI DMA" to "arm64: dts: intel: agilex5: Add dma-ranges and
address cells to dma node"

This changes is validated on:
- intel/socfpga_agilex5_socdk.dtb
- snps,dw-axi-dmac.yaml
- snps,dw-axi-dmac.yaml intel/socfpga_agilex5_socdk.dtb
- Agilex5 devkit
---
Khairul Anuar Romli (4):
dt-bindings: dma: snps,dw-axi-dmac: Add compatible string for Agilex5
dt-bindings: dma: snps,dw-axi-dmac: Add #address-cells and #size-cells
arm64: dts: intel: agilex5: Add dma-ranges and address cells to dma
node
dma: dw-axi-dmac: Add support for Agilex5 and dynamic bus width

.../bindings/dma/snps,dw-axi-dmac.yaml | 33 ++++++++--
.../arm64/boot/dts/intel/socfpga_agilex5.dtsi | 12 +++-
.../dma/dw-axi-dmac/dw-axi-dmac-platform.c | 63 ++++++++++++++++++-
drivers/dma/dw-axi-dmac/dw-axi-dmac.h | 1 +
4 files changed, 101 insertions(+), 8 deletions(-)

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2.43.7