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Wed, 10 Dec 2025 11:16:16 +0100 From: Christophe Parant To: , , , CC: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maxime Coquelin , Alexandre Torgue , Subject: [PATCH RESEND v2 10/11] ARM: dts: stm32: phyboard-sargas and phycore: Fix coding style issues Date: Wed, 10 Dec 2025 11:16:10 +0100 Message-ID: <20251210101611.27008-11-c.parant@phytec.fr> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20251210101611.27008-1-c.parant@phytec.fr> References: <20251210101611.27008-1-c.parant@phytec.fr> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MIMETrack: Itemize by SMTP Server on Idefix/Phytec(Release 9.0.1FP7|August 17, 2016) at 10.12.2025 11:16:16, Serialize by Router on Idefix/Phytec(Release 9.0.1FP7|August 17, 2016) at 10.12.2025 11:16:16 X-TNEFEvaluated: 1 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DU2PEPF00028D09:EE_|AM0P195MB0756:EE_ X-MS-Office365-Filtering-Correlation-Id: 3b95ad7e-c22d-4066-8f30-08de37d52ae5 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|1800799024|36860700013|376014; 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Signed-off-by: Christophe Parant --- .../st/stm32mp157c-phyboard-sargas-rdk.dts | 1 - .../dts/st/stm32mp15xx-phyboard-sargas.dtsi | 13 ++-- .../boot/dts/st/stm32mp15xx-phycore-som.dtsi | 64 +++++++++---------- 3 files changed, 36 insertions(+), 42 deletions(-) diff --git a/arch/arm/boot/dts/st/stm32mp157c-phyboard-sargas-rdk.dts b/arc= h/arm/boot/dts/st/stm32mp157c-phyboard-sargas-rdk.dts index c90b12a479c9..c18a37266083 100644 --- a/arch/arm/boot/dts/st/stm32mp157c-phyboard-sargas-rdk.dts +++ b/arch/arm/boot/dts/st/stm32mp157c-phyboard-sargas-rdk.dts @@ -6,7 +6,6 @@ =20 /dts-v1/; =20 -#include #include "stm32mp157.dtsi" #include "stm32mp15xc.dtsi" #include "stm32mp15xx-phycore-som.dtsi" diff --git a/arch/arm/boot/dts/st/stm32mp15xx-phyboard-sargas.dtsi b/arch/a= rm/boot/dts/st/stm32mp15xx-phyboard-sargas.dtsi index 9578e78bcc1d..20684b497c99 100644 --- a/arch/arm/boot/dts/st/stm32mp15xx-phyboard-sargas.dtsi +++ b/arch/arm/boot/dts/st/stm32mp15xx-phyboard-sargas.dtsi @@ -5,7 +5,6 @@ * Author: Dom VOVARD . */ =20 - #include #include #include @@ -101,13 +100,13 @@ touch@44 { interrupt-parent =3D <&gpioi>; vio-supply =3D <&v3v3>; vcc-supply =3D <&v3v3>; + st,sample-time =3D <4>; + st,mod-12b =3D <1>; + st,ref-sel =3D <0>; + st,adc-freq =3D <1>; =20 touchscreen { compatible =3D "st,stmpe-ts"; - st,sample-time =3D <4>; - st,mod-12b =3D <1>; - st,ref-sel =3D <0>; - st,adc-freq =3D <1>; st,ave-ctrl =3D <1>; st,touch-det-delay =3D <2>; st,settling =3D <2>; @@ -159,10 +158,10 @@ &sai2 { =20 &sai2a { dma-names =3D "rx"; - st,sync =3D <&sai2b 2>; clocks =3D <&rcc SAI2=5FK>, <&sai2b>; clock-names =3D "sai=5Fck", "MCLK"; #clock-cells =3D <0>; + st,sync =3D <&sai2b 2>; =20 sai2a=5Fport: port { sai2a=5Fendpoint: endpoint { @@ -195,9 +194,9 @@ &sdmmc1 { pinctrl-2 =3D <&sdmmc1=5Fb4=5Fsleep=5Fpins=5Fb>; cd-gpios =3D <&gpiof 3 GPIO=5FACTIVE=5FLOW>; disable-wp; - st,neg-edge; bus-width =3D <4>; vmmc-supply =3D <&v3v3>; + st,neg-edge; status =3D "okay"; }; =20 diff --git a/arch/arm/boot/dts/st/stm32mp15xx-phycore-som.dtsi b/arch/arm/b= oot/dts/st/stm32mp15xx-phycore-som.dtsi index 3f60f184978c..0689967b8c56 100644 --- a/arch/arm/boot/dts/st/stm32mp15xx-phycore-som.dtsi +++ b/arch/arm/boot/dts/st/stm32mp15xx-phycore-som.dtsi @@ -36,18 +36,6 @@ reserved-memory { #size-cells =3D <1>; ranges; =20 - retram: retram@38000000 { - compatible =3D "shared-dma-pool"; - reg =3D <0x38000000 0x10000>; - no-map; - }; - - mcuram: mcuram@30000000 { - compatible =3D "shared-dma-pool"; - reg =3D <0x30000000 0x40000>; - no-map; - }; - mcuram2: mcuram2@10000000 { compatible =3D "shared-dma-pool"; reg =3D <0x10000000 0x40000>; @@ -71,11 +59,22 @@ vdev0buffer: vdev0buffer@10042000 { reg =3D <0x10042000 0x4000>; no-map; }; + mcuram: mcuram@30000000 { + compatible =3D "shared-dma-pool"; + reg =3D <0x30000000 0x40000>; + no-map; + }; + + retram: retram@38000000 { + compatible =3D "shared-dma-pool"; + reg =3D <0x38000000 0x10000>; + no-map; + }; }; =20 regulator=5Fvin: regulator { compatible =3D "regulator-fixed"; - regulator-name =3D "vin"; + regulator-name =3D "VIN"; regulator-min-microvolt =3D <5000000>; regulator-max-microvolt =3D <5000000>; regulator-always-on; @@ -102,11 +101,11 @@ phy0: ethernet-phy@1 { reg =3D <1>; interrupt-parent =3D <&gpiog>; interrupts =3D <12 IRQ=5FTYPE=5FEDGE=5FFALLING>; + enet-phy-lane-no-swap; ti,rx-internal-delay =3D ; ti,tx-internal-delay =3D ; ti,fifo-depth =3D ; ti,min-output-impedance; - enet-phy-lane-no-swap; ti,clk-output-sel =3D ; }; }; @@ -144,7 +143,7 @@ regulators { pwr=5Fsw2-supply =3D <&bst=5Fout>; =20 vddcore: buck1 { - regulator-name =3D "vddcore"; + regulator-name =3D "VDD=5FCORE"; regulator-min-microvolt =3D <1200000>; regulator-max-microvolt =3D <1350000>; regulator-always-on; @@ -152,7 +151,7 @@ vddcore: buck1 { }; =20 vdd=5Fddr: buck2 { - regulator-name =3D "vdd=5Fddr"; + regulator-name =3D "VDD=5FDDR"; regulator-min-microvolt =3D <1350000>; regulator-max-microvolt =3D <1350000>; regulator-always-on; @@ -160,7 +159,7 @@ vdd=5Fddr: buck2 { }; =20 vdd: buck3 { - regulator-name =3D "vdd"; + regulator-name =3D "VDD"; regulator-min-microvolt =3D <3300000>; regulator-max-microvolt =3D <3300000>; regulator-always-on; @@ -169,7 +168,7 @@ vdd: buck3 { }; =20 v3v3: buck4 { - regulator-name =3D "v3v3"; + regulator-name =3D "VDD=5FBUCK4"; regulator-min-microvolt =3D <3300000>; regulator-max-microvolt =3D <3300000>; regulator-always-on; @@ -177,7 +176,7 @@ v3v3: buck4 { }; =20 v1v8=5Faudio: ldo1 { - regulator-name =3D "v1v8=5Faudio"; + regulator-name =3D "VDD=5FLDO1"; regulator-min-microvolt =3D <1800000>; regulator-max-microvolt =3D <1800000>; regulator-always-on; @@ -186,7 +185,7 @@ v1v8=5Faudio: ldo1 { }; =20 vdd=5Feth=5F2v5: ldo2 { - regulator-name =3D "dd=5Feth=5F2v5"; + regulator-name =3D "VDD=5FETH=5F2V5"; regulator-min-microvolt =3D <2500000>; regulator-max-microvolt =3D <2500000>; regulator-always-on; @@ -195,7 +194,7 @@ vdd=5Feth=5F2v5: ldo2 { }; =20 vtt=5Fddr: ldo3 { - regulator-name =3D "vtt=5Fddr"; + regulator-name =3D "VTT=5FDDR"; regulator-min-microvolt =3D <500000>; regulator-max-microvolt =3D <750000>; regulator-always-on; @@ -203,12 +202,12 @@ vtt=5Fddr: ldo3 { }; =20 vdd=5Fusb: ldo4 { - regulator-name =3D "vdd=5Fusb"; + regulator-name =3D "VDD=5FUSB"; interrupts =3D ; }; =20 vdda: ldo5 { - regulator-name =3D "vdda"; + regulator-name =3D "VDDA"; regulator-min-microvolt =3D <2900000>; regulator-max-microvolt =3D <2900000>; interrupts =3D ; @@ -216,7 +215,7 @@ vdda: ldo5 { }; =20 vdd=5Feth=5F1v0: ldo6 { - regulator-name =3D "vdd=5Feth=5F1v0"; + regulator-name =3D "VDD=5FETH=5F1V0"; regulator-min-microvolt =3D <1000000>; regulator-max-microvolt =3D <1000000>; regulator-always-on; @@ -225,23 +224,23 @@ vdd=5Feth=5F1v0: ldo6 { }; =20 vref=5Fddr: vref=5Fddr { - regulator-name =3D "vref=5Fddr"; + regulator-name =3D "VDD=5FREFDDR"; regulator-always-on; }; =20 bst=5Fout: boost { - regulator-name =3D "bst=5Fout"; + regulator-name =3D "BST=5FOUT"; interrupts =3D ; }; =20 vbus=5Fotg: pwr=5Fsw1 { - regulator-name =3D "vbus=5Fotg"; + regulator-name =3D "VBUS=5FOTG"; interrupts =3D ; regulator-active-discharge =3D <1>; }; =20 vbus=5Fsw: pwr=5Fsw2 { - regulator-name =3D "vbus=5Fsw"; + regulator-name =3D "VBUS=5FSW"; interrupts =3D ; regulator-active-discharge =3D <1>; }; @@ -262,8 +261,7 @@ watchdog { }; =20 i2c4=5Feeprom: eeprom@50 { - compatible =3D "microchip,24c32", - "atmel,24c32"; + compatible =3D "atmel,24c32"; reg =3D <0x50>; status =3D "disabled"; }; @@ -312,13 +310,11 @@ &qspi=5Fbk1=5Fsleep=5Fpins=5Fa status =3D "disabled"; =20 flash0: flash@0 { - compatible =3D "winbond,w25q128", "jedec,spi-nor"; + compatible =3D "jedec,spi-nor"; reg =3D <0>; spi-rx-bus-width =3D <4>; spi-max-frequency =3D <50000000>; m25p,fast-read; - #address-cells =3D <1>; - #size-cells =3D <1>; }; }; =20 @@ -342,10 +338,10 @@ &sdmmc2 { non-removable; no-sd; no-sdio; - st,neg-edge; bus-width =3D <8>; vmmc-supply =3D <&v3v3>; vqmmc-supply =3D <&v3v3>; mmc-ddr-3=5F3v; + st,neg-edge; status =3D "disabled"; }; --=20 2.34.1