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[82.69.66.36]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-42fa8b85feasm1051301f8f.27.2025.12.10.12.59.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 10 Dec 2025 12:59:18 -0800 (PST) Date: Wed, 10 Dec 2025 20:59:15 +0000 From: David Laight To: Nicolas Frattaroli Cc: Yury Norov , Rasmus Villemoes , linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, Geert Uytterhoeven , Alexandre Belloni , Jonathan Cameron , Crt Mori , Richard Genoud , Andy Shevchenko , Luo Jie , Peter Zijlstra , Jakub Kicinski , netdev@vger.kernel.org, "David S . Miller" , Simon Horman , Mika Westerberg , Andreas Noever , Yehezkel Bernat Subject: Re: [PATCH 3/9] bitmap: Use FIELD_PREP() in expansion of FIELD_PREP_WM16() Message-ID: <20251210205915.3b055b7c@pumpkin> In-Reply-To: <2262600.PYKUYFuaPT@workhorse> References: <20251209100313.2867-1-david.laight.linux@gmail.com> <20251209100313.2867-4-david.laight.linux@gmail.com> <2262600.PYKUYFuaPT@workhorse> X-Mailer: Claws Mail 4.1.1 (GTK 3.24.38; arm-unknown-linux-gnueabihf) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit On Wed, 10 Dec 2025 20:18:30 +0100 Nicolas Frattaroli wrote: > On Tuesday, 9 December 2025 11:03:07 Central European Standard Time david.laight.linux@gmail.com wrote: > > From: David Laight > > > > Instead of directly expanding __BF_FIELD_CHECK() (which really ought > > not be used outside bitfield) and open-coding the generation of the > > masked value, just call FIELD_PREP() and add an extra check for > > the mask being at most 16 bits. > > > > Signed-off-by: David Laight > > --- > > include/linux/hw_bitfield.h | 17 ++++++++--------- > > 1 file changed, 8 insertions(+), 9 deletions(-) > > > > diff --git a/include/linux/hw_bitfield.h b/include/linux/hw_bitfield.h > > index df202e167ce4..d7f21b60449b 100644 > > --- a/include/linux/hw_bitfield.h > > +++ b/include/linux/hw_bitfield.h > > @@ -23,15 +23,14 @@ > > * register, a bit in the lower half is only updated if the corresponding bit > > * in the upper half is high. > > */ > > -#define FIELD_PREP_WM16(_mask, _val) \ > > - ({ \ > > - typeof(_val) __val = _val; \ > > - typeof(_mask) __mask = _mask; \ > > - __BF_FIELD_CHECK(__mask, ((u16)0U), __val, \ > > - "HWORD_UPDATE: "); \ > > - (((typeof(__mask))(__val) << __bf_shf(__mask)) & (__mask)) | \ > > - ((__mask) << 16); \ > > - }) > > +#define FIELD_PREP_WM16(mask, val) \ > > +({ \ > > + __auto_type _mask = mask; \ > > + u32 _val = FIELD_PREP(_mask, val); \ > > + BUILD_BUG_ON_MSG(_mask > 0xffffu, \ > > + "FIELD_PREP_WM16: mask too large"); \ > > + _val | (_mask << 16); \ > > +}) > > > > /** > > * FIELD_PREP_WM16_CONST() - prepare a constant bitfield element with a mask in > > > > This breaks the build for at least one driver that uses > FIELD_PREP_WM16, namely phy-rockchip-emmc.c: Not in my allmodconfig build. ... > pcie-dw-rockchip.c is similarly broken by this change, except > without the superfluous wrapper: That one did get built. The problem is that FIELD_PREP_WM16() needs to use different 'local' variables than FIELD_PREP(). The 'proper' fix is to use unique names (as min() and max() do), but that makes the whole thing unreadable and is best avoided unless nesting is likely. In this case s/mask/wm16_mask/ and s/val/wm16_val/ might be best. David